Searched refs:pll1_cfg (Results 1 – 6 of 6) sorted by relevance
30 writel(PLL1_CFG_DEFAULT, &ccm->pll1_cfg); in clock_init_safe()95 u32 pll1_cfg; member169 writel(pll1_para[i].pll1_cfg, &ccm->pll1_cfg); in clock_set_pll1()
70 CCM_PLL1_CTRL_N(clk / 24000000), &ccm->pll1_cfg); in clock_set_pll1()71 while (!(readl(&ccm->pll1_cfg) & CCM_PLL1_LOCK)) {} in clock_set_pll1()
137 CCM_PLL1_CTRL_K(k) | CCM_PLL1_CTRL_M(m), &ccm->pll1_cfg); in clock_set_pll1()
14 u32 pll1_cfg; /* 0x00 pll1 control */ member
13 u32 pll1_cfg; /* 0x000 pll1 (cpux) control */ member