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Searched refs:pipe_config (Results 1 – 25 of 56) sorted by relevance

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/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_crtc_state_dump.c30 intel_dump_m_n_config(const struct intel_crtc_state *pipe_config, in intel_dump_m_n_config() argument
34 struct drm_i915_private *i915 = to_i915(pipe_config->uapi.crtc->dev); in intel_dump_m_n_config()
200 void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config, in intel_crtc_state_dump() argument
204 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); in intel_crtc_state_dump()
213 str_yes_no(pipe_config->hw.enable), context); in intel_crtc_state_dump()
215 if (!pipe_config->hw.enable) in intel_crtc_state_dump()
218 snprintf_output_types(buf, sizeof(buf), pipe_config->output_types); in intel_crtc_state_dump()
221 str_yes_no(pipe_config->hw.active), in intel_crtc_state_dump()
222 buf, pipe_config->output_types, in intel_crtc_state_dump()
223 intel_output_format_name(pipe_config->output_format), in intel_crtc_state_dump()
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H A Dg4x_hdmi.c149 struct intel_crtc_state *pipe_config) in intel_hdmi_get_config() argument
157 pipe_config->output_types |= BIT(INTEL_OUTPUT_HDMI); in intel_hdmi_get_config()
172 pipe_config->has_hdmi_sink = true; in intel_hdmi_get_config()
174 pipe_config->infoframes.enable |= in intel_hdmi_get_config()
175 intel_hdmi_infoframes_enabled(encoder, pipe_config); in intel_hdmi_get_config()
177 if (pipe_config->infoframes.enable) in intel_hdmi_get_config()
178 pipe_config->has_infoframe = true; in intel_hdmi_get_config()
181 pipe_config->has_audio = true; in intel_hdmi_get_config()
185 pipe_config->limited_color_range = true; in intel_hdmi_get_config()
187 pipe_config->hw.adjusted_mode.flags |= flags; in intel_hdmi_get_config()
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H A Dg4x_dp.c57 struct intel_crtc_state *pipe_config) in g4x_dp_set_clock() argument
79 if (pipe_config->port_clock == divisor[i].dot) { in g4x_dp_set_clock()
80 pipe_config->dpll = divisor[i]; in g4x_dp_set_clock()
81 pipe_config->clock_set = true; in g4x_dp_set_clock()
89 const struct intel_crtc_state *pipe_config) in intel_dp_prepare() argument
94 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); in intel_dp_prepare()
95 const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; in intel_dp_prepare()
98 pipe_config->port_clock, in intel_dp_prepare()
99 pipe_config->lane_count); in intel_dp_prepare()
124 intel_dp->DP |= DP_PORT_WIDTH(pipe_config->lane_count); in intel_dp_prepare()
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H A Dintel_modeset_verify.c90 const struct intel_crtc_state *pipe_config) in intel_pipe_config_sanity_check() argument
92 if (pipe_config->has_pch_encoder) { in intel_pipe_config_sanity_check()
93 int fdi_dotclock = intel_dotclock_calculate(intel_fdi_link_freq(dev_priv, pipe_config), in intel_pipe_config_sanity_check()
94 &pipe_config->fdi_m_n); in intel_pipe_config_sanity_check()
95 int dotclock = pipe_config->hw.adjusted_mode.crtc_clock; in intel_pipe_config_sanity_check()
166 struct intel_crtc_state *pipe_config = old_crtc_state; in verify_crtc_state() local
178 pipe_config->hw.enable = new_crtc_state->hw.enable; in verify_crtc_state()
180 intel_crtc_get_pipe_config(pipe_config); in verify_crtc_state()
183 if (IS_I830(dev_priv) && pipe_config->hw.active) in verify_crtc_state()
184 pipe_config->hw.active = new_crtc_state->hw.active; in verify_crtc_state()
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H A Dintel_dp_mst.c306 struct intel_crtc_state *pipe_config, in intel_dp_mst_compute_config() argument
313 &pipe_config->hw.adjusted_mode; in intel_dp_mst_compute_config()
320 pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB; in intel_dp_mst_compute_config()
321 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; in intel_dp_mst_compute_config()
322 pipe_config->has_pch_encoder = false; in intel_dp_mst_compute_config()
324 pipe_config->has_audio = in intel_dp_mst_compute_config()
326 intel_audio_compute_config(encoder, pipe_config, conn_state); in intel_dp_mst_compute_config()
338 limits.min_bpp = intel_dp_min_bpp(pipe_config->output_format); in intel_dp_mst_compute_config()
347 limits.max_bpp = min(pipe_config->pipe_bpp, 24); in intel_dp_mst_compute_config()
349 intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits); in intel_dp_mst_compute_config()
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H A Dintel_dp.c1315 const struct intel_crtc_state *pipe_config) in intel_dp_source_supports_fec() argument
1324 !intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST)) in intel_dp_source_supports_fec()
1331 const struct intel_crtc_state *pipe_config) in intel_dp_supports_fec() argument
1333 return intel_dp_source_supports_fec(intel_dp, pipe_config) && in intel_dp_supports_fec()
1422 struct intel_crtc_state *pipe_config, in intel_dp_adjust_compliance_config() argument
1432 pipe_config->dither_force_disable = bpp == 6 * 3; in intel_dp_adjust_compliance_config()
1486 struct intel_crtc_state *pipe_config, in intel_dp_compute_link_config_wide() argument
1490 int bpp, i, lane_count, clock = intel_dp_mode_clock(pipe_config, conn_state); in intel_dp_compute_link_config_wide()
1494 int output_bpp = intel_dp_output_bpp(pipe_config->output_format, bpp); in intel_dp_compute_link_config_wide()
1511 pipe_config->lane_count = lane_count; in intel_dp_compute_link_config_wide()
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H A Dintel_crt.c141 struct intel_crtc_state *pipe_config) in intel_crt_get_config() argument
143 pipe_config->output_types |= BIT(INTEL_OUTPUT_ANALOG); in intel_crt_get_config()
145 pipe_config->hw.adjusted_mode.flags |= intel_crt_get_flags(encoder); in intel_crt_get_config()
147 pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock; in intel_crt_get_config()
151 struct intel_crtc_state *pipe_config) in hsw_crt_get_config() argument
153 lpt_pch_get_config(pipe_config); in hsw_crt_get_config()
155 hsw_ddi_get_config(encoder, pipe_config); in hsw_crt_get_config()
157 pipe_config->hw.adjusted_mode.flags &= ~(DRM_MODE_FLAG_PHSYNC | in hsw_crt_get_config()
161 pipe_config->hw.adjusted_mode.flags |= intel_crt_get_flags(encoder); in hsw_crt_get_config()
395 struct intel_crtc_state *pipe_config, in intel_crt_compute_config() argument
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H A Dintel_display.c2604 struct intel_crtc_state *pipe_config) in intel_get_transcoder_timings() argument
2608 enum transcoder cpu_transcoder = pipe_config->cpu_transcoder; in intel_get_transcoder_timings()
2609 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; in intel_get_transcoder_timings()
2640 if (intel_pipe_is_interlaced(pipe_config)) { in intel_get_transcoder_timings()
2670 struct intel_crtc_state *pipe_config) in intel_get_pipe_src_size() argument
2678 drm_rect_init(&pipe_config->pipe_src, 0, 0, in intel_get_pipe_src_size()
2682 intel_bigjoiner_adjust_pipe_src(pipe_config); in intel_get_pipe_src_size()
2791 struct intel_crtc_state *pipe_config) in vlv_crtc_clock_get() argument
2801 if ((pipe_config->dpll_hw_state.dpll & DPLL_VCO_ENABLE) == 0) in vlv_crtc_clock_get()
2814 pipe_config->port_clock = vlv_calc_dpll_params(refclk, &clock); in vlv_crtc_clock_get()
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H A Dintel_dvo.c158 struct intel_crtc_state *pipe_config) in intel_dvo_get_config() argument
164 pipe_config->output_types |= BIT(INTEL_OUTPUT_DVO); in intel_dvo_get_config()
176 pipe_config->hw.adjusted_mode.flags |= flags; in intel_dvo_get_config()
178 pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock; in intel_dvo_get_config()
198 const struct intel_crtc_state *pipe_config, in intel_enable_dvo() argument
206 &pipe_config->hw.mode, in intel_enable_dvo()
207 &pipe_config->hw.adjusted_mode); in intel_enable_dvo()
254 struct intel_crtc_state *pipe_config, in intel_dvo_compute_config() argument
259 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; in intel_dvo_compute_config()
280 pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB; in intel_dvo_compute_config()
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H A Dintel_fdi.c132 struct intel_crtc_state *pipe_config) in ilk_check_fdi_lanes() argument
135 struct drm_atomic_state *state = pipe_config->uapi.state; in ilk_check_fdi_lanes()
141 pipe_name(pipe), pipe_config->fdi_lanes); in ilk_check_fdi_lanes()
142 if (pipe_config->fdi_lanes > 4) { in ilk_check_fdi_lanes()
145 pipe_name(pipe), pipe_config->fdi_lanes); in ilk_check_fdi_lanes()
150 if (pipe_config->fdi_lanes > 2) { in ilk_check_fdi_lanes()
153 pipe_config->fdi_lanes); in ilk_check_fdi_lanes()
168 if (pipe_config->fdi_lanes <= 2) in ilk_check_fdi_lanes()
180 pipe_name(pipe), pipe_config->fdi_lanes); in ilk_check_fdi_lanes()
185 if (pipe_config->fdi_lanes > 2) { in ilk_check_fdi_lanes()
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H A Dvlv_dsi.c271 struct intel_crtc_state *pipe_config, in intel_dsi_compute_config() argument
278 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; in intel_dsi_compute_config()
282 pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB; in intel_dsi_compute_config()
283 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; in intel_dsi_compute_config()
289 ret = intel_panel_fitting(pipe_config, conn_state); in intel_dsi_compute_config()
300 pipe_config->pipe_bpp = 24; in intel_dsi_compute_config()
302 pipe_config->pipe_bpp = 18; in intel_dsi_compute_config()
306 pipe_config->mode_flags |= in intel_dsi_compute_config()
311 pipe_config->cpu_transcoder = TRANSCODER_DSI_C; in intel_dsi_compute_config()
313 pipe_config->cpu_transcoder = TRANSCODER_DSI_A; in intel_dsi_compute_config()
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H A Dicl_dsi.c277 const struct intel_crtc_state *pipe_config) in configure_dual_link_mode() argument
286 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); in configure_dual_link_mode()
302 &pipe_config->hw.adjusted_mode; in configure_dual_link_mode()
679 const struct intel_crtc_state *pipe_config) in gen11_dsi_configure_transcoder() argument
683 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); in gen11_dsi_configure_transcoder()
699 if (afe_clk(encoder, pipe_config) >= 1500 * 1000) { in gen11_dsi_configure_transcoder()
725 if (pipe_config->dsc.compression_enable) { in gen11_dsi_configure_transcoder()
792 configure_dual_link_mode(encoder, pipe_config); in gen11_dsi_configure_transcoder()
1185 const struct intel_crtc_state *pipe_config, in gen11_dsi_pre_enable() argument
1189 gen11_dsi_map_pll(encoder, pipe_config); in gen11_dsi_pre_enable()
1455 gen11_dsi_get_timings(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config) gen11_dsi_get_timings() argument
1510 gen11_dsi_get_cmd_mode_config(struct intel_dsi * intel_dsi,struct intel_crtc_state * pipe_config) gen11_dsi_get_cmd_mode_config() argument
1522 gen11_dsi_get_config(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config) gen11_dsi_get_config() argument
1615 gen11_dsi_compute_config(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config,struct drm_connector_state * conn_state) gen11_dsi_compute_config() argument
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H A Dintel_ddi.c373 static void ddi_dotclock_get(struct intel_crtc_state *pipe_config) in ddi_dotclock_get() argument
376 if (pipe_config->has_pch_encoder) in ddi_dotclock_get()
379 pipe_config->hw.adjusted_mode.crtc_clock = in ddi_dotclock_get()
380 intel_crtc_dotclock(pipe_config); in ddi_dotclock_get()
2277 struct intel_crtc_state *pipe_config) in intel_ddi_mso_get_config() argument
2279 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); in intel_ddi_mso_get_config()
2289 pipe_config->splitter.enable = dss1 & SPLITTER_ENABLE; in intel_ddi_mso_get_config()
2290 if (!pipe_config->splitter.enable) in intel_ddi_mso_get_config()
2294 pipe_config->splitter.enable = false; in intel_ddi_mso_get_config()
2304 pipe_config in intel_ddi_mso_get_config()
3654 intel_ddi_read_func_ctl(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config) intel_ddi_read_func_ctl() argument
3774 intel_ddi_get_config(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config) intel_ddi_get_config() argument
4053 intel_ddi_compute_config(struct intel_encoder * encoder,struct intel_crtc_state * pipe_config,struct drm_connector_state * conn_state) intel_ddi_compute_config() argument
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H A Dintel_pipe_crc.c282 struct intel_crtc_state *pipe_config; in intel_crtc_crc_setup_workarounds() local
299 pipe_config = intel_atomic_get_crtc_state(state, crtc); in intel_crtc_crc_setup_workarounds()
300 if (IS_ERR(pipe_config)) { in intel_crtc_crc_setup_workarounds()
301 ret = PTR_ERR(pipe_config); in intel_crtc_crc_setup_workarounds()
305 pipe_config->uapi.mode_changed = pipe_config->has_psr; in intel_crtc_crc_setup_workarounds()
306 pipe_config->crc_enabled = enable; in intel_crtc_crc_setup_workarounds()
309 pipe_config->hw.active && crtc->pipe == PIPE_A && in intel_crtc_crc_setup_workarounds()
310 pipe_config->cpu_transcoder == TRANSCODER_EDP) in intel_crtc_crc_setup_workarounds()
311 pipe_config->uapi.mode_changed = true; in intel_crtc_crc_setup_workarounds()
H A Dintel_sdvo.c1273 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config) in i9xx_adjust_sdvo_tv_clock() argument
1275 struct drm_i915_private *dev_priv = to_i915(pipe_config->uapi.crtc->dev); in i9xx_adjust_sdvo_tv_clock()
1276 unsigned dotclock = pipe_config->port_clock; in i9xx_adjust_sdvo_tv_clock()
1277 struct dpll *clock = &pipe_config->dpll; in i9xx_adjust_sdvo_tv_clock()
1300 pipe_config->clock_set = true; in i9xx_adjust_sdvo_tv_clock()
1346 struct intel_crtc_state *pipe_config, in intel_sdvo_compute_config() argument
1352 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode; in intel_sdvo_compute_config()
1353 struct drm_display_mode *mode = &pipe_config->hw.mode; in intel_sdvo_compute_config()
1356 pipe_config->pipe_bpp = 8*3; in intel_sdvo_compute_config()
1357 pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB; in intel_sdvo_compute_config()
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H A Dintel_tv.c926 const struct intel_crtc_state *pipe_config, in intel_enable_tv() argument
933 intel_crtc_wait_for_next_vblank(to_intel_crtc(pipe_config->uapi.crtc)); in intel_enable_tv()
1094 struct intel_crtc_state *pipe_config) in intel_tv_get_config() argument
1098 &pipe_config->hw.adjusted_mode; in intel_tv_get_config()
1106 pipe_config->output_types |= BIT(INTEL_OUTPUT_TVOUT); in intel_tv_get_config()
1128 tv_mode.clock = pipe_config->port_clock; in intel_tv_get_config()
1155 intel_tv_mode_to_mode(&mode, &tv_mode, pipe_config->port_clock); in intel_tv_get_config()
1171 pipe_config->mode_flags |= in intel_tv_get_config()
1193 struct intel_crtc_state *pipe_config, in intel_tv_compute_config() argument
1197 to_intel_atomic_state(pipe_config->uapi.state); in intel_tv_compute_config()
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H A Dintel_vdsc.c217 static int intel_dsc_slice_dimensions_valid(struct intel_crtc_state *pipe_config, in intel_dsc_slice_dimensions_valid() argument
220 if (pipe_config->output_format == INTEL_OUTPUT_FORMAT_RGB || in intel_dsc_slice_dimensions_valid()
221 pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR444) { in intel_dsc_slice_dimensions_valid()
226 } else if (pipe_config->output_format == INTEL_OUTPUT_FORMAT_YCBCR420) { in intel_dsc_slice_dimensions_valid()
240 int intel_dsc_compute_params(struct intel_crtc_state *pipe_config) in intel_dsc_compute_params() argument
242 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); in intel_dsc_compute_params()
244 struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config; in intel_dsc_compute_params()
245 u16 compressed_bpp = pipe_config->dsc.compressed_bpp; in intel_dsc_compute_params()
249 vdsc_cfg->pic_width = pipe_config->hw.adjusted_mode.crtc_hdisplay; in intel_dsc_compute_params()
251 pipe_config->dsc.slice_count); in intel_dsc_compute_params()
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H A Dintel_hdmi.c253 const struct intel_crtc_state *pipe_config) in g4x_infoframes_enabled() argument
325 const struct intel_crtc_state *pipe_config) in ibx_infoframes_enabled() argument
328 enum pipe pipe = to_intel_crtc(pipe_config->uapi.crtc)->pipe; in ibx_infoframes_enabled()
403 const struct intel_crtc_state *pipe_config) in cpt_infoframes_enabled() argument
406 enum pipe pipe = to_intel_crtc(pipe_config->uapi.crtc)->pipe; in cpt_infoframes_enabled()
476 const struct intel_crtc_state *pipe_config) in vlv_infoframes_enabled() argument
479 enum pipe pipe = to_intel_crtc(pipe_config->uapi.crtc)->pipe; in vlv_infoframes_enabled()
549 const struct intel_crtc_state *pipe_config) in hsw_infoframes_enabled() argument
553 HSW_TVIDEO_DIP_CTL(pipe_config->cpu_transcoder)); in hsw_infoframes_enabled()
2285 struct intel_crtc_state *pipe_config, in intel_hdmi_compute_config() argument
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H A Dintel_lspcon.h35 const struct intel_crtc_state *pipe_config);
37 const struct intel_crtc_state *pipe_config);
H A Dintel_fdi.h16 const struct intel_crtc_state *pipe_config);
18 struct intel_crtc_state *pipe_config);
H A Dintel_dp.h34 struct intel_crtc_state *pipe_config,
60 struct intel_crtc_state *pipe_config,
63 struct intel_crtc_state *pipe_config,
H A Dg4x_dp.h23 struct intel_crtc_state *pipe_config);
H A Dintel_vdsc.h20 int intel_dsc_compute_params(struct intel_crtc_state *pipe_config);
/openbmc/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc_dmub_srv.c466 pipe_data->pipe_config.vblank_data.drr_info.drr_in_use = true; in populate_subvp_cmd_drr_info()
467 pipe_data->pipe_config.vblank_data.drr_info.use_ramping = false; // for now don't use ramping in populate_subvp_cmd_drr_info()
468 …pipe_data->pipe_config.vblank_data.drr_info.drr_window_size_ms = 4; // hardcode 4ms DRR window for… in populate_subvp_cmd_drr_info()
499 pipe_data->pipe_config.vblank_data.drr_info.min_vtotal_supported = min_vtotal_supported; in populate_subvp_cmd_drr_info()
500 pipe_data->pipe_config.vblank_data.drr_info.max_vtotal_supported = max_vtotal_supported; in populate_subvp_cmd_drr_info()
501 …pipe_data->pipe_config.vblank_data.drr_info.drr_vblank_start_margin = dc->caps.subvp_drr_vblank_st… in populate_subvp_cmd_drr_info()
545 pipe_data->pipe_config.vblank_data.pix_clk_100hz = vblank_pipe->stream->timing.pix_clk_100hz; in populate_subvp_cmd_vblank_pipe_info()
546 pipe_data->pipe_config.vblank_data.vblank_start = vblank_pipe->stream->timing.v_total - in populate_subvp_cmd_vblank_pipe_info()
548 pipe_data->pipe_config.vblank_data.vtotal = vblank_pipe->stream->timing.v_total; in populate_subvp_cmd_vblank_pipe_info()
549 pipe_data->pipe_config.vblank_data.htotal = vblank_pipe->stream->timing.h_total; in populate_subvp_cmd_vblank_pipe_info()
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/openbmc/linux/drivers/usb/renesas_usbhs/
H A Dpipe.c477 struct renesas_usbhs_driver_pipe_config *pipe_config = in usbhsp_setup_pipebuff() local
489 buff_size = pipe_config->bufsize; in usbhsp_setup_pipebuff()
490 bufnmb = pipe_config->bufnum; in usbhsp_setup_pipebuff()
507 struct renesas_usbhs_driver_pipe_config *pipe_config = in usbhs_pipe_config_update() local
509 u16 dblb = pipe_config->double_buf ? DBLB : 0; in usbhs_pipe_config_update()

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