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Searched refs:phydev_dbg (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/net/phy/
H A Dmeson-gxl.c178 phydev_dbg(phydev, "LPA corruption - aneg restart\n"); in meson_gxl_read_status()
H A Dadin1100.c203 phydev_dbg(phydev, "PHY supports 2.4V TX level: %s\n", in adin_get_features()
H A Daquantia_main.c559 phydev_dbg(phydev, "FW %u.%u, Build %u, Provisioning %u\n", in aqr107_chip_info()
641 phydev_dbg(phydev, "Link partner is Aquantia PHY, FW %u.%u%s%s%s\n", in aqr107_link_change_notify()
H A Dmediatek-ge-soc.c355 phydev_dbg(phydev, "cal_val: 0x%x, ret: %d\n", cal_val, ret); in cal_cycle()
619 phydev_dbg(phydev, "Start TX-VCM SW cal.\n"); in tx_vcm_cal_sw()
678 phydev_dbg(phydev, "TX-VCM SW cal result: 0x%x\n", upper_idx); in tx_vcm_cal_sw()
H A Dnxp-c45-tja11xx.c1522 phydev_dbg(phydev, "Clause 45 managed PHY abilities 0x%x\n", ret); in nxp_c45_set_phy_mode()
1652 phydev_dbg(phydev, "the phy does not support PTP"); in nxp_c45_probe()
1665 phydev_dbg(phydev, "PTP support not enabled even if the phy supports it"); in nxp_c45_probe()
H A Ddp83822.c532 phydev_dbg(phydev, "SOR1 strap register: 0x%04x\n", val); in dp83822_read_straps()
H A Dsmsc.c458 phydev_dbg(phydev, "pattern not valid at %d\n", rc); in lan874x_set_wol()
H A Dbcm54140.c598 phydev_dbg(phydev, "probed (port %d, base PHY address %d)\n", in bcm54140_probe()
H A Dadin.c498 phydev_dbg(phydev, "PHY is using mode '%s'\n", in adin_config_init()
H A Dphy.c65 phydev_dbg(phydev, "PHY state change %s -> %s\n", in phy_process_state_change()
H A Dat803x.c1163 phydev_dbg(phydev, "%s(): phy was reset\n", __func__); in at803x_link_change_notify()
H A Dmicrel.c3298 phydev_dbg(phydev, "successfully registered ptp clock\n"); in lan8814_ptp_probe_once()
/openbmc/linux/include/linux/
H A Dphy.h1789 #define phydev_dbg(_phydev, format, args...) \ macro