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Searched refs:phy_reg (Results 1 – 25 of 35) sorted by relevance

12

/openbmc/linux/drivers/net/ethernet/dec/tulip/
H A Dpnic.c23 u32 phy_reg = ioread32(ioaddr + 0xB8); in pnic_do_nway() local
26 if (phy_reg & 0x78000000) { /* Ignore baseT4 */ in pnic_do_nway()
27 if (phy_reg & 0x20000000) dev->if_port = 5; in pnic_do_nway()
28 else if (phy_reg & 0x40000000) dev->if_port = 3; in pnic_do_nway()
29 else if (phy_reg & 0x10000000) dev->if_port = 4; in pnic_do_nway()
30 else if (phy_reg & 0x08000000) dev->if_port = 0; in pnic_do_nway()
36 if (phy_reg & 0x30000000) { in pnic_do_nway()
42 phy_reg, medianame[dev->if_port]); in pnic_do_nway()
56 int phy_reg = ioread32(ioaddr + 0xB8); in pnic_lnk_change() local
60 phy_reg, csr5); in pnic_lnk_change()
[all …]
H A Ddmfe.c1669 u16 phy_reg; in dmfe_set_phyxcer() local
1677 phy_reg = dmfe_phy_read(db->ioaddr, in dmfe_set_phyxcer()
1681 db->phy_addr, 18, phy_reg, db->chip_id); in dmfe_set_phyxcer()
1685 phy_reg = dmfe_phy_read(db->ioaddr, db->phy_addr, 4, db->chip_id) & ~0x01e0; in dmfe_set_phyxcer()
1689 phy_reg |= db->PHY_reg4; in dmfe_set_phyxcer()
1693 case DMFE_10MHF: phy_reg |= 0x20; break; in dmfe_set_phyxcer()
1694 case DMFE_10MFD: phy_reg |= 0x40; break; in dmfe_set_phyxcer()
1695 case DMFE_100MHF: phy_reg |= 0x80; break; in dmfe_set_phyxcer()
1696 case DMFE_100MFD: phy_reg |= 0x100; break; in dmfe_set_phyxcer()
1698 if (db->chip_id == PCI_DM9009_ID) phy_reg &= 0x61; in dmfe_set_phyxcer()
[all …]
H A Duli526x.c1522 u16 phy_reg; in uli526x_set_phyxcer() local
1525 phy_reg = phy->read(db, db->phy_addr, 4) & ~0x01e0; in uli526x_set_phyxcer()
1529 phy_reg |= db->PHY_reg4; in uli526x_set_phyxcer()
1533 case ULI526X_10MHF: phy_reg |= 0x20; break; in uli526x_set_phyxcer()
1534 case ULI526X_10MFD: phy_reg |= 0x40; break; in uli526x_set_phyxcer()
1535 case ULI526X_100MHF: phy_reg |= 0x80; break; in uli526x_set_phyxcer()
1536 case ULI526X_100MFD: phy_reg |= 0x100; break; in uli526x_set_phyxcer()
1542 if ( !(phy_reg & 0x01e0)) { in uli526x_set_phyxcer()
1543 phy_reg|=db->PHY_reg4; in uli526x_set_phyxcer()
1546 phy->write(db, db->phy_addr, 4, phy_reg); in uli526x_set_phyxcer()
[all …]
/openbmc/u-boot/drivers/net/phy/
H A Dcortina.c355 int phy_reg; in get_phy_id() local
358 phy_reg = bus->read(bus, addr, 0, VILLA_GLOBAL_CHIP_ID_LSB); in get_phy_id()
359 if (phy_reg < 0) in get_phy_id()
361 *phy_id = (phy_reg & 0xffff) << 16; in get_phy_id()
363 phy_reg = bus->read(bus, addr, 0, VILLA_GLOBAL_CHIP_ID_MSB); in get_phy_id()
364 if (phy_reg < 0) in get_phy_id()
366 *phy_id |= (phy_reg & 0xffff); in get_phy_id()
375 phy_reg = bus->read(bus, addr, devad, MII_PHYSID1); in get_phy_id()
376 if (phy_reg < 0) in get_phy_id()
378 *phy_id = (phy_reg & 0xffff) << 16; in get_phy_id()
[all …]
H A Dphy.c680 int phy_reg; in get_phy_id() local
686 phy_reg = bus->read(bus, addr, devad, MII_PHYSID1); in get_phy_id()
688 if (phy_reg < 0) in get_phy_id()
691 *phy_id = (phy_reg & 0xffff) << 16; in get_phy_id()
694 phy_reg = bus->read(bus, addr, devad, MII_PHYSID2); in get_phy_id()
696 if (phy_reg < 0) in get_phy_id()
699 *phy_id |= (phy_reg & 0xffff); in get_phy_id()
/openbmc/linux/drivers/clk/hisilicon/
H A Dclk-hix5hd2.c139 u32 phy_reg; member
151 void __iomem *phy_reg; member
180 val = readl_relaxed(clk->phy_reg); in clk_ether_prepare()
183 writel_relaxed(val, clk->phy_reg); in clk_ether_prepare()
188 writel_relaxed(val, clk->phy_reg); in clk_ether_prepare()
193 writel_relaxed(val, clk->phy_reg); in clk_ether_prepare()
223 val = readl_relaxed(clk->phy_reg); in clk_complex_enable()
226 writel_relaxed(val, clk->phy_reg); in clk_complex_enable()
241 val = readl_relaxed(clk->phy_reg); in clk_complex_disable()
244 writel_relaxed(val, clk->phy_reg); in clk_complex_disable()
[all …]
/openbmc/linux/drivers/usb/phy/
H A Dphy-am335x-control.c13 void __iomem *phy_reg; member
84 val = readl(usb_ctrl->phy_reg + reg); in am335x_phy_power()
98 writel(val, usb_ctrl->phy_reg + reg); in am335x_phy_power()
168 ctrl_usb->phy_reg = devm_platform_ioremap_resource_byname(pdev, "phy_ctrl"); in am335x_control_usb_probe()
169 if (IS_ERR(ctrl_usb->phy_reg)) in am335x_control_usb_probe()
170 return PTR_ERR(ctrl_usb->phy_reg); in am335x_control_usb_probe()
/openbmc/u-boot/drivers/usb/host/
H A Dehci-mx6.c74 void __iomem *phy_reg; in usb_internal_phy_clock_gate() local
79 phy_reg = (void __iomem *)phy_bases[index]; in usb_internal_phy_clock_gate()
80 phy_reg += on ? USBPHY_CTRL_CLR : USBPHY_CTRL_SET; in usb_internal_phy_clock_gate()
81 writel(USBPHY_CTRL_CLKGATE, phy_reg); in usb_internal_phy_clock_gate()
130 void __iomem *phy_reg; in usb_phy_enable() local
138 phy_reg = (void __iomem *)phy_bases[index]; in usb_phy_enable()
139 phy_ctrl = (void __iomem *)(phy_reg + USBPHY_CTRL); in usb_phy_enable()
162 writel(0, phy_reg + USBPHY_PWD); in usb_phy_enable()
172 void __iomem *phy_reg; in usb_phy_mode() local
176 phy_reg = (void __iomem *)phy_bases[port]; in usb_phy_mode()
[all …]
H A Dehci-vf.c52 void __iomem *phy_reg; in usb_internal_phy_clock_gate() local
54 phy_reg = (void __iomem *)phy_bases[index]; in usb_internal_phy_clock_gate()
55 clrbits_le32(phy_reg + USBPHY_CTRL, USBPHY_CTRL_CLKGATE); in usb_internal_phy_clock_gate()
86 void __iomem *phy_reg; in usb_phy_enable() local
90 phy_reg = (void __iomem *)phy_bases[index]; in usb_phy_enable()
91 phy_ctrl = (void __iomem *)(phy_reg + USBPHY_CTRL); in usb_phy_enable()
112 writel(0, phy_reg + USBPHY_PWD); in usb_phy_enable()
/openbmc/u-boot/drivers/net/ti/
H A Dcpsw_mdio.c72 int dev_addr, int phy_reg) in cpsw_mdio_read() argument
78 if (phy_reg & ~PHY_REG_MASK || phy_id & ~PHY_ID_MASK) in cpsw_mdio_read()
85 (phy_reg << USERACCESS_PHY_REG_SHIFT) | in cpsw_mdio_read()
98 int phy_reg, u16 data) in cpsw_mdio_write() argument
104 if (phy_reg & ~PHY_REG_MASK || phy_id & ~PHY_ID_MASK) in cpsw_mdio_write()
111 (phy_reg << USERACCESS_PHY_REG_SHIFT) | in cpsw_mdio_write()
/openbmc/linux/drivers/net/
H A Dsungem_phy.c597 u32 phy_reg; in bcm5421_poll_link() local
602 phy_reg = sungem_phy_read(phy, MII_NCONFIG); in bcm5421_poll_link()
604 mode = (phy_reg & BCM5421_MODE_MASK) >> 5; in bcm5421_poll_link()
611 phy_reg = sungem_phy_read(phy, MII_NCONFIG); in bcm5421_poll_link()
613 if (phy_reg & 0x0020) in bcm5421_poll_link()
621 u32 phy_reg; in bcm5421_read_link() local
626 phy_reg = sungem_phy_read(phy, MII_NCONFIG); in bcm5421_read_link()
628 mode = (phy_reg & BCM5421_MODE_MASK ) >> 5; in bcm5421_read_link()
637 phy_reg = sungem_phy_read(phy, MII_NCONFIG); in bcm5421_read_link()
639 if ( (phy_reg & 0x0080) >> 7) in bcm5421_read_link()
[all …]
/openbmc/linux/drivers/net/ethernet/intel/e1000e/
H A Dich8lan.c178 u16 phy_reg = 0; in e1000_phy_is_accessible_pchlan() local
185 ret_val = e1e_rphy_locked(hw, MII_PHYSID1, &phy_reg); in e1000_phy_is_accessible_pchlan()
186 if (ret_val || (phy_reg == 0xFFFF)) in e1000_phy_is_accessible_pchlan()
188 phy_id = (u32)(phy_reg << 16); in e1000_phy_is_accessible_pchlan()
190 ret_val = e1e_rphy_locked(hw, MII_PHYSID2, &phy_reg); in e1000_phy_is_accessible_pchlan()
191 if (ret_val || (phy_reg == 0xFFFF)) { in e1000_phy_is_accessible_pchlan()
195 phy_id |= (u32)(phy_reg & PHY_REVISION_MASK); in e1000_phy_is_accessible_pchlan()
204 hw->phy.revision = (u32)(phy_reg & ~PHY_REVISION_MASK); in e1000_phy_is_accessible_pchlan()
231 e1e_rphy_locked(hw, CV_SMB_CTRL, &phy_reg); in e1000_phy_is_accessible_pchlan()
232 phy_reg &= ~CV_SMB_CTRL_FORCE_SMBUS; in e1000_phy_is_accessible_pchlan()
[all …]
H A Dethtool.c1336 u16 phy_reg = 0; in e1000_integrated_phy_loopback() local
1375 e1e_rphy(hw, PHY_REG(2, 21), &phy_reg); in e1000_integrated_phy_loopback()
1376 phy_reg &= ~0x0007; in e1000_integrated_phy_loopback()
1377 phy_reg |= 0x006; in e1000_integrated_phy_loopback()
1378 e1e_wphy(hw, PHY_REG(2, 21), phy_reg); in e1000_integrated_phy_loopback()
1383 e1e_rphy(hw, PHY_REG(769, 16), &phy_reg); in e1000_integrated_phy_loopback()
1384 e1e_wphy(hw, PHY_REG(769, 16), phy_reg | 0x000C); in e1000_integrated_phy_loopback()
1386 e1e_rphy(hw, PHY_REG(776, 16), &phy_reg); in e1000_integrated_phy_loopback()
1387 e1e_wphy(hw, PHY_REG(776, 16), phy_reg | 0x0040); in e1000_integrated_phy_loopback()
1389 e1e_rphy(hw, PHY_REG(769, 16), &phy_reg); in e1000_integrated_phy_loopback()
[all …]
/openbmc/u-boot/board/freescale/lx2160a/
H A Deth_lx2160ardb.c25 int phy_reg; in get_inphi_phy_id() local
28 phy_reg = bus->read(bus, addr, devad, MII_PHYSID1); in get_inphi_phy_id()
29 phy_id = (phy_reg & 0xffff) << 16; in get_inphi_phy_id()
31 phy_reg = bus->read(bus, addr, devad, MII_PHYSID2); in get_inphi_phy_id()
32 phy_id |= (phy_reg & 0xffff); in get_inphi_phy_id()
/openbmc/linux/drivers/net/ethernet/intel/e1000/
H A De1000_ethtool.c1118 u16 phy_reg; in e1000_phy_reset_clk_and_crs() local
1124 e1000_read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg); in e1000_phy_reset_clk_and_crs()
1125 phy_reg |= M88E1000_EPSCR_TX_CLK_25; in e1000_phy_reset_clk_and_crs()
1126 e1000_write_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, phy_reg); in e1000_phy_reset_clk_and_crs()
1132 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_reg); in e1000_phy_reset_clk_and_crs()
1133 phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX; in e1000_phy_reset_clk_and_crs()
1134 e1000_write_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_reg); in e1000_phy_reset_clk_and_crs()
1141 u16 phy_reg; in e1000_nonintegrated_phy_loopback() local
1155 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_reg); in e1000_nonintegrated_phy_loopback()
1160 phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE; in e1000_nonintegrated_phy_loopback()
[all …]
/openbmc/linux/drivers/net/ethernet/realtek/
H A Dr8169_phy_config.c53 struct phy_reg { struct
59 const struct phy_reg *regs, int len) in __rtl_writephy_batch() argument
111 static const struct phy_reg phy_reg_init[] = { in rtl8169s_hw_phy_config()
185 static const struct phy_reg phy_reg_init[] = { in rtl8169scd_hw_phy_config()
231 static const struct phy_reg phy_reg_init[] = { in rtl8169sce_hw_phy_config()
315 static const struct phy_reg phy_reg_init[] = { in rtl8168c_1_hw_phy_config()
344 static const struct phy_reg phy_reg_init[] = { in rtl8168c_2_hw_phy_config()
372 static const struct phy_reg phy_reg_init[] = { in rtl8168c_3_hw_phy_config()
391 static const struct phy_reg rtl8168d_1_phy_reg_init_0[] = {
541 static const struct phy_reg phy_reg_init[] = { in rtl8168e_1_hw_phy_config()
[all …]
/openbmc/linux/drivers/net/ethernet/mellanox/mlxbf_gige/
H A Dmlxbf_gige_mdio.c189 int phy_reg, u32 opcode) in mlxbf_gige_mdio_create_cmd() argument
195 gw_reg |= ((phy_reg << mdio_gw->devad.shift) & in mlxbf_gige_mdio_create_cmd()
209 static int mlxbf_gige_mdio_read(struct mii_bus *bus, int phy_add, int phy_reg) in mlxbf_gige_mdio_read() argument
217 cmd = mlxbf_gige_mdio_create_cmd(priv->mdio_gw, 0, phy_add, phy_reg, in mlxbf_gige_mdio_read()
242 int phy_reg, u16 val) in mlxbf_gige_mdio_write() argument
250 cmd = mlxbf_gige_mdio_create_cmd(priv->mdio_gw, val, phy_add, phy_reg, in mlxbf_gige_mdio_write()
/openbmc/u-boot/drivers/net/
H A Darmada100_fec.c60 int phy_reg) in smi_reg_read() argument
68 if (phy_addr == PHY_ADR_REQ && phy_reg == PHY_ADR_REQ) { in smi_reg_read()
80 if (phy_reg > PHY_MASK) { in smi_reg_read()
82 __func__, phy_reg); in smi_reg_read()
92 writel((phy_addr << 16) | (phy_reg << 21) | SMI_OP_R, &regs->smi); in smi_reg_read()
108 int phy_reg, u16 value) in smi_reg_write() argument
114 if (phy_addr == PHY_ADR_REQ && phy_reg == PHY_ADR_REQ) { in smi_reg_write()
124 if (phy_reg > PHY_MASK) { in smi_reg_write()
135 writel((phy_addr << 16) | (phy_reg << 21) | SMI_OP_W | (value & 0xffff), in smi_reg_write()
H A Duli526x.c775 u16 phy_reg; in uli526x_set_phyxcer() local
778 phy_reg = uli_phy_read(db->ioaddr, in uli526x_set_phyxcer()
783 phy_reg |= db->PHY_reg4; in uli526x_set_phyxcer()
787 case ULI526X_10MHF: phy_reg |= 0x20; break; in uli526x_set_phyxcer()
788 case ULI526X_10MFD: phy_reg |= 0x40; break; in uli526x_set_phyxcer()
789 case ULI526X_100MHF: phy_reg |= 0x80; break; in uli526x_set_phyxcer()
790 case ULI526X_100MFD: phy_reg |= 0x100; break; in uli526x_set_phyxcer()
796 if (!(phy_reg & 0x01e0)) { in uli526x_set_phyxcer()
797 phy_reg |= db->PHY_reg4; in uli526x_set_phyxcer()
800 uli_phy_write(db->ioaddr, db->phy_addr, 4, phy_reg, db->chip_id); in uli526x_set_phyxcer()
/openbmc/linux/drivers/net/phy/
H A Dphy_device.c756 int phy_reg; in get_phy_c45_devs_in_pkg() local
758 phy_reg = mdiobus_c45_read(bus, addr, dev_addr, MDIO_DEVS2); in get_phy_c45_devs_in_pkg()
759 if (phy_reg < 0) in get_phy_c45_devs_in_pkg()
761 *devices_in_package = phy_reg << 16; in get_phy_c45_devs_in_pkg()
763 phy_reg = mdiobus_c45_read(bus, addr, dev_addr, MDIO_DEVS1); in get_phy_c45_devs_in_pkg()
764 if (phy_reg < 0) in get_phy_c45_devs_in_pkg()
766 *devices_in_package |= phy_reg; in get_phy_c45_devs_in_pkg()
789 int i, ret, phy_reg; in get_phy_c45_ids() local
810 phy_reg = get_phy_c45_devs_in_pkg(bus, addr, i, &devs_in_pkg); in get_phy_c45_ids()
811 if (phy_reg < 0) in get_phy_c45_ids()
[all …]
/openbmc/linux/drivers/net/usb/
H A Dsr9800.c372 int phy_reg; in sr_get_phyid() local
378 phy_reg = sr_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1); in sr_get_phyid()
379 if (phy_reg != 0 && phy_reg != 0xFFFF) in sr_get_phyid()
384 if (phy_reg <= 0 || phy_reg == 0xFFFF) in sr_get_phyid()
387 phy_id = (phy_reg & 0xffff) << 16; in sr_get_phyid()
389 phy_reg = sr_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2); in sr_get_phyid()
390 if (phy_reg < 0) in sr_get_phyid()
393 phy_id |= (phy_reg & 0xffff); in sr_get_phyid()
H A Dasix_devices.c72 int phy_reg; in asix_get_phyid() local
78 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1); in asix_get_phyid()
79 if (phy_reg < 0) in asix_get_phyid()
81 if (phy_reg != 0 && phy_reg != 0xFFFF) in asix_get_phyid()
86 if (phy_reg <= 0 || phy_reg == 0xFFFF) in asix_get_phyid()
89 phy_id = (phy_reg & 0xffff) << 16; in asix_get_phyid()
91 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2); in asix_get_phyid()
92 if (phy_reg < 0) in asix_get_phyid()
95 phy_id |= (phy_reg & 0xffff); in asix_get_phyid()
/openbmc/qemu/hw/net/
H A De1000.c91 uint16_t phy_reg[0x20]; member
161 e1000x_update_regs_on_link_up(s->mac_reg, s->phy_reg); in DECLARE_OBJ_CHECKERS()
170 e1000x_update_regs_on_autoneg_done(s->mac_reg, s->phy_reg); in e1000_autoneg_done()
179 return (s->phy_reg[MII_BMCR] & MII_BMCR_AUTOEN); in have_autoneg()
186 s->phy_reg[MII_BMCR] = val & ~(0x3f | in set_phy_ctrl()
196 e1000x_restart_autoneg(s->mac_reg, s->phy_reg, s->autoneg_timer); in set_phy_ctrl()
388 memset(d->phy_reg, 0, sizeof d->phy_reg); in e1000_reset_hold()
389 memcpy(d->phy_reg, phy_reg_init, sizeof phy_reg_init); in e1000_reset_hold()
390 d->phy_reg[MII_PHYID2] = edc->phy_id2; in e1000_reset_hold()
397 e1000x_update_regs_on_link_down(d->mac_reg, d->phy_reg); in e1000_reset_hold()
[all …]
/openbmc/linux/drivers/net/ethernet/ti/
H A Ddavinci_mdio.c408 static int davinci_mdio_read(struct mii_bus *bus, int phy_id, int phy_reg) in davinci_mdio_read() argument
414 if (phy_reg & ~PHY_REG_MASK || phy_id & ~PHY_ID_MASK) in davinci_mdio_read()
421 reg = (USERACCESS_GO | USERACCESS_READ | (phy_reg << 21) | in davinci_mdio_read()
450 int phy_reg, u16 phy_data) in davinci_mdio_write() argument
456 if (phy_reg & ~PHY_REG_MASK || phy_id & ~PHY_ID_MASK) in davinci_mdio_write()
463 reg = (USERACCESS_GO | USERACCESS_WRITE | (phy_reg << 21) | in davinci_mdio_write()
/openbmc/linux/drivers/net/ieee802154/
H A Dmcr20a.c1083 unsigned int phy_reg = 0; in mcr20a_phy_init() local
1165 phy_reg = (u8)(((index & DAR_SRC_CTRL_INDEX) << in mcr20a_phy_init()
1169 ret = regmap_write(lp->regmap_dar, DAR_SRC_CTRL, phy_reg); in mcr20a_phy_init()
1172 phy_reg = 0; in mcr20a_phy_init()
1176 ret = regmap_read(lp->regmap_iar, IAR_DUAL_PAN_CTRL, &phy_reg); in mcr20a_phy_init()
1181 phy_reg &= ~IAR_DUAL_PAN_CTRL_DUAL_PAN_SAM_LVL_MSK; in mcr20a_phy_init()
1184 phy_reg |= MCR20A_PHY_INDIRECT_QUEUE_SIZE << in mcr20a_phy_init()
1186 ret = regmap_write(lp->regmap_iar, IAR_DUAL_PAN_CTRL, phy_reg); in mcr20a_phy_init()

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