/openbmc/linux/drivers/net/phy/ |
H A D | phy-c45.c | 22 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_EXTABLE); in genphy_c45_baset1_able() 40 stat1 = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_STAT1); in genphy_c45_pma_can_sleep() 117 ctrl1 = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL1); in genphy_c45_pma_setup_forced() 121 ctrl2 = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_CTRL2); in genphy_c45_pma_setup_forced() 369 ret = phy_read_mmd(phydev, MDIO_MMD_AN, reg); in genphy_c45_check_and_restart_aneg() 403 val = phy_read_mmd(phydev, MDIO_MMD_AN, reg); in genphy_c45_aneg_done() 424 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1); in genphy_c45_read_link() 447 val = phy_read_mmd(phydev, devad, MDIO_STAT1); in genphy_c45_read_link() 454 val = phy_read_mmd(phydev, devad, MDIO_STAT1); in genphy_c45_read_link() 477 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_T1_STAT); in genphy_c45_baset1_read_lpa() [all …]
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H A D | marvell-88q2xxx.c | 55 ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_MMD_AN_MV_STAT); in mv88q2xxx_read_link_gbit() 66 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_1000BT1_STAT); in mv88q2xxx_read_link_gbit() 74 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_PCS_1000BT1_STAT); in mv88q2xxx_read_link_gbit() 98 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_MMD_PCS_MV_100BT1_STAT1); in mv88q2xxx_read_link_100m() 105 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_MMD_PCS_MV_100BT1_STAT1); in mv88q2xxx_read_link_100m() 211 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, 0x8230); in mv88q2xxxx_get_sqi() 225 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, 0xfc88); in mv88q2xxxx_get_sqi()
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H A D | bcm87xx.c | 60 val = phy_read_mmd(phydev, devid, reg); in bcm87xx_of_reg_init() 106 rx_signal_detect = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, in bcm87xx_read_status() 114 pcs_status = phy_read_mmd(phydev, MDIO_MMD_PCS, in bcm87xx_read_status() 122 xgxs_lane_status = phy_read_mmd(phydev, MDIO_MMD_PHYXS, in bcm87xx_read_status() 144 reg = phy_read_mmd(phydev, MDIO_MMD_PCS, BCM87XX_LASI_CONTROL); in bcm87xx_config_intr() 150 err = phy_read_mmd(phydev, MDIO_MMD_PCS, BCM87XX_LASI_STATUS); in bcm87xx_config_intr() 164 err = phy_read_mmd(phydev, MDIO_MMD_PCS, BCM87XX_LASI_STATUS); in bcm87xx_config_intr()
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H A D | bcm84881.c | 117 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in bcm84881_aneg_done() 121 bmsr = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_C22 + MII_BMSR); in bcm84881_aneg_done() 134 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_CTRL1); in bcm84881_read_status() 143 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in bcm84881_read_status() 147 bmsr = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_C22 + MII_BMSR); in bcm84881_read_status() 173 val = phy_read_mmd(phydev, MDIO_MMD_AN, in bcm84881_read_status() 197 val = phy_read_mmd(phydev, MDIO_MMD_VEND1, 0x4011); in bcm84881_read_status()
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H A D | teranetics.c | 39 if (!phy_read_mmd(phydev, MDIO_MMD_VEND1, 93)) in teranetics_aneg_done() 54 if (!phy_read_mmd(phydev, MDIO_MMD_VEND1, 93)) { in teranetics_read_status() 55 reg = phy_read_mmd(phydev, MDIO_MMD_PHYXS, MDIO_PHYXS_LNSTAT); in teranetics_read_status() 62 reg = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_STAT1); in teranetics_read_status()
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H A D | aquantia_main.c | 202 val = phy_read_mmd(phydev, MDIO_MMD_C22EXT, stat->reg); in aqr107_get_stat() 208 val = phy_read_mmd(phydev, MDIO_MMD_C22EXT, stat->reg + 1); in aqr107_get_stat() 293 err = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_TX_VEND_INT_STATUS2); in aqr_config_intr() 316 err = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_TX_VEND_INT_STATUS2); in aqr_config_intr() 328 irq_status = phy_read_mmd(phydev, MDIO_MMD_AN, in aqr_handle_interrupt() 348 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_RX_LP_STAT1); in aqr_read_status() 368 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_TX_VEND_STATUS1); in aqr107_read_rate() 407 val = phy_read_mmd(phydev, MDIO_MMD_VEND1, config_reg); in aqr107_read_rate() 431 val = phy_read_mmd(phydev, MDIO_MMD_PHYXS, MDIO_PHYXS_VEND_IF_STATUS); in aqr107_read_status() 473 val = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_VEND_PROV); in aqr107_get_downshift() [all …]
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H A D | marvell10g.c | 188 return phy_read_mmd(phydev, MDIO_MMD_VEND2, MV_V2_TEMP); in mv3310_hwmon_read_temp_reg() 193 return phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_TEMP); in mv2110_hwmon_read_temp_reg() 369 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_DSC1); in mv3310_get_downshift() 430 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_PCS_CSCR1); in mv3310_get_edpd() 513 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MV_PMA_BOOT); in mv3310_probe() 529 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MV_PMA_FW_VER0); in mv3310_probe() 535 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MV_PMA_FW_VER1); in mv3310_probe() 604 mactype = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MV_PMA_21X0_PORT_CTRL); in mv2110_get_mactype() 658 mactype = phy_read_mmd(phydev, MDIO_MMD_VEND2, MV_V2_PORT_CTRL); in mv3310_get_mactype() 834 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, in mv3310_get_features() [all …]
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H A D | dp83tc811.c | 120 value = phy_read_mmd(phydev, DP83811_DEVADDR, in dp83811_set_wol() 166 value = phy_read_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG); in dp83811_get_wol() 172 sopass_val = phy_read_mmd(phydev, DP83811_DEVADDR, in dp83811_get_wol() 177 sopass_val = phy_read_mmd(phydev, DP83811_DEVADDR, in dp83811_get_wol() 182 sopass_val = phy_read_mmd(phydev, DP83811_DEVADDR, in dp83811_get_wol() 369 value = phy_read_mmd(phydev, DP83811_DEVADDR, MII_DP83811_WOL_CFG); in dp83811_suspend()
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H A D | microchip_t1s.c | 109 return phy_read_mmd(phydev, MDIO_MMD_VEND2, LAN865X_REG_CFGPARAM_DATA); in lan865x_revb0_indirect_read() 138 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, in lan865x_read_cfg_params() 223 err = phy_read_mmd(phydev, MDIO_MMD_VEND2, LAN867X_REG_STS2); in lan867x_revb1_config_init() 229 err = phy_read_mmd(phydev, MDIO_MMD_VEND2, LAN867X_REG_STS2); in lan867x_revb1_config_init()
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H A D | dp83822.c | 146 value = phy_read_mmd(phydev, DP83822_DEVADDR, in dp83822_set_wol() 191 value = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG); in dp83822_get_wol() 197 sopass_val = phy_read_mmd(phydev, DP83822_DEVADDR, in dp83822_get_wol() 202 sopass_val = phy_read_mmd(phydev, DP83822_DEVADDR, in dp83822_get_wol() 207 sopass_val = phy_read_mmd(phydev, DP83822_DEVADDR, in dp83822_get_wol() 528 val = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_SOR1); in dp83822_read_straps() 577 value = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG); in dp83822_suspend() 591 value = phy_read_mmd(phydev, DP83822_DEVADDR, MII_DP83822_WOL_CFG); in dp83822_resume()
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H A D | dp83867.c | 198 val_rxcfg = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RXFCFG); in dp83867_set_wol() 266 value = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RXFCFG); in dp83867_get_wol() 278 sopass_val = phy_read_mmd(phydev, DP83867_DEVADDR, in dp83867_get_wol() 283 sopass_val = phy_read_mmd(phydev, DP83867_DEVADDR, in dp83867_get_wol() 288 sopass_val = phy_read_mmd(phydev, DP83867_DEVADDR, in dp83867_get_wol() 499 const u16 val = phy_read_mmd(phydev, DP83867_DEVADDR, in dp83867_verify_rgmii_cfg() 682 delay = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIIDCTL); in dp83867_of_init() 763 bs = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_STRAP_STS2); in dp83867_config_init() 813 bs = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_STRAP_STS1); in dp83867_config_init() 828 val = phy_read_mmd(phydev, DP83867_DEVADDR, DP83867_RGMIICTL); in dp83867_config_init() [all …]
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H A D | adin1100.c | 78 ret = phy_read_mmd(phydev, MDIO_MMD_AN, ADIN_AN_PHY_INST_STATUS); in adin_read_status() 196 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_10T1L_STAT); in adin_get_features() 230 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_STAT1); in adin_get_sqi() 236 ret = phy_read_mmd(phydev, MDIO_STAT1, ADIN_MSE_VAL); in adin_get_sqi()
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H A D | nxp-c45-tja11xx.c | 328 ret = phy_read_mmd(phydev, reg_field->devad, reg_field->reg); in nxp_c45_read_reg_field() 397 ts->tv_nsec = phy_read_mmd(priv->phydev, MDIO_MMD_VEND1, in _nxp_c45_ptp_gettimex64() 399 ts->tv_nsec |= phy_read_mmd(priv->phydev, MDIO_MMD_VEND1, in _nxp_c45_ptp_gettimex64() 401 ts->tv_sec = phy_read_mmd(priv->phydev, MDIO_MMD_VEND1, in _nxp_c45_ptp_gettimex64() 403 ts->tv_sec |= phy_read_mmd(priv->phydev, MDIO_MMD_VEND1, in _nxp_c45_ptp_gettimex64() 523 extts->tv_nsec = phy_read_mmd(priv->phydev, MDIO_MMD_VEND1, in nxp_c45_get_extts() 525 extts->tv_nsec |= phy_read_mmd(priv->phydev, MDIO_MMD_VEND1, in nxp_c45_get_extts() 527 extts->tv_sec = phy_read_mmd(priv->phydev, MDIO_MMD_VEND1, in nxp_c45_get_extts() 529 extts->tv_sec |= phy_read_mmd(priv->phydev, MDIO_MMD_VEND1, in nxp_c45_get_extts() 542 reg = phy_read_mmd(phydev, MDIO_MMD_VEND1, in tja1120_extts_is_valid() [all …]
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H A D | dp83td510.c | 93 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_INTERRUPT_REG_1); in dp83td510_handle_interrupt() 140 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, in dp83td510_read_status() 183 ret = phy_read_mmd(phydev, MDIO_MMD_VEND2, DP83TD510E_MSE_DETECT); in dp83td510_get_sqi()
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H A D | marvell-88x2222.c | 309 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_STAT1); in mv2222_aneg_done() 317 ret = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_STAT); in mv2222_aneg_done() 330 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MDIO_STAT1); in mv2222_read_status_10g() 366 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_STAT); in mv2222_read_status_1g() 392 val = phy_read_mmd(phydev, MDIO_MMD_PCS, MV_1GBX_PHY_STAT); in mv2222_read_status_1g() 418 val = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MV_RX_SIGNAL_DETECT); in mv2222_link_is_operational()
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H A D | adin.c | 264 reg = phy_read_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_GE_RGMII_CFG_REG); in adin_config_rgmii_mode() 310 reg = phy_read_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_GE_RMII_CFG_REG); in adin_config_rmii_mode() 736 rc = phy_read_mmd(phydev, MDIO_MMD_VEND1, in adin_soft_reset() 763 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, stat->reg1); in adin_read_mmd_stat_regs() 772 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, stat->reg2); in adin_read_mmd_stat_regs() 880 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, in adin_cable_test_report_pair() 891 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, in adin_cable_test_report_pair() 927 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_CDIAG_RUN); in adin_cable_test_get_status()
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H A D | dp83869.c | 253 val_rxcfg = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG); in dp83869_set_wol() 349 value = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RXFCFG); in dp83869_get_wol() 365 sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR, in dp83869_get_wol() 375 sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR, in dp83869_get_wol() 385 sopass_val = phy_read_mmd(phydev, DP83869_DEVADDR, in dp83869_get_wol() 514 val = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_STRAP_STS1); in dp83869_set_strapped_mode() 567 ret = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_STRAP_STS1); in dp83869_of_init() 831 val = phy_read_mmd(phydev, DP83869_DEVADDR, DP83869_RGMIICTL); in dp83869_config_init()
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H A D | micrel.c | 958 newval = phy_read_mmd(phydev, 2, reg); in ksz9031_of_load_skew_values() 998 reg = phy_read_mmd(phydev, 0x1C, MII_KSZ9031RN_EDPD); in ksz9031_enable_edpd() 1200 newval = phy_read_mmd(phydev, 2, reg); in ksz9131_of_load_skew_values() 1270 reg = phy_read_mmd(phydev, 2, 0); in ksz9131_led_errata() 3502 ret = phy_read_mmd(phydev, KSZ9131RN_MMD_COMMON_CTRL_REG, in lan8841_config_init() 3588 *nsec = phy_read_mmd(phydev, 2, LAN8841_PTP_TX_EGRESS_NS_HI); in lan8841_ptp_get_tx_ts() 3593 *nsec = *nsec | phy_read_mmd(phydev, 2, LAN8841_PTP_TX_EGRESS_NS_LO); in lan8841_ptp_get_tx_ts() 3595 *sec = phy_read_mmd(phydev, 2, LAN8841_PTP_TX_EGRESS_SEC_HI); in lan8841_ptp_get_tx_ts() 3597 *sec = *sec | phy_read_mmd(phydev, 2, LAN8841_PTP_TX_EGRESS_SEC_LO); in lan8841_ptp_get_tx_ts() 3599 *seq = phy_read_mmd(phydev, 2, LAN8841_PTP_TX_MSG_HEADER2); in lan8841_ptp_get_tx_ts() [all …]
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H A D | microchip.c | 266 priv->chip_id = phy_read_mmd(phydev, 3, LAN88XX_MMD3_CHIP_ID); in lan88xx_probe() 267 priv->chip_rev = phy_read_mmd(phydev, 3, LAN88XX_MMD3_CHIP_REV); in lan88xx_probe() 325 val = phy_read_mmd(phydev, MDIO_MMD_PCS, in lan88xx_config_init()
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H A D | aquantia_hwmon.c | 58 int temp = phy_read_mmd(phydev, MDIO_MMD_VEND1, reg); in aqr_hwmon_get() 84 int val = phy_read_mmd(phydev, MDIO_MMD_VEND1, reg); in aqr_hwmon_test_bit()
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H A D | mxl-gpy.c | 167 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_TEMP_STA); in gpy_hwmon_read() 266 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_MBOX_DATA); in gpy_mbox_read() 361 ret = phy_read_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_SGMII_CTRL); in gpy_sgmii_aneg_en() 499 ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, PHY_PMA_MGBT_POLARITY); in gpy_update_mdix()
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H A D | bcm-phy-lib.c | 377 val = phy_read_mmd(phydev, MDIO_MMD_AN, BRCM_CL45VEN_EEE_CONTROL); in bcm_phy_set_eee() 389 val = phy_read_mmd(phydev, MDIO_MMD_AN, BCM_CL45VEN_EEE_ADV); in bcm_phy_set_eee() 544 val = phy_read_mmd(phydev, stat.devad, stat.reg); in bcm_phy_get_stat()
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H A D | at803x.c | 555 val = phy_read_mmd(phydev, MDIO_MMD_PCS, stat.reg); in at803x_get_stat() 1811 ret = phy_read_mmd(phydev, MDIO_MMD_AN, MDIO_AN_10GBT_STAT); in qca808x_read_status() 1916 val = phy_read_mmd(phydev, MDIO_MMD_PCS, cdt_length_reg); in qca808x_cdt_fault_length() 1979 val = phy_read_mmd(phydev, MDIO_MMD_PCS, QCA808X_MMD3_CDT_STATUS); in qca808x_cable_test_get_status() 2033 ret = phy_read_mmd(phydev, MDIO_MMD_AN, QCA808X_PHY_MMD7_CHIP_TYPE); in qca808x_get_features()
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H A D | smsc.c | 304 rc = phy_read_mmd(phydev, MDIO_MMD_PCS, MII_LAN874X_PHY_MMD_WOL_WUCSR); in lan874x_get_wol() 424 rc = phy_read_mmd(phydev, MDIO_MMD_PCS, MII_LAN874X_PHY_MMD_WOL_WUCSR); in lan874x_set_wol()
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H A D | phy-core.c | 586 int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum) in phy_read_mmd() function 596 EXPORT_SYMBOL(phy_read_mmd);
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