| /openbmc/qemu/hw/intc/ |
| H A D | arm_gicv3_its_kvm.c | 41 ResettablePhases parent_phases; member
206 if (c->parent_phases.hold) { in kvm_arm_its_reset_hold()
207 c->parent_phases.hold(obj, type); in kvm_arm_its_reset_hold()
253 &ic->parent_phases); in kvm_arm_its_class_init()
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| H A D | arm_gic_kvm.c | 41 ResettablePhases parent_phases; member
481 if (kgc->parent_phases.hold) { in kvm_arm_gic_reset_hold()
482 kgc->parent_phases.hold(obj, type); in kvm_arm_gic_reset_hold()
599 &kgc->parent_phases); in kvm_arm_gic_class_init()
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| /openbmc/qemu/target/tricore/ |
| H A D | cpu.c | 66 if (tcc->parent_phases.hold) { in tricore_cpu_reset_hold()
67 tcc->parent_phases.hold(obj, type); in tricore_cpu_reset_hold()
192 &mcc->parent_phases); in tricore_cpu_class_init()
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| /openbmc/qemu/target/rx/ |
| H A D | cpu.c | 80 if (rcc->parent_phases.hold) { in rx_cpu_reset_hold()
81 rcc->parent_phases.hold(obj, type); in rx_cpu_reset_hold()
217 &rcc->parent_phases); in rx_cpu_class_init()
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| /openbmc/qemu/target/xtensa/ |
| H A D | cpu.c | 104 if (xcc->parent_phases.hold) { in xtensa_cpu_reset_hold()
105 xcc->parent_phases.hold(obj, type); in xtensa_cpu_reset_hold()
256 &xcc->parent_phases); in xtensa_cpu_class_init()
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| /openbmc/qemu/hw/display/ |
| H A D | virtio-vga.c | 189 if (klass->parent_phases.hold) { in virtio_vga_base_reset_hold()
190 klass->parent_phases.hold(obj, type); in virtio_vga_base_reset_hold()
230 NULL, &v->parent_phases); in virtio_vga_base_class_init()
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| H A D | virtio-vga.h | 26 ResettablePhases parent_phases; member
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| /openbmc/qemu/hw/pci-bridge/ |
| H A D | cxl_root_port.c | 195 if (rpc->parent_phases.hold) { in cxl_rp_reset_hold()
196 rpc->parent_phases.hold(obj, type); in cxl_rp_reset_hold()
282 &rpc->parent_phases); in cxl_root_port_class_init()
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| /openbmc/qemu/target/sh4/ |
| H A D | cpu.c | 112 if (scc->parent_phases.hold) { in superh_cpu_reset_hold()
113 scc->parent_phases.hold(obj, type); in superh_cpu_reset_hold()
275 &scc->parent_phases); in superh_cpu_class_init()
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| /openbmc/qemu/target/openrisc/ |
| H A D | cpu.c | 94 if (occ->parent_phases.hold) { in openrisc_cpu_reset_hold()
95 occ->parent_phases.hold(obj, type); in openrisc_cpu_reset_hold()
257 &occ->parent_phases); in openrisc_cpu_class_init()
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| /openbmc/qemu/hw/pci-host/ |
| H A D | pnv_phb3_msi.c | 235 if (icsc->parent_phases.hold) { in phb3_msi_reset_hold()
236 icsc->parent_phases.hold(obj, type); in phb3_msi_reset_hold()
296 &isc->parent_phases); in phb3_msi_class_init()
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| H A D | pnv_phb.c | 218 if (rpc->parent_phases.hold) { in pnv_phb_root_port_reset_hold()
219 rpc->parent_phases.hold(obj, type); in pnv_phb_root_port_reset_hold()
324 NULL, &rpc->parent_phases); in pnv_phb_root_port_class_init()
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| /openbmc/qemu/target/s390x/ |
| H A D | cpu.c | 173 if (scc->parent_phases.hold) { in s390_cpu_reset_hold()
174 scc->parent_phases.hold(obj, type); in s390_cpu_reset_hold()
390 &scc->parent_phases); in s390_cpu_class_init()
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| /openbmc/qemu/target/hexagon/ |
| H A D | cpu.c | 283 if (mcc->parent_phases.hold) { in hexagon_cpu_reset_hold()
284 mcc->parent_phases.hold(obj, type); in hexagon_cpu_reset_hold()
342 &mcc->parent_phases); in hexagon_cpu_class_init()
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| /openbmc/qemu/target/avr/ |
| H A D | cpu.c | 76 if (mcc->parent_phases.hold) { in avr_cpu_reset_hold()
77 mcc->parent_phases.hold(obj, type); in avr_cpu_reset_hold()
230 &mcc->parent_phases); in avr_cpu_class_init()
|
| /openbmc/qemu/docs/devel/ |
| H A D | reset.rst | 177 if (myclass->parent_phases.enter) {
178 myclass->parent_phases.enter(obj, type);
189 if (myclass->parent_phases.hold) {
190 myclass->parent_phases.hold(obj, type);
201 if (myclass->parent_phases.exit) {
202 myclass->parent_phases.exit(obj, type);
211 ResettablePhases parent_phases;
222 &myclass->parent_phases);
231 &myclass->parent_phases);
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| /openbmc/qemu/hw/core/ |
| H A D | resettable.c | 253 ResettablePhases *parent_phases) in resettable_class_set_parent_phases() argument
255 *parent_phases = rc->phases; in resettable_class_set_parent_phases()
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| /openbmc/qemu/hw/s390x/ |
| H A D | virtio-ccw.h | 60 ResettablePhases parent_phases; member
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| /openbmc/qemu/hw/misc/ |
| H A D | mac_via.c | 1211 if (mdc->parent_phases.hold) { in mos6522_q800_via1_reset_hold()
1212 mdc->parent_phases.hold(obj, type); in mos6522_q800_via1_reset_hold()
1338 NULL, &mdc->parent_phases); in mos6522_q800_via1_class_init()
1365 if (mdc->parent_phases.hold) { in mos6522_q800_via2_reset_hold()
1366 mdc->parent_phases.hold(obj, type); in mos6522_q800_via2_reset_hold()
1426 NULL, &mdc->parent_phases); in mos6522_q800_via2_class_init()
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| /openbmc/qemu/target/microblaze/ |
| H A D | cpu.c | 192 if (mcc->parent_phases.hold) { in mb_cpu_reset_hold()
193 mcc->parent_phases.hold(obj, type); in mb_cpu_reset_hold()
447 &mcc->parent_phases); in mb_cpu_class_init()
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| /openbmc/qemu/include/hw/pci/ |
| H A D | pcie_port.h | 86 ResettablePhases parent_phases; member
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| /openbmc/qemu/include/hw/arm/ |
| H A D | smmuv3.h | 81 ResettablePhases parent_phases; member
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| /openbmc/qemu/hw/input/ |
| H A D | ps2.c | 1058 if (ps2dc->parent_phases.hold) { in ps2_kbd_reset_hold()
1059 ps2dc->parent_phases.hold(obj, type); in ps2_kbd_reset_hold()
1075 if (ps2dc->parent_phases.hold) { in ps2_mouse_reset_hold()
1076 ps2dc->parent_phases.hold(obj, type); in ps2_mouse_reset_hold()
1265 &ps2dc->parent_phases); in ps2_kbd_class_init()
1284 &ps2dc->parent_phases); in ps2_mouse_class_init()
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| /openbmc/qemu/include/hw/ |
| H A D | resettable.h | 236 ResettablePhases *parent_phases);
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| /openbmc/qemu/include/hw/input/ |
| H A D | ps2.h | 39 ResettablePhases parent_phases; member
|