Home
last modified time | relevance | path

Searched refs:num_irq (Results 1 – 25 of 39) sorted by relevance

12

/openbmc/qemu/hw/intc/
H A Darm_gic_kvm.c44 void kvm_arm_gic_set_irq(uint32_t num_irq, int irq, int level) in kvm_arm_gic_set_irq() argument
57 if (irq < (num_irq - GIC_INTERNAL)) { in kvm_arm_gic_set_irq()
68 irq -= (num_irq - GIC_INTERNAL); in kvm_arm_gic_set_irq()
79 kvm_arm_gic_set_irq(s->num_irq, irq, level); in kvm_arm_gicv2_set_irq()
294 int num_irq; in kvm_arm_gic_put() local
310 num_irq = ((reg & 0x1f) + 1) * 32; in kvm_arm_gic_put()
313 if (num_irq < s->num_irq) { in kvm_arm_gic_put()
315 s->num_irq, num_irq); in kvm_arm_gic_put()
327 kvm_dist_put(s, 0x180, 1, s->num_irq, translate_clear); in kvm_arm_gic_put()
328 kvm_dist_put(s, 0x100, 1, s->num_irq, translate_enabled); in kvm_arm_gic_put()
[all …]
H A Dmips_gic.c31 for (i = 0; i < gic->num_irq; i++) { in mips_gic_set_vp_irq()
140 OFFSET_CHECK((base + size * 8) <= gic->num_irq); in gic_read()
148 OFFSET_CHECK((base + size * 8) <= gic->num_irq); in gic_read()
156 OFFSET_CHECK(irq_src < gic->num_irq); in gic_read()
162 OFFSET_CHECK(irq_src < gic->num_irq); in gic_read()
292 OFFSET_CHECK((base + size * 8) <= gic->num_irq); in gic_write()
302 OFFSET_CHECK(intr < gic->num_irq); in gic_write()
312 OFFSET_CHECK((base + size * 8) <= gic->num_irq); in gic_write()
321 OFFSET_CHECK(irq_src < gic->num_irq); in gic_write()
329 OFFSET_CHECK(irq_src < gic->num_irq); in gic_write()
[all …]
H A Darm_gicv3_dist.c86 if (irq < GIC_INTERNAL || irq >= s->num_irq) { in gicd_ns_access()
107 if (irq < GIC_INTERNAL || irq >= s->num_irq) { in gicd_write_bitmap_reg()
131 if (irq < GIC_INTERNAL || irq >= s->num_irq) { in gicd_write_set_bitmap_reg()
155 if (irq < GIC_INTERNAL || irq >= s->num_irq) { in gicd_write_clear_bitmap_reg()
179 if (irq < GIC_INTERNAL || irq >= s->num_irq) { in gicd_read_bitmap_reg()
204 if (irq < GIC_INTERNAL || irq >= s->num_irq) { in gicd_read_ipriorityr()
228 if (irq < GIC_INTERNAL || irq >= s->num_irq) { in gicd_write_ipriorityr()
248 if (irq < GIC_INTERNAL || irq >= s->num_irq) { in gicd_read_irouter()
270 if (irq < GIC_INTERNAL || irq >= s->num_irq) { in gicd_write_irouter()
337 if (irq < GIC_INTERNAL || irq >= s->num_irq) { in gicd_writeb()
[all …]
H A Darm_gic_common.c136 int i = s->num_irq - GIC_INTERNAL; in gic_init_irqs_and_mmio()
192 int num_irq = s->num_irq; in arm_gic_common_realize() local
199 if (s->num_irq > GIC_MAXIRQ) { in arm_gic_common_realize()
202 num_irq, GIC_MAXIRQ); in arm_gic_common_realize()
209 if (s->num_irq < 32 || (s->num_irq % 32)) { in arm_gic_common_realize()
212 num_irq); in arm_gic_common_realize()
353 DEFINE_PROP_UINT32("num-irq", GICState, num_irq, 32),
H A Darm_gicv3_kvm.c87 kvm_arm_gic_set_irq(s->num_irq, irq, level); in kvm_arm_gicv3_set_irq()
147 for_each_dist_irq_reg(irq, s->num_irq, 8) { in kvm_dist_get_priority()
168 for_each_dist_irq_reg(irq, s->num_irq, 8) { in kvm_dist_put_priority()
190 for_each_dist_irq_reg(irq, s->num_irq, 2) { in kvm_dist_get_edge_trigger()
215 for_each_dist_irq_reg(irq, s->num_irq, 2) { in kvm_dist_put_edge_trigger()
233 for_each_dist_irq_reg(irq, s->num_irq, 1) { in kvm_gic_get_line_level_bmp()
244 for_each_dist_irq_reg(irq, s->num_irq, 1) { in kvm_gic_put_line_level_bmp()
265 for_each_dist_irq_reg(irq, s->num_irq, 1) { in kvm_dist_getbmp()
291 for_each_dist_irq_reg(irq, s->num_irq, 1) { in kvm_dist_putbmp()
310 uint32_t num_irq; in kvm_arm_gicv3_check() local
[all …]
H A Darmv7m_nvic.c110 for (irq = ARMV7M_EXCP_RESET; irq < s->num_irq; irq++) { in nvic_rettobase()
141 for (irq = NVIC_FIRST_IRQ; irq < s->num_irq; irq++) { in nvic_isrpending()
245 for (i = 1; i < s->num_irq; i++) { in nvic_recompute_state_secure()
309 for (i = 1; i < s->num_irq; i++) { in nvic_recompute_state()
438 assert(irq < s->num_irq); in set_prio()
459 assert(irq < s->num_irq); in get_prio()
509 assert(irq > ARMV7M_EXCP_RESET && irq < s->num_irq); in armv7m_nvic_clear_pending()
548 assert(irq > ARMV7M_EXCP_RESET && irq < s->num_irq); in do_armv7m_nvic_set_pending()
694 assert(irq > ARMV7M_EXCP_RESET && irq < s->num_irq); in armv7m_nvic_set_pending_lazyfp()
777 assert(pending > ARMV7M_EXCP_RESET && pending < s->num_irq); in armv7m_nvic_acknowledge_irq()
[all …]
H A Darm_gicv3_common.c325 i = s->num_irq - GIC_INTERNAL + GIC_INTERNAL * s->num_cpu; in gicv3_init_irqs_and_mmio()
386 if (s->num_irq > GICV3_MAXIRQ) { in arm_gicv3_common_realize()
389 s->num_irq, GICV3_MAXIRQ); in arm_gicv3_common_realize()
392 if (s->num_irq < GIC_INTERNAL) { in arm_gicv3_common_realize()
395 s->num_irq, GIC_INTERNAL); in arm_gicv3_common_realize()
408 if (s->num_irq % 32) { in arm_gicv3_common_realize()
411 s->num_irq); in arm_gicv3_common_realize()
584 for (i = GIC_INTERNAL; i < s->num_irq; i++) { in arm_gicv3_common_reset_hold()
610 DEFINE_PROP_UINT32("num-irq", GICv3State, num_irq, 32),
H A Darm_gic.c94 for (irq = 0; irq < s->num_irq; irq++) { in gic_get_best_irq()
392 if (irq < (s->num_irq - GIC_INTERNAL)) { in gic_set_irq()
399 irq -= (s->num_irq - GIC_INTERNAL); in gic_set_irq()
813 if (irq >= GIC_MAXIRQ || (!gic_is_vcpu(cpu) && irq >= s->num_irq)) { in gic_deactivate_irq()
897 if (irq >= s->num_irq) { in gic_complete_irq()
970 return ((s->num_irq / 32) - 1) | ((s->num_cpu - 1) << 5); in gic_dist_readb()
997 if (irq >= s->num_irq) { in gic_dist_readb()
1015 if (irq >= s->num_irq) in gic_dist_readb()
1034 if (irq >= s->num_irq) in gic_dist_readb()
1058 if (irq >= s->num_irq) in gic_dist_readb()
[all …]
H A Dvgic_common.h33 void kvm_arm_gic_set_irq(uint32_t num_irq, int irq, int level);
/openbmc/qemu/hw/cpu/
H A Da15mpcore.c63 qdev_prop_set_uint32(gicdev, "num-irq", s->num_irq); in a15mp_priv_realize()
88 qdev_init_gpio_in(dev, a15mp_priv_set_irq, s->num_irq - 32); in a15mp_priv_realize()
95 int ppibase = s->num_irq - 32 + i * 32; in a15mp_priv_realize()
155 DEFINE_PROP_UINT32("num-irq", A15MPPrivState, num_irq, 160),
H A Da9mpcore.c77 qdev_prop_set_uint32(gicdev, "num-irq", s->num_irq); in a9mp_priv_realize()
97 qdev_init_gpio_in(dev, a9mp_priv_set_irq, s->num_irq - 32); in a9mp_priv_realize()
151 int ppibase = (s->num_irq - 32) + i * 32; in a9mp_priv_realize()
169 DEFINE_PROP_UINT32("num-irq", A9MPPrivState, num_irq, 96),
H A Darm11mpcore.c63 int ppibase = (s->num_irq - 32) + i * 32; in mpcore_priv_map_setup()
86 qdev_prop_set_uint32(gicdev, "num-irq", s->num_irq); in mpcore_priv_realize()
99 qdev_init_gpio_in(dev, mpcore_priv_set_irq, s->num_irq - 32); in mpcore_priv_realize()
144 DEFINE_PROP_UINT32("num-irq", ARM11MPCorePriveState, num_irq, 64),
/openbmc/linux/drivers/net/wireless/ath/ath11k/
H A Dahb.c226 for (i = 0; i < irq_grp->num_irq; i++) in ath11k_ahb_ext_grp_disable()
251 for (i = 0; i < irq_grp->num_irq; i++) in ath11k_ahb_ext_grp_enable()
335 for (j = 0; j < irq_grp->num_irq; j++) { in ath11k_ahb_sync_ext_irqs()
440 for (j = 0; j < irq_grp->num_irq; j++) in ath11k_ahb_free_ext_irq()
531 u32 num_irq = 0; in ath11k_ahb_config_ext_irq() local
541 irq_grp->irqs[num_irq++] = in ath11k_ahb_config_ext_irq()
546 irq_grp->irqs[num_irq++] = in ath11k_ahb_config_ext_irq()
551 irq_grp->irqs[num_irq++] = reo2host_exception; in ath11k_ahb_config_ext_irq()
554 irq_grp->irqs[num_irq++] = wbm2host_rx_release; in ath11k_ahb_config_ext_irq()
557 irq_grp->irqs[num_irq++] = reo2host_status; in ath11k_ahb_config_ext_irq()
[all …]
H A Dpcic.c304 for (j = 0; j < irq_grp->num_irq; j++) in ath11k_pcic_free_ext_irq()
421 for (i = 0; i < irq_grp->num_irq; i++) in ath11k_pcic_ext_grp_disable()
455 for (i = 0; i < irq_grp->num_irq; i++) in ath11k_pcic_ext_grp_enable()
484 for (j = 0; j < irq_grp->num_irq; j++) { in ath11k_pcic_sync_ext_irqs()
510 for (i = 0; i < irq_grp->num_irq; i++) in ath11k_pcic_ext_grp_napi_poll()
534 for (i = 0; i < irq_grp->num_irq; i++) in ath11k_pcic_ext_interrupt_handler()
566 u32 num_irq = 0; in ath11k_pcic_ext_irq_config() local
582 num_irq = 1; in ath11k_pcic_ext_irq_config()
585 irq_grp->num_irq = num_irq; in ath11k_pcic_ext_irq_config()
588 for (j = 0; j < irq_grp->num_irq; j++) { in ath11k_pcic_ext_irq_config()
/openbmc/linux/drivers/gpio/
H A Dgpio-104-idio-16.c32 static unsigned int num_irq; variable
33 module_param_hw_array(irq, uint, irq, &num_irq, 0);
124 module_isa_driver_with_irq(idio_16_driver, num_idio_16, num_irq);
H A Dgpio-104-idi-48.c32 static unsigned int num_irq; variable
33 module_param_hw_array(irq, uint, irq, &num_irq, 0);
185 module_isa_driver_with_irq(idi_48_driver, num_idi_48, num_irq);
H A Dgpio-tegra186.c99 unsigned int num_irq; member
798 if (gpio->num_irq > gpio->num_banks) { in tegra186_gpio_irqs_per_bank()
799 if (gpio->num_irq % gpio->num_banks != 0) in tegra186_gpio_irqs_per_bank()
803 if (gpio->num_irq < gpio->num_banks) in tegra186_gpio_irqs_per_bank()
806 gpio->num_irqs_per_bank = gpio->num_irq / gpio->num_banks; in tegra186_gpio_irqs_per_bank()
815 gpio->num_irq, gpio->num_banks); in tegra186_gpio_irqs_per_bank()
862 gpio->num_irq = err; in tegra186_gpio_probe()
868 gpio->irq = devm_kcalloc(&pdev->dev, gpio->num_irq, sizeof(*gpio->irq), in tegra186_gpio_probe()
873 for (i = 0; i < gpio->num_irq; i++) { in tegra186_gpio_probe()
940 irq->num_parents = gpio->num_irq; in tegra186_gpio_probe()
[all …]
H A Dgpio-104-dio-48e.c36 static unsigned int num_irq; variable
37 module_param_hw_array(irq, uint, irq, &num_irq, 0);
337 module_isa_driver_with_irq(dio48e_driver, num_dio48e, num_irq);
H A Dgpio-ws16c48.c29 static unsigned int num_irq; variable
30 module_param_hw_array(irq, uint, irq, &num_irq, 0);
323 module_isa_driver_with_irq(ws16c48_driver, num_ws16c48, num_irq);
/openbmc/qemu/include/hw/cpu/
H A Da15mpcore.h38 uint32_t num_irq; member
H A Darm11mpcore.h27 uint32_t num_irq; member
H A Da9mpcore.h30 uint32_t num_irq; member
/openbmc/linux/drivers/net/wireless/ath/ath12k/
H A Dpci.c335 for (j = 0; j < irq_grp->num_irq; j++) in ath12k_pci_free_ext_irq()
429 for (i = 0; i < irq_grp->num_irq; i++) in ath12k_pci_ext_grp_disable()
454 for (i = 0; i < irq_grp->num_irq; i++) in ath12k_pci_ext_grp_enable()
465 for (j = 0; j < irq_grp->num_irq; j++) { in ath12k_pci_sync_ext_irqs()
527 u32 num_irq = 0; in ath12k_pci_ext_irq_config() local
542 num_irq = 1; in ath12k_pci_ext_irq_config()
545 irq_grp->num_irq = num_irq; in ath12k_pci_ext_irq_config()
548 for (j = 0; j < irq_grp->num_irq; j++) { in ath12k_pci_ext_irq_config()
/openbmc/qemu/include/hw/mips/
H A Dcps.h39 uint32_t num_irq; member
/openbmc/qemu/hw/mips/
H A Dcps.c32 assert(pin_number < s->num_irq); in get_cps_irq()
171 DEFINE_PROP_UINT32("num-irq", MIPSCPSState, num_irq, 256),

12