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Searched refs:num_instances (Results 1 – 25 of 35) sorted by relevance

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/openbmc/linux/drivers/accel/habanalabs/common/
H A Dsecurity.c292 u32 dcore_offset, u32 num_instances, u32 instance_offset, in hl_init_pb_with_mask() argument
311 for (j = 0 ; j < num_instances ; j++) { in hl_init_pb_with_mask()
312 int seq = i * num_instances + j; in hl_init_pb_with_mask()
344 u32 num_instances, u32 instance_offset, in hl_init_pb() argument
349 num_instances, instance_offset, pb_blocks, in hl_init_pb()
372 u32 dcore_offset, u32 num_instances, u32 instance_offset, in hl_init_pb_ranges_with_mask() argument
395 for (j = 0 ; j < num_instances ; j++) { in hl_init_pb_ranges_with_mask()
396 int seq = i * num_instances + j; in hl_init_pb_ranges_with_mask()
430 u32 dcore_offset, u32 num_instances, u32 instance_offset, in hl_init_pb_ranges() argument
436 num_instances, instance_offset, pb_blocks, in hl_init_pb_ranges()
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H A Dhabanalabs.h4076 u32 dcore_offset, u32 num_instances, u32 instance_offset,
4080 u32 num_instances, u32 instance_offset,
4084 u32 dcore_offset, u32 num_instances, u32 instance_offset,
4089 u32 dcore_offset, u32 num_instances, u32 instance_offset,
4094 u32 num_instances, u32 instance_offset,
4098 u32 num_instances, u32 instance_offset,
4103 u32 num_instances, u32 instance_offset,
4106 u32 dcore_offset, u32 num_instances, u32 instance_offset,
4109 u32 num_instances, u32 instance_offset,
/openbmc/linux/drivers/iommu/arm/arm-smmu/
H A Darm-smmu-nvidia.c37 unsigned int num_instances; member
69 for (i = 0; i < nvidia->num_instances; i++) { in nvidia_smmu_write_reg()
90 for (i = 0; i < nvidia->num_instances; i++) { in nvidia_smmu_write_reg64()
112 for (i = 0; i < nvidia->num_instances; i++) { in nvidia_smmu_tlb_sync()
137 for (i = 0; i < nvidia->num_instances; i++) { in nvidia_smmu_reset()
182 for (inst = 0; inst < nvidia->num_instances; inst++) { in nvidia_smmu_global_fault()
232 for (inst = 0; inst < nvidia->num_instances; inst++) { in nvidia_smmu_context_fault()
325 nvidia_smmu->num_instances++; in nvidia_smmu_impl_init()
336 nvidia_smmu->num_instances++; in nvidia_smmu_impl_init()
339 if (nvidia_smmu->num_instances == 1) in nvidia_smmu_impl_init()
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_sdma.c42 for (i = 0; i < adev->sdma.num_instances; i++) in amdgpu_sdma_get_instance_from_ring()
55 for (i = 0; i < adev->sdma.num_instances; i++) { in amdgpu_sdma_get_index_from_ring()
108 for (i = 0; i < adev->sdma.num_instances; i++) { in amdgpu_sdma_ras_late_init()
192 for (i = 0; i < adev->sdma.num_instances; i++) { in amdgpu_sdma_destroy_inst_ctx()
236 for (i = 1; i < adev->sdma.num_instances; i++) in amdgpu_sdma_init_microcode()
248 for (i = 0; i < adev->sdma.num_instances; i++) { in amdgpu_sdma_init_microcode()
297 for (i = 0; i < adev->sdma.num_instances; i++) { in amdgpu_sdma_unset_buffer_funcs_helper()
H A Dsdma_v4_0.c555 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_setup_ulv()
580 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_init_microcode()
880 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_gfx_enable()
916 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_page_stop()
965 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_ctx_switch_enable()
1010 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_enable()
1303 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_load_microcode()
1359 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_start()
1389 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_start()
1767 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_sw_init()
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H A Dsdma_v3_0.c254 for (i = 0; i < adev->sdma.num_instances; i++) in sdma_v3_0_free_microcode()
306 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_init_microcode()
331 for (i = 0; i < adev->sdma.num_instances; i++) in sdma_v3_0_init_microcode()
518 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_gfx_stop()
577 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_ctx_switch_enable()
619 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_enable()
646 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_gfx_resume()
744 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_gfx_resume()
1093 adev->sdma.num_instances = 1; in sdma_v3_0_early_init()
1096 adev->sdma.num_instances = SDMA_MAX_INSTANCE; in sdma_v3_0_early_init()
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H A Dsdma_v4_4_2.c105 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_4_2_inst_init_golden_registers()
134 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_4_2_init_microcode()
1342 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_4_2_sw_init()
1399 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_4_2_sw_fini()
1419 inst_mask = GENMASK(adev->sdma.num_instances - 1, 0); in sdma_v4_4_2_hw_init()
1437 inst_mask = GENMASK(adev->sdma.num_instances - 1, 0); in sdma_v4_4_2_hw_fini()
1439 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_4_2_hw_fini()
1476 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_4_2_is_idle()
1493 for (j = 0; j < adev->sdma.num_instances; j++) { in sdma_v4_4_2_wait_for_idle()
1498 if (j == adev->sdma.num_instances) in sdma_v4_4_2_wait_for_idle()
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H A Dcik_sdma.c77 for (i = 0; i < adev->sdma.num_instances; i++) in cik_sdma_free_microcode()
134 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_init_microcode()
146 for (i = 0; i < adev->sdma.num_instances; i++) in cik_sdma_init_microcode()
313 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_gfx_stop()
370 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_ctx_switch_enable()
408 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_enable()
433 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_gfx_resume()
496 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_gfx_resume()
541 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_load_microcode()
929 adev->sdma.num_instances = SDMA_MAX_INSTANCE; in cik_sdma_early_init()
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H A Dsi_dma.c120 for (i = 0; i < adev->sdma.num_instances; i++) { in si_dma_stop()
135 for (i = 0; i < adev->sdma.num_instances; i++) { in si_dma_start()
469 adev->sdma.num_instances = 2; in si_dma_early_init()
497 for (i = 0; i < adev->sdma.num_instances; i++) { in si_dma_sw_init()
519 for (i = 0; i < adev->sdma.num_instances; i++) in si_dma_sw_fini()
653 for (i = 0; i < adev->sdma.num_instances; i++) { in si_dma_set_clockgating_state()
665 for (i = 0; i < adev->sdma.num_instances; i++) { in si_dma_set_clockgating_state()
747 for (i = 0; i < adev->sdma.num_instances; i++) in si_dma_set_ring_funcs()
841 for (i = 0; i < adev->sdma.num_instances; i++) { in si_dma_set_vm_pte_funcs()
845 adev->vm_manager.vm_pte_num_scheds = adev->sdma.num_instances; in si_dma_set_vm_pte_funcs()
H A Dsdma_v2_4.c117 for (i = 0; i < adev->sdma.num_instances; i++) in sdma_v2_4_free_microcode()
148 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v2_4_init_microcode()
175 for (i = 0; i < adev->sdma.num_instances; i++) in sdma_v2_4_init_microcode()
344 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v2_4_gfx_stop()
384 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v2_4_enable()
409 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v2_4_gfx_resume()
472 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v2_4_gfx_resume()
820 adev->sdma.num_instances = SDMA_MAX_INSTANCE; in sdma_v2_4_early_init()
860 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v2_4_sw_init()
881 for (i = 0; i < adev->sdma.num_instances; i++) in sdma_v2_4_sw_fini()
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H A Dsdma_v5_2.c381 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_gfx_stop()
440 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_ctx_switch_enable()
479 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_enable()
507 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_gfx_resume()
679 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_load_microcode()
712 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_soft_reset()
1238 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_sw_init()
1252 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_sw_init()
1281 for (i = 0; i < adev->sdma.num_instances; i++) in sdma_v5_2_sw_fini()
1331 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_2_is_idle()
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H A Dsdma_v6_0.c386 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v6_0_gfx_stop()
422 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v6_0_ctxempty_int_enable()
452 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v6_0_enable()
478 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v6_0_gfx_resume()
548 adev->doorbell_index.sdma_doorbell_range * adev->sdma.num_instances); in sdma_v6_0_gfx_resume()
678 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v6_0_load_microcode()
728 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v6_0_soft_reset()
763 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v6_0_check_soft_reset()
1292 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v6_0_sw_init()
1327 for (i = 0; i < adev->sdma.num_instances; i++) in sdma_v6_0_sw_fini()
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H A Dsdma_v5_0.c243 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_0_init_microcode()
564 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_0_gfx_stop()
623 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_0_ctx_switch_enable()
665 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_0_enable()
692 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_0_gfx_resume()
867 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_0_load_microcode()
1376 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_0_sw_init()
1406 for (i = 0; i < adev->sdma.num_instances; i++) in sdma_v5_0_sw_fini()
1461 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_0_is_idle()
1636 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_0_update_medium_grain_clock_gating()
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H A Dsdma_v4_4.c243 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_4_reset_ras_error_count()
256 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_4_query_ras_error_count()
H A Daqua_vanjaram.c50 for (i = 0; i < adev->sdma.num_instances; i++) in aqua_vanjaram_doorbell_index_init()
352 num_sdma = adev->sdma.num_instances; in __aqua_vanjaram_get_xcp_ip_info()
643 adev->sdma.num_instances = NUM_SDMA(adev->sdma.sdma_mask); in aqua_vanjaram_init_soc_config()
H A Damdgpu_sdma.h107 int num_instances; member
H A Damdgpu_discovery.c1293 if (adev->sdma.num_instances < in amdgpu_discovery_reg_base_init()
1295 adev->sdma.num_instances++; in amdgpu_discovery_reg_base_init()
1300 adev->sdma.num_instances + 1, in amdgpu_discovery_reg_base_init()
2161 adev->sdma.num_instances = 2; in amdgpu_discovery_set_ip_blocks()
2183 adev->sdma.num_instances = 2; in amdgpu_discovery_set_ip_blocks()
2205 adev->sdma.num_instances = 1; in amdgpu_discovery_set_ip_blocks()
2244 adev->sdma.num_instances = 2; in amdgpu_discovery_set_ip_blocks()
2267 adev->sdma.num_instances = 8; in amdgpu_discovery_set_ip_blocks()
2295 adev->sdma.num_instances = 5; in amdgpu_discovery_set_ip_blocks()
H A Damdgpu_kms.c313 if (query_fw->index >= adev->sdma.num_instances) in amdgpu_firmware_info()
394 for (i = 0; i < adev->sdma.num_instances; i++) in amdgpu_hw_ip_info()
1689 for (i = 0; i < adev->sdma.num_instances; i++) { in amdgpu_debugfs_firmware_info_show()
/openbmc/linux/drivers/media/platform/samsung/exynos4-is/
H A Dfimc-lite.h69 unsigned short num_instances; member
H A Dfimc-lite.c1468 if (!drv_data || fimc->index >= drv_data->num_instances || in fimc_lite_probe()
1630 .num_instances = 2,
1641 .num_instances = 3,
/openbmc/linux/include/sound/
H A Dtimer.h79 int num_instances; /* current number of timer instances */ member
/openbmc/linux/drivers/hwmon/
H A Dibmaem.c191 u8 num_instances; member
203 u8 num_instances; member
519 return ff_resp.num_instances; in aem_find_aem1_count()
657 fi_resp->num_instances <= instance_num) in aem_find_aem2()
/openbmc/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_device.c118 kfd->adev->sdma.num_instances * in kfd_device_info_set_sdma_info()
1346 return node->adev->sdma.num_instances/(int)node->kfd->num_nodes; in kfd_get_num_sdma_engines()
1348 return min(node->adev->sdma.num_instances/(int)node->kfd->num_nodes, 2); in kfd_get_num_sdma_engines()
1354 return node->adev->sdma.num_instances/(int)node->kfd->num_nodes - in kfd_get_num_xgmi_sdma_engines()
/openbmc/linux/sound/core/
H A Dtimer.c223 if (master->timer->num_instances >= master->timer->max_instances) in check_matching_master_slave()
226 master->timer->num_instances++; in check_matching_master_slave()
343 if (timer->num_instances >= timer->max_instances) { in snd_timer_open()
370 timer->num_instances++; in snd_timer_open()
411 timer->num_instances--; in snd_timer_close_locked()
428 timer->num_instances--; in snd_timer_close_locked()
/openbmc/linux/drivers/media/platform/ti/vpe/
H A Dvpe.c377 atomic_t num_instances; /* count of driver instances */ member
2372 if (atomic_inc_return(&dev->num_instances) == 1) in vpe_open()
2435 if (atomic_dec_return(&dev->num_instances) == 0) in vpe_release()
2541 atomic_set(&dev->num_instances, 0); in vpe_probe()

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