Searched refs:n_regions (Results 1 – 7 of 7) sorted by relevance
15 #define spi_nor_otp_n_regions(nor) ((nor)->params->otp.org->n_regions)251 unsigned int n_regions = spi_nor_otp_n_regions(nor); in spi_nor_mtd_otp_info() local255 if (len < n_regions * sizeof(*buf)) in spi_nor_mtd_otp_info()262 for (i = 0; i < n_regions; i++) { in spi_nor_mtd_otp_info()276 *retlen = n_regions * sizeof(*buf); in spi_nor_mtd_otp_info()
227 if (params->otp.org->n_regions) in winbond_nor_late_init()
306 unsigned int n_regions; member590 .n_regions = (_n_regions), \
345 dram_regions->n_regions = 0; in iwl_pcie_load_payloads_segments()359 dram_regions->n_regions++; in iwl_pcie_load_payloads_segments()413 dram_regions->n_regions = 1; in iwl_trans_pcie_ctx_info_gen3_load_pnvm()427 for (i = 0; i < dram_regions->n_regions; i++) in iwl_dram_regions_size()509 dram_regions->n_regions = 1; in iwl_trans_pcie_ctx_info_gen3_load_reduce_power()
2007 for (i = 0; i < dram_regions->n_regions; i++) { in iwl_trans_pcie_free_pnvm_dram_regions()2012 dram_regions->n_regions = 0; in iwl_trans_pcie_free_pnvm_dram_regions()
430 size_t n_regions; in tcg_n_regions()447 n_regions = tb_size / (2 * MiB); in tcg_n_regions()448 if (n_regions <= max_cpus) { in tcg_n_regions()451 return MIN(n_regions, max_cpus * 8); in tcg_n_regions()
750 u8 n_regions; member