| /openbmc/u-boot/arch/arm/mach-imx/mx7ulp/ |
| H A D | iomux.c | 25 u32 mux_mode = (pad & MUX_MODE_MASK) >> MUX_MODE_SHIFT; in mx7ulp_iomux_setup_pad() local
34 pad, mux_ctrl_ofs, mux_mode, sel_input_ofs, sel_input, in mx7ulp_iomux_setup_pad()
37 if (mux_mode & IOMUX_CONFIG_MPORTS) { in mx7ulp_iomux_setup_pad()
38 mux_mode &= ~IOMUX_CONFIG_MPORTS; in mx7ulp_iomux_setup_pad()
44 __raw_writel(((mux_mode << IOMUXC_PCR_MUX_ALT_SHIFT) & in mx7ulp_iomux_setup_pad()
52 __raw_writel(((mux_mode << IOMUXC_PCR_MUX_ALT_SHIFT) & in mx7ulp_iomux_setup_pad()
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| /openbmc/u-boot/arch/arm/mach-imx/ |
| H A D | iomux-v3.c | 24 u32 mux_mode = (pad & MUX_MODE_MASK) >> MUX_MODE_SHIFT; in imx_iomux_v3_setup_pad() local
47 mux_mode &= ~IOMUX_CONFIG_LPSR; in imx_iomux_v3_setup_pad()
56 mux_mode &= ~IOMUX_CONFIG_LPSR; in imx_iomux_v3_setup_pad()
63 __raw_writel(mux_mode, base + mux_ctrl_ofs); in imx_iomux_v3_setup_pad()
70 __raw_writel((mux_mode << PAD_MUX_MODE_SHIFT) | pad_ctrl, in imx_iomux_v3_setup_pad()
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| /openbmc/u-boot/drivers/pinctrl/nxp/ |
| H A D | pinctrl-imx.c | 26 u32 input_val, mux_mode, config_val; in imx_pinctrl_set_state() local
93 mux_mode = pin_data[j++]; in imx_pinctrl_set_state()
100 mux_reg, conf_reg, input_reg, mux_mode, in imx_pinctrl_set_state()
104 mux_mode |= IOMUXC_CONFIG_SION; in imx_pinctrl_set_state()
112 mux_mode << mux_shift); in imx_pinctrl_set_state()
114 writel(mux_mode, info->base + mux_reg); in imx_pinctrl_set_state()
118 mux_reg, mux_mode); in imx_pinctrl_set_state()
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| /openbmc/linux/arch/arm/mach-davinci/ |
| H A D | mux.h | 668 #define MUX_CFG(soc, desc, muxreg, mode_offset, mode_mask, mux_mode, dbg)\ argument
676 .mode = mux_mode, \
679 #define INT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg) \ argument
687 .mode = mux_mode, \
690 #define EVT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg) \ argument
698 .mode = mux_mode, \
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| /openbmc/u-boot/arch/arm/include/asm/arch-mx7ulp/ |
| H A D | iomux.h | 61 #define IOMUX_PAD(pad_ctrl_ofs, mux_ctrl_ofs, mux_mode, sel_input_ofs, \ argument
64 ((iomux_cfg_t)(mux_mode) << MUX_MODE_SHIFT) | \
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| /openbmc/linux/drivers/pinctrl/freescale/ |
| H A D | pinctrl-imx.h | 30 unsigned int mux_mode; member
42 unsigned int mux_mode; member
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| H A D | pinctrl-scu.c | 150 pin_scu->mux_mode = be32_to_cpu(*list++); in imx_pinctrl_parse_pin_scu()
155 pin_scu->mux_mode, pin_scu->config); in imx_pinctrl_parse_pin_scu()
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| H A D | pinctrl-imx.c | 187 reg |= (pin_mmio->mux_mode << info->mux_shift); in imx_pmx_set_one_pin_mmio()
192 writel(pin_mmio->mux_mode, ipctl->base + pin_reg->mux_reg); in imx_pmx_set_one_pin_mmio()
194 pin_reg->mux_reg, pin_mmio->mux_mode); in imx_pmx_set_one_pin_mmio()
491 pin_mmio->mux_mode = be32_to_cpu(*list++); in imx_pinctrl_parse_pin_mmio()
498 pin_mmio->mux_mode |= IOMUXC_CONFIG_SION; in imx_pinctrl_parse_pin_mmio()
504 pin_mmio->mux_mode, pin_mmio->config); in imx_pinctrl_parse_pin_mmio()
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| /openbmc/u-boot/arch/arm/include/asm/mach-imx/ |
| H A D | iomux-v3.h | 68 #define IOMUX_PAD(pad_ctrl_ofs, mux_ctrl_ofs, mux_mode, sel_input_ofs, \ argument
71 ((iomux_v3_cfg_t)(mux_mode) << MUX_MODE_SHIFT) | \
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| /openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | fsl,imx7ulp-pinctrl.txt | 17 <mux_conf_reg input_reg mux_mode input_val> are specified
|