1a6214218SDong Aisheng* Freescale i.MX7ULP IOMUX Controller 2a6214218SDong Aisheng 3a6214218SDong Aishengi.MX 7ULP has three IOMUXC instances: IOMUXC0 for M4 ports, IOMUXC1 for A7 4a6214218SDong Aishengports and IOMUXC DDR for DDR interface. 5a6214218SDong Aisheng 6a6214218SDong AishengNote: 7a6214218SDong AishengThis binding doc is only for the IOMUXC1 support in A7 Domain and it only 8a6214218SDong Aishengsupports generic pin config. 9a6214218SDong Aisheng 10*0934eec7SA.s. DongPlease refer to fsl,imx-pinctrl.txt in this directory for common binding 11*0934eec7SA.s. Dongpart and usage. 12a6214218SDong Aisheng 13a6214218SDong AishengRequired properties: 14*0934eec7SA.s. Dong- compatible: "fsl,imx7ulp-iomuxc1". 15*0934eec7SA.s. Dong- fsl,pins: Each entry consists of 5 integers which represents the mux 16*0934eec7SA.s. Dong and config setting for one pin. The first 4 integers 17*0934eec7SA.s. Dong <mux_conf_reg input_reg mux_mode input_val> are specified 18*0934eec7SA.s. Dong using a PIN_FUNC_ID macro, which can be found in 19*0934eec7SA.s. Dong imx7ulp-pinfunc.h in the device tree source folder. 20*0934eec7SA.s. Dong The last integer CONFIG is the pad setting value like 21*0934eec7SA.s. Dong pull-up on this pin. 22a6214218SDong Aisheng 23*0934eec7SA.s. Dong Please refer to i.MX7ULP Reference Manual for detailed 24*0934eec7SA.s. Dong CONFIG settings. 25a6214218SDong Aisheng 26*0934eec7SA.s. DongCONFIG bits definition: 27*0934eec7SA.s. DongPAD_CTL_OBE (1 << 17) 28*0934eec7SA.s. DongPAD_CTL_IBE (1 << 16) 29*0934eec7SA.s. DongPAD_CTL_LK (1 << 16) 30*0934eec7SA.s. DongPAD_CTL_DSE_HI (1 << 6) 31*0934eec7SA.s. DongPAD_CTL_DSE_STD (0 << 6) 32*0934eec7SA.s. DongPAD_CTL_ODE (1 << 5) 33*0934eec7SA.s. DongPAD_CTL_PUSH_PULL (0 << 5) 34*0934eec7SA.s. DongPAD_CTL_SRE_SLOW (1 << 2) 35*0934eec7SA.s. DongPAD_CTL_SRE_STD (0 << 2) 36*0934eec7SA.s. DongPAD_CTL_PE (1 << 0) 37a6214218SDong Aisheng 38a6214218SDong AishengExamples: 39a6214218SDong Aisheng#include "imx7ulp-pinfunc.h" 40a6214218SDong Aisheng 41a6214218SDong Aisheng/* Pin Controller Node */ 42*0934eec7SA.s. Dongiomuxc1: pinctrl@40ac0000 { 43a6214218SDong Aisheng compatible = "fsl,imx7ulp-iomuxc1"; 44a6214218SDong Aisheng reg = <0x40ac0000 0x1000>; 45a6214218SDong Aisheng 46a6214218SDong Aisheng /* Pin Configuration Node */ 47a6214218SDong Aisheng pinctrl_lpuart4: lpuart4grp { 48*0934eec7SA.s. Dong fsl,pins = < 49*0934eec7SA.s. Dong IMX7ULP_PAD_PTC3__LPUART4_RX 0x1 50*0934eec7SA.s. Dong IMX7ULP_PAD_PTC2__LPUART4_TX 0x1 51a6214218SDong Aisheng >; 52a6214218SDong Aisheng }; 53a6214218SDong Aisheng}; 54