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Searched refs:msg_id (Results 1 – 25 of 139) sorted by relevance

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/openbmc/linux/include/trace/events/
H A Dscmi.h11 TP_PROTO(u8 protocol_id, u8 msg_id, u32 res_id, u32 val1, u32 val2),
12 TP_ARGS(protocol_id, msg_id, res_id, val1, val2),
16 __field(u8, msg_id)
24 __entry->msg_id = msg_id;
31 __entry->protocol_id, __entry->msg_id,
36 TP_PROTO(int transfer_id, u8 msg_id, u8 protocol_id, u16 seq,
38 TP_ARGS(transfer_id, msg_id, protocol_id, seq, poll),
42 __field(u8, msg_id)
50 __entry->msg_id = msg_id;
57 __entry->protocol_id, __entry->msg_id, __entry->seq,
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H A Dcachefiles.h691 __field(unsigned int, msg_id )
699 __entry->msg_id = msg->msg_id;
707 __entry->msg_id,
714 TP_PROTO(struct cachefiles_object *obj, unsigned int msg_id,
717 TP_ARGS(obj, msg_id, len),
721 __field(unsigned int, msg_id )
727 __entry->msg_id = msg_id;
733 __entry->msg_id,
744 __field(unsigned int, msg_id )
750 __entry->msg_id = msg->msg_id;
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/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu7_clockpowergating.c170 const uint32_t *msg_id) in smu7_update_clock_gatings() argument
178 switch ((*msg_id & PP_GROUP_MASK) >> PP_GROUP_SHIFT) { in smu7_update_clock_gatings()
180 switch ((*msg_id & PP_BLOCK_MASK) >> PP_BLOCK_SHIFT) { in smu7_update_clock_gatings()
182 if (PP_STATE_SUPPORT_CG & *msg_id) { in smu7_update_clock_gatings()
183 msg = ((*msg_id & PP_STATE_MASK) & PP_STATE_CG) ? in smu7_update_clock_gatings()
192 if (PP_STATE_SUPPORT_LS & *msg_id) { in smu7_update_clock_gatings()
193 msg = (*msg_id & PP_STATE_MASK) & PP_STATE_LS in smu7_update_clock_gatings()
205 if (PP_STATE_SUPPORT_CG & *msg_id) { in smu7_update_clock_gatings()
206 msg = ((*msg_id & PP_STATE_MASK) & PP_STATE_CG) ? in smu7_update_clock_gatings()
216 if (PP_STATE_SUPPORT_LS & *msg_id) { in smu7_update_clock_gatings()
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/openbmc/linux/drivers/media/platform/mediatek/vcodec/encoder/
H A Dvenc_ipi_msg.h43 uint32_t msg_id; member
58 uint32_t msg_id; member
82 uint32_t msg_id; member
116 u32 msg_id; member
134 uint32_t msg_id; member
153 uint32_t msg_id; member
171 uint32_t msg_id; member
188 uint32_t msg_id; member
223 uint32_t msg_id; member
239 uint32_t msg_id; member
H A Dvenc_vpu_if.c75 mtk_venc_debug(vpu->ctx, "msg_id %x inst %p status %d", msg->msg_id, vpu, msg->status); in vpu_enc_ipi_handler()
76 if (!vpu_enc_check_ap_inst(enc_dev, vpu) || msg->msg_id < VPU_IPIMSG_ENC_INIT_DONE || in vpu_enc_ipi_handler()
77 msg->msg_id > VPU_IPIMSG_ENC_DEINIT_DONE) { in vpu_enc_ipi_handler()
78 mtk_v4l2_venc_err(vpu->ctx, "venc msg id not correctly => 0x%x", msg->msg_id); in vpu_enc_ipi_handler()
89 switch (msg->msg_id) { in vpu_enc_ipi_handler()
101 mtk_venc_err(vpu->ctx, "unknown msg id %x", msg->msg_id); in vpu_enc_ipi_handler()
152 out.msg_id = AP_IPIMSG_ENC_INIT; in vpu_enc_init()
199 out.base.msg_id = AP_IPIMSG_ENC_SET_PARAM; in vpu_enc_set_param()
266 out.base.msg_id = AP_IPIMSG_ENC_ENCODE; in vpu_enc_encode_32bits()
311 out.msg_id = AP_IPIMSG_ENC_ENCODE; in vpu_enc_encode_34bits()
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/openbmc/linux/include/drm/display/
H A Ddrm_hdcp.h152 u8 msg_id; member
158 u8 msg_id; member
165 u8 msg_id; member
170 u8 msg_id; member
175 u8 msg_id; member
180 u8 msg_id; member
185 u8 msg_id; member
190 u8 msg_id; member
195 u8 msg_id; member
201 u8 msg_id; member
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
H A Ddcn314_smu.c120 unsigned int msg_id, in dcn314_smu_send_msg_with_param() argument
141 REG_WRITE(MP1_SMN_C2PMSG_67, msg_id); in dcn314_smu_send_msg_with_param()
146 if (msg_id == VBIOSSMC_MSG_TransferTableDram2Smu && in dcn314_smu_send_msg_with_param()
149 else if (msg_id == VBIOSSMC_MSG_SetHardMinDcfclkByFreq || in dcn314_smu_send_msg_with_param()
150 msg_id == VBIOSSMC_MSG_SetMinDeepSleepDcfclk) in dcn314_smu_send_msg_with_param()
160 dm_helpers_smu_timeout(CTX, msg_id, param, 10 * 200000); in dcn314_smu_send_msg_with_param()
347 unsigned int msg_id, param; in dcn314_smu_set_zstate_support() local
355 msg_id = VBIOSSMC_MSG_AllowZstatesEntry; in dcn314_smu_set_zstate_support()
360 msg_id = VBIOSSMC_MSG_AllowZstatesEntry; in dcn314_smu_set_zstate_support()
366 msg_id = VBIOSSMC_MSG_AllowZstatesEntry; in dcn314_smu_set_zstate_support()
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/openbmc/linux/drivers/media/platform/mediatek/vcodec/decoder/
H A Dvdec_ipi_msg.h44 uint32_t msg_id; member
60 uint32_t msg_id; member
72 uint32_t msg_id; member
89 uint32_t msg_id; member
111 uint32_t msg_id; member
128 u32 msg_id; member
145 u32 msg_id; member
H A Dvdec_vpu_if.c115 if (!vpu_dec_check_ap_inst(dec_dev, vpu) || msg->msg_id < VPU_IPIMSG_DEC_INIT_ACK || in vpu_dec_ipi_handler()
116 msg->msg_id > VPU_IPIMSG_DEC_GET_PARAM_ACK) { in vpu_dec_ipi_handler()
117 mtk_v4l2_vdec_err(vpu->ctx, "vdec msg id not correctly => 0x%x", msg->msg_id); in vpu_dec_ipi_handler()
126 switch (msg->msg_id) { in vpu_dec_ipi_handler()
143 mtk_vdec_err(vpu->ctx, "invalid msg=%X", msg->msg_id); in vpu_dec_ipi_handler()
182 static int vcodec_send_ap_ipi(struct vdec_vpu_inst *vpu, unsigned int msg_id) in vcodec_send_ap_ipi() argument
187 mtk_vdec_debug(vpu->ctx, "+ id=%X", msg_id); in vcodec_send_ap_ipi()
190 msg.msg_id = msg_id; in vcodec_send_ap_ipi()
198 mtk_vdec_debug(vpu->ctx, "- id=%X ret=%d", msg_id, err); in vcodec_send_ap_ipi()
229 msg.msg_id = AP_IPIMSG_DEC_INIT; in vpu_dec_init()
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/openbmc/linux/drivers/platform/x86/amd/
H A Dhsmp.c106 ret = amd_hsmp_rdwr(root, SMN_HSMP_MSG_ID, &msg->msg_id, HSMP_WR); in __hsmp_send_message()
108 pr_err("Error %d writing message ID %u\n", ret, msg->msg_id); in __hsmp_send_message()
145 msg->msg_id, mbox_status); in __hsmp_send_message()
162 ret, index, msg->msg_id); in __hsmp_send_message()
174 if (msg->msg_id < HSMP_TEST || msg->msg_id >= HSMP_MSG_ID_MAX) in validate_message()
178 if (hsmp_msg_desc_table[msg->msg_id].type == HSMP_RSVD) in validate_message()
182 if (msg->num_args != hsmp_msg_desc_table[msg->msg_id].num_args || in validate_message()
183 msg->response_sz != hsmp_msg_desc_table[msg->msg_id].response_sz) in validate_message()
238 msg.msg_id = HSMP_TEST; in hsmp_test()
271 if (msg.msg_id < HSMP_TEST || msg.msg_id >= HSMP_MSG_ID_MAX) in hsmp_ioctl()
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/openbmc/linux/drivers/media/platform/mediatek/mdp/
H A Dmtk_mdp_vpu.c33 unsigned int msg_id = msg->msg_id; in mtk_mdp_vpu_ipi_handler() local
40 switch (msg_id) { in mtk_mdp_vpu_ipi_handler()
51 msg_id); in mtk_mdp_vpu_ipi_handler()
57 msg_id, vpu->failure); in mtk_mdp_vpu_ipi_handler()
96 static int mtk_mdp_vpu_send_ap_ipi(struct mtk_mdp_vpu *vpu, uint32_t msg_id) in mtk_mdp_vpu_send_ap_ipi() argument
101 msg.msg_id = msg_id; in mtk_mdp_vpu_send_ap_ipi()
120 msg.msg_id = AP_MDP_INIT; in mtk_mdp_vpu_init()
H A Dmtk_mdp_ipi.h32 uint32_t msg_id; member
46 uint32_t msg_id; member
62 uint32_t msg_id; member
/openbmc/linux/drivers/gpu/drm/amd/display/dc/hdcp/
H A Dhdcp_msg.c140 if (message_info->msg_id == HDCP_MESSAGE_ID_INVALID) { in hdmi_14_process_transaction()
141 DC_LOG_ERROR("%s: Invalid message_info msg_id - %d\n", __func__, message_info->msg_id); in hdmi_14_process_transaction()
145 offset = hdcp_i2c_offsets[message_info->msg_id]; in hdmi_14_process_transaction()
160 if (hdcp_cmd_is_read[message_info->msg_id]) { in hdmi_14_process_transaction()
321 if (message_info->msg_id == HDCP_MESSAGE_ID_INVALID) { in dp_11_process_transaction()
322 DC_LOG_ERROR("%s: Invalid message_info msg_id - %d\n", __func__, message_info->msg_id); in dp_11_process_transaction()
330 hdcp_dpcd_addrs[message_info->msg_id], in dp_11_process_transaction()
331 hdcp_cmd_is_read[message_info->msg_id]); in dp_11_process_transaction()
397 if (message_info->msg_id < HDCP_MESSAGE_ID_READ_BKSV || in dc_process_hdcp_msg()
398 message_info->msg_id >= HDCP_MESSAGE_ID_MAX) in dc_process_hdcp_msg()
/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_dp_hdcp.c283 u8 msg_id; member
288 u8 msg_id; member
354 u8 msg_id, bool *msg_ready) in hdcp2_detect_msg_availability() argument
364 switch (msg_id) { in hdcp2_detect_msg_availability()
378 DRM_ERROR("Unidentified msg_id: %d\n", msg_id); in hdcp2_detect_msg_availability()
392 u8 msg_id = hdcp2_msg_data->msg_id; in intel_dp_hdcp2_wait_for_msg() local
396 if (msg_id == HDCP_2_2_AKE_SEND_HPRIME && !hdcp->is_paired) in intel_dp_hdcp2_wait_for_msg()
415 msg_id, &msg_ready); in intel_dp_hdcp2_wait_for_msg()
423 hdcp2_msg_data->msg_id, ret, timeout); in intel_dp_hdcp2_wait_for_msg()
428 static const struct hdcp2_dp_msg_data *get_hdcp2_dp_msg_data(u8 msg_id) in get_hdcp2_dp_msg_data() argument
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/openbmc/linux/drivers/net/ethernet/huawei/hinic/
H A Dhinic_hw_mgmt.c130 u16 cmd, u16 msg_id) in prepare_header() argument
145 HINIC_MSG_HEADER_SET(msg_id, MSG_ID); in prepare_header()
209 u16 msg_id; in send_msg_to_mgmt() local
211 msg_id = SYNC_MSG_ID(pf_to_mgmt); in send_msg_to_mgmt()
219 direction, cmd, msg_id); in send_msg_to_mgmt()
257 u16 msg_id; in msg_to_mgmt_sync() local
267 msg_id = SYNC_MSG_ID(pf_to_mgmt); in msg_to_mgmt_sync()
269 msg_id = resp_msg_id; in msg_to_mgmt_sync()
283 dev_err(&pdev->dev, "MGMT timeout, MSG id = %d\n", msg_id); in msg_to_mgmt_sync()
291 if (recv_msg->msg_id != msg_id) { in msg_to_mgmt_sync()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
H A Ddcn31_smu.c105 unsigned int msg_id, in dcn31_smu_send_msg_with_param() argument
126 REG_WRITE(MP1_SMN_C2PMSG_67, msg_id); in dcn31_smu_send_msg_with_param()
131 if (msg_id == VBIOSSMC_MSG_TransferTableDram2Smu && in dcn31_smu_send_msg_with_param()
142 dm_helpers_smu_timeout(CTX, msg_id, param, 10 * 200000); in dcn31_smu_send_msg_with_param()
327 unsigned int msg_id, param; in dcn31_smu_set_zstate_support() local
343 msg_id = VBIOSSMC_MSG_DisallowZstatesEntry; in dcn31_smu_set_zstate_support()
345 msg_id = VBIOSSMC_MSG_AllowZstatesEntry; in dcn31_smu_set_zstate_support()
349 msg_id, in dcn31_smu_set_zstate_support()
/openbmc/linux/sound/soc/intel/atom/sst/
H A Dsst_ipc.c28 u32 msg_id, u32 drv_id) in sst_create_block() argument
38 msg->msg_id = msg_id; in sst_create_block()
71 dev_dbg(ctx->dev, "Block ipc %d, drv_id %d\n", block->msg_id, in sst_wake_up_block()
73 if (block->msg_id == ipc && block->drv_id == drv_id) { in sst_wake_up_block()
250 u32 msg_id; in process_fw_async_msg() local
258 msg_id = ((struct ipc_dsp_hdr *)msg->mailbox_data)->cmd_id; in process_fw_async_msg()
262 switch (msg_id) { in process_fw_async_msg()
313 "Unrecognized async msg from FW msg_id %#x\n", msg_id); in process_fw_async_msg()
348 msg_high.part.msg_id, NULL, 0); in sst_process_reply_mrfld()
366 msg_high.part.msg_id, data, msg_low)) in sst_process_reply_mrfld()
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/openbmc/linux/include/linux/soc/qcom/
H A Dqmi.h28 u16 msg_id; member
190 unsigned int msg_id; member
251 struct qmi_txn *txn, int msg_id, size_t len,
254 struct qmi_txn *txn, int msg_id, size_t len,
257 int msg_id, size_t len, const struct qmi_elem_info *ei,
260 void *qmi_encode_message(int type, unsigned int msg_id, size_t *len,
/openbmc/linux/drivers/gpu/drm/amd/display/modules/hdcp/
H A Dhdcp_ddc.c151 enum mod_hdcp_ddc_message_id msg_id, in read() argument
159 if (msg_id == MOD_HDCP_MESSAGE_ID_INVALID || in read()
160 msg_id >= MOD_HDCP_MESSAGE_ID_MAX) in read()
166 if (msg_id >= num_dpcd_addrs) in read()
172 hdcp_dpcd_addrs[msg_id] + data_offset, in read()
185 if (msg_id >= num_i2c_offsets) in read()
191 hdcp_i2c_offsets[msg_id], in read()
200 enum mod_hdcp_ddc_message_id msg_id, in read_repeatedly() argument
211 status = read(hdcp, msg_id, buf + data_offset, cur_size); in read_repeatedly()
224 enum mod_hdcp_ddc_message_id msg_id, in write() argument
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/openbmc/linux/drivers/infiniband/ulp/rtrs/
H A Drtrs-srv-trace.h43 __field(u32, msg_id)
61 __entry->msg_id = id->msg_id;
76 __entry->msg_id,
/openbmc/linux/drivers/soc/qcom/
H A Dsmd-rpm.c55 __le32 msg_id; member
75 __le32 msg_id; member
100 static unsigned msg_id = 1; in qcom_rpm_smd_write() local
123 pkt->req.msg_id = cpu_to_le32(msg_id++); in qcom_rpm_smd_write()
H A Dqmi_interface.c403 handler->msg_id == hdr->msg_id) in qmi_invoke_handler()
741 int type, int msg_id, size_t len, in qmi_send_message() argument
751 msg_id, &len, in qmi_send_message()
793 struct qmi_txn *txn, int msg_id, size_t len, in qmi_send_request() argument
796 return qmi_send_message(qmi, sq, txn, QMI_REQUEST, msg_id, len, ei, in qmi_send_request()
814 struct qmi_txn *txn, int msg_id, size_t len, in qmi_send_response() argument
817 return qmi_send_message(qmi, sq, txn, QMI_RESPONSE, msg_id, len, ei, in qmi_send_response()
834 int msg_id, size_t len, in qmi_send_indication() argument
846 rval = qmi_send_message(qmi, sq, &txn, QMI_INDICATION, msg_id, len, ei, in qmi_send_indication()
/openbmc/qemu/python/qemu/qmp/
H A Dqmp_client.py432 msg_id: Optional[str] = None
435 msg_id = msg['id']
437 self._pending[msg_id] = asyncio.Queue(maxsize=1)
441 del self._pending[msg_id]
444 return msg_id
447 async def _reply(self, msg_id: Union[str, None]) -> Message:
458 queue = self._pending[msg_id]
466 del self._pending[msg_id]
/openbmc/linux/drivers/misc/bcm-vk/
H A Dbcm_vk_msg.c274 vk->msg_id++; in bcm_vk_get_msg_id()
275 if (vk->msg_id == VK_MSG_ID_BITMAP_SIZE) in bcm_vk_get_msg_id()
276 vk->msg_id = 1; in bcm_vk_get_msg_id()
278 if (test_bit(vk->msg_id, vk->bmap)) { in bcm_vk_get_msg_id()
282 rc = vk->msg_id; in bcm_vk_get_msg_id()
283 bitmap_set(vk->bmap, vk->msg_id, 1); in bcm_vk_get_msg_id()
372 u32 msg_id; in bcm_vk_drain_all_pend() local
376 msg_id = get_msg_id(msg); in bcm_vk_drain_all_pend()
377 bit_set = test_bit(msg_id, vk->bmap); in bcm_vk_drain_all_pend()
383 msg_id, entry->seq_num, in bcm_vk_drain_all_pend()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
H A Ddcn315_smu.c133 unsigned int msg_id, unsigned int param) in dcn315_smu_send_msg_with_param() argument
158 mmMP1_C2PMSG_3, msg_id); in dcn315_smu_send_msg_with_param()
162 if (read_back_data == msg_id) in dcn315_smu_send_msg_with_param()
172 dm_helpers_smu_timeout(CTX, msg_id, param, 10 * 200000); in dcn315_smu_send_msg_with_param()

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