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Searched refs:mmsys (Results 1 – 21 of 21) sorted by relevance

/openbmc/linux/drivers/soc/mediatek/
H A Dmtk-mmsys.c140 static void mtk_mmsys_update_bits(struct mtk_mmsys *mmsys, u32 offset, u32 mask, u32 val, in mtk_mmsys_update_bits() argument
146 if (mmsys->cmdq_base.size && cmdq_pkt) { in mtk_mmsys_update_bits()
147 ret = cmdq_pkt_write_mask(cmdq_pkt, mmsys->cmdq_base.subsys, in mtk_mmsys_update_bits()
148 mmsys->cmdq_base.offset + offset, val, in mtk_mmsys_update_bits()
155 tmp = readl_relaxed(mmsys->regs + offset); in mtk_mmsys_update_bits()
157 writel_relaxed(tmp, mmsys->regs + offset); in mtk_mmsys_update_bits()
164 struct mtk_mmsys *mmsys = dev_get_drvdata(dev); in mtk_mmsys_ddp_connect() local
165 const struct mtk_mmsys_routes *routes = mmsys->data->routes; in mtk_mmsys_ddp_connect()
168 for (i = 0; i < mmsys->data->num_routes; i++) in mtk_mmsys_ddp_connect()
170 mtk_mmsys_update_bits(mmsys, routes[i].addr, routes[i].mask, in mtk_mmsys_ddp_connect()
[all …]
H A DMakefile7 obj-$(CONFIG_MTK_MMSYS) += mtk-mmsys.o
/openbmc/linux/arch/arm/boot/dts/mediatek/
H A Dmt7623n.dtsi51 mmsys: syscon@14000000 { label
52 compatible = "mediatek,mt7623-mmsys",
53 "mediatek,mt2701-mmsys",
65 clocks = <&mmsys CLK_MM_SMI_LARB0>,
66 <&mmsys CLK_MM_SMI_LARB0>;
133 <&mmsys CLK_MM_SMI_COMMON>,
144 clocks = <&mmsys CLK_MM_DISP_OVL>;
153 clocks = <&mmsys CLK_MM_DISP_RDMA>;
162 clocks = <&mmsys CLK_MM_DISP_WDMA>;
171 clocks = <&mmsys CLK_MM_MDP_BLS_26M>,
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H A Dmt2701.dtsi193 <&mmsys CLK_MM_SMI_COMMON>,
514 mmsys: syscon@14000000 { label
515 compatible = "mediatek,mt2701-mmsys", "syscon";
524 clocks = <&mmsys CLK_MM_MDP_BLS_26M>, <&mmsys CLK_MM_DISP_BLS>;
534 clocks = <&mmsys CLK_MM_SMI_LARB0>,
535 <&mmsys CLK_MM_SMI_LARB0>;
/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dmediatek-mdp.txt36 clocks = <&mmsys CLK_MM_MDP_RDMA0>,
37 <&mmsys CLK_MM_MUTEX_32K>;
46 clocks = <&mmsys CLK_MM_MDP_RDMA1>,
47 <&mmsys CLK_MM_MUTEX_32K>;
55 clocks = <&mmsys CLK_MM_MDP_RSZ0>;
62 clocks = <&mmsys CLK_MM_MDP_RSZ1>;
69 clocks = <&mmsys CLK_MM_MDP_RSZ2>;
76 clocks = <&mmsys CLK_MM_MDP_WDMA>;
84 clocks = <&mmsys CLK_MM_MDP_WROT0>;
92 clocks = <&mmsys CLK_MM_MDP_WROT1>;
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8173.dtsi987 mmsys: syscon@14000000 { label
988 compatible = "mediatek,mt8173-mmsys", "syscon";
1004 clocks = <&mmsys CLK_MM_MDP_RDMA0>,
1005 <&mmsys CLK_MM_MUTEX_32K>;
1014 clocks = <&mmsys CLK_MM_MDP_RDMA1>,
1015 <&mmsys CLK_MM_MUTEX_32K>;
1023 clocks = <&mmsys CLK_MM_MDP_RSZ0>;
1030 clocks = <&mmsys CLK_MM_MDP_RSZ1>;
1037 clocks = <&mmsys CLK_MM_MDP_RSZ2>;
1044 clocks = <&mmsys CLK_MM_MDP_WDMA>;
[all …]
H A Dmt8167.dtsi127 mmsys: syscon@14000000 { label
128 compatible = "mediatek,mt8167-mmsys", "syscon";
136 clocks = <&mmsys CLK_MM_SMI_COMMON>,
137 <&mmsys CLK_MM_SMI_COMMON>;
146 clocks = <&mmsys CLK_MM_SMI_LARB0>,
147 <&mmsys CLK_MM_SMI_LARB0>;
H A Dmt8183.dtsi908 <&mmsys CLK_MM_SMI_COMMON>,
909 <&mmsys CLK_MM_SMI_LARB0>,
910 <&mmsys CLK_MM_SMI_LARB1>,
911 <&mmsys CLK_MM_GALS_COMM0>,
912 <&mmsys CLK_MM_GALS_COMM1>,
913 <&mmsys CLK_MM_GALS_CCU2MM>,
914 <&mmsys CLK_MM_GALS_IPU12MM>,
915 <&mmsys CLK_MM_GALS_IMG2MM>,
916 <&mmsys CLK_MM_GALS_CAM2MM>,
917 <&mmsys CLK_MM_GALS_IPU2MM>;
[all …]
H A Dmt8192.dtsi563 <&mmsys CLK_MM_SMI_INFRA>,
564 <&mmsys CLK_MM_SMI_COMMON>,
565 <&mmsys CLK_MM_SMI_GALS>,
566 <&mmsys CLK_MM_SMI_IOMMU>;
1400 mmsys: syscon@14000000 { label
1401 compatible = "mediatek,mt8192-mmsys", "syscon";
1414 clocks = <&mmsys CLK_MM_DISP_MUTEX0>;
1424 clocks = <&mmsys CLK_MM_SMI_COMMON>,
1425 <&mmsys CLK_MM_SMI_INFRA>,
1426 <&mmsys CLK_MM_SMI_GALS>,
[all …]
H A Dmt8186.dtsi982 <&mmsys CLK_MM_SMI_INFRA>,
983 <&mmsys CLK_MM_SMI_COMMON>,
984 <&mmsys CLK_MM_SMI_GALS>,
985 <&mmsys CLK_MM_SMI_IOMMU>;
1722 mmsys: syscon@14000000 { label
1723 compatible = "mediatek,mt8186-mmsys", "syscon";
1735 clocks = <&mmsys CLK_MM_DISP_MUTEX0>;
1746 clocks = <&mmsys CLK_MM_SMI_COMMON>, <&mmsys CLK_MM_SMI_COMMON>,
1747 <&mmsys CLK_MM_SMI_GALS>, <&mmsys CLK_MM_SMI_GALS>;
1755 clocks = <&mmsys CLK_MM_SMI_COMMON>,
[all …]
H A Dmt2712e.dtsi994 mmsys: syscon@14000000 { label
995 compatible = "mediatek,mt2712-mmsys", "syscon";
1006 clocks = <&mmsys CLK_MM_SMI_LARB0>,
1007 <&mmsys CLK_MM_SMI_LARB0>;
1015 clocks = <&mmsys CLK_MM_SMI_COMMON>,
1016 <&mmsys CLK_MM_SMI_COMMON>;
1026 clocks = <&mmsys CLK_MM_SMI_LARB4>,
1027 <&mmsys CLK_MM_SMI_LARB4>;
1037 clocks = <&mmsys CLK_MM_SMI_LARB5>,
1038 <&mmsys CLK_MM_SMI_LARB5>;
[all …]
H A Dmt6795.dtsi680 mmsys: syscon@14000000 { label
681 compatible = "mediatek,mt6795-mmsys", "syscon";
696 clocks = <&mmsys CLK_MM_SMI_COMMON>, <&mmsys CLK_MM_SMI_LARB0>;
707 clocks = <&infracfg CLK_INFRA_SMI>, <&mmsys CLK_MM_SMI_COMMON>;
714 clocks = <&mmsys CLK_MM_SMI_COMMON>, <&infracfg CLK_INFRA_SMI>;
H A Dmt6779.dtsi251 mmsys: syscon@14000000 { label
252 compatible = "mediatek,mt6779-mmsys", "syscon";
H A Dmt6797.dtsi449 mmsys: syscon@14000000 { label
450 compatible = "mediatek,mt6797-mmsys", "syscon";
H A Dmt8195.dtsi2621 compatible = "mediatek,mt8195-vdosys0", "mediatek,mt8195-mmsys", "syscon";
/openbmc/linux/drivers/clk/mediatek/
H A DKconfig30 bool "Clock driver for MediaTek MT2701 mmsys"
33 This driver supports MediaTek MT2701 mmsys clocks.
110 tristate "Clock driver for MediaTek MT2712 mmsys"
113 This driver supports MediaTek MT2712 mmsys clocks.
154 tristate "Clock driver for MediaTek MT6765 mmsys"
157 This driver supports MediaTek MT6765 mmsys clocks.
222 tristate "Clock driver for MediaTek MT6779 mmsys"
225 This driver supports MediaTek MT6779 mmsys clocks.
287 tristate "Clock driver for MediaTek MT6795 mmsys"
291 This driver supports MediaTek MT6795 mmsys clocks.
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/openbmc/linux/
H A Dopengrok0.0.log[all...]
H A Dopengrok2.0.log[all...]
H A Dopengrok1.0.log[all...]
/openbmc/
Dopengrok1.0.log[all...]
Dopengrok2.0.log[all...]