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Searched refs:maxsz (Results 1 – 21 of 21) sorted by relevance

/openbmc/qemu/include/tcg/
H A Dtcg-op-gvec-common.h26 uint32_t oprsz, uint32_t maxsz, int32_t data,
32 uint32_t oprsz, uint32_t maxsz, int32_t data,
38 TCGv_ptr ptr, uint32_t oprsz, uint32_t maxsz,
44 uint32_t oprsz, uint32_t maxsz, int32_t data,
51 uint32_t cofs, uint32_t oprsz, uint32_t maxsz,
59 uint32_t maxsz, int32_t data, gen_helper_gvec_5 *fn);
64 TCGv_ptr ptr, uint32_t oprsz, uint32_t maxsz,
71 uint32_t maxsz, int32_t data,
78 uint32_t oprsz, uint32_t maxsz, int32_t data,
231 uint32_t oprsz, uint32_t maxsz, const GVecGen2 *);
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H A Dtcg-gvec-desc.h43 uint32_t simd_desc(uint32_t oprsz, uint32_t maxsz, int32_t data);
/openbmc/qemu/tcg/
H A Dtcg-op-gvec.c38 static void check_size_align(uint32_t oprsz, uint32_t maxsz, uint32_t ofs) in check_size_align() argument
46 tcg_debug_assert(oprsz <= maxsz); in check_size_align()
49 tcg_debug_assert(oprsz == maxsz); in check_size_align()
52 tcg_debug_assert(maxsz <= (8 << SIMD_MAXSZ_BITS)); in check_size_align()
54 max_align = maxsz >= 16 ? 15 : 7; in check_size_align()
55 tcg_debug_assert((maxsz & max_align) == 0); in check_size_align()
86 uint32_t simd_desc(uint32_t oprsz, uint32_t maxsz, int32_t data) in simd_desc() argument
90 check_size_align(oprsz, maxsz, 0); in simd_desc()
107 maxsz = (maxsz / 8) - 1; in simd_desc()
114 if (oprsz == maxsz) { in simd_desc()
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/openbmc/qemu/target/loongarch/tcg/insn_trans/
H A Dtrans_vec.c.inc549 uint32_t vk_ofs, uint32_t oprsz, uint32_t maxsz)
581 tcg_gen_gvec_3(vd_ofs, vj_ofs, vk_ofs, oprsz, maxsz, &op[vece]);
632 uint32_t vk_ofs, uint32_t oprsz, uint32_t maxsz)
664 tcg_gen_gvec_3(vd_ofs, vj_ofs, vk_ofs, oprsz, maxsz, &op[vece]);
720 uint32_t vk_ofs, uint32_t oprsz, uint32_t maxsz)
752 tcg_gen_gvec_3(vd_ofs, vj_ofs, vk_ofs, oprsz, maxsz, &op[vece]);
803 uint32_t vk_ofs, uint32_t oprsz, uint32_t maxsz)
835 tcg_gen_gvec_3(vd_ofs, vj_ofs, vk_ofs, oprsz, maxsz, &op[vece]);
882 uint32_t vk_ofs, uint32_t oprsz, uint32_t maxsz)
914 tcg_gen_gvec_3(vd_ofs, vj_ofs, vk_ofs, oprsz, maxsz, &op[vece]);
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/openbmc/qemu/target/arm/tcg/
H A Dtranslate-mve.c1518 int64_t c, uint32_t oprsz, uint32_t maxsz) in gen_gvec_vmovi() argument
1520 tcg_gen_gvec_dup_imm(vece, dofs, oprsz, maxsz, c); in gen_gvec_vmovi()
1611 int64_t shift, uint32_t oprsz, uint32_t maxsz) in do_gvec_shri_s() argument
1621 tcg_gen_gvec_sari(vece, dofs, aofs, shift, oprsz, maxsz); in do_gvec_shri_s()
1625 int64_t shift, uint32_t oprsz, uint32_t maxsz) in do_gvec_shri_u() argument
1633 tcg_gen_gvec_dup_imm(vece, dofs, oprsz, maxsz, 0); in do_gvec_shri_u()
1635 tcg_gen_gvec_shri(vece, dofs, aofs, shift, oprsz, maxsz); in do_gvec_shri_u()
1730 int64_t shift, uint32_t oprsz, uint32_t maxsz)
1734 tcg_gen_gvec_shli(ovece, dofs, aofs, ibits, oprsz, maxsz);
1735 tcg_gen_gvec_sari(ovece, dofs, dofs, ibits - shift, oprsz, maxsz);
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H A Dgengvec64.c153 uint32_t a, uint32_t oprsz, uint32_t maxsz) in gen_gvec_eor3() argument
162 tcg_gen_gvec_4(d, n, m, a, oprsz, maxsz, &op); in gen_gvec_eor3()
179 uint32_t a, uint32_t oprsz, uint32_t maxsz) in gen_gvec_bcax() argument
188 tcg_gen_gvec_4(d, n, m, a, oprsz, maxsz, &op); in gen_gvec_bcax()
H A Dtranslate-neon.c839 uint32_t oprsz, uint32_t maxsz) \ in DO_3SAME()
841 tcg_gen_gvec_bitsel(vece, rd_ofs, O1, O2, O3, oprsz, maxsz); \ in DO_3SAME()
885 uint32_t oprsz, uint32_t maxsz) \
887 tcg_gen_gvec_cmp(COND, vece, rd_ofs, rn_ofs, rm_ofs, oprsz, maxsz); \
899 uint32_t rm_ofs, uint32_t oprsz, uint32_t maxsz) \
901 tcg_gen_gvec_3_ool(rd_ofs, rn_ofs, rm_ofs, oprsz, maxsz, 0, FUNC); \
980 uint32_t oprsz, uint32_t maxsz) \
984 oprsz, maxsz, 0, FUNC); \
1452 int64_t c, uint32_t oprsz, uint32_t maxsz) in gen_VMOV_1r() argument
1454 tcg_gen_gvec_dup_imm(MO_64, dofs, oprsz, maxsz, c); in gen_VMOV_1r()
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H A Dtranslate-a64.h197 uint32_t a, uint32_t oprsz, uint32_t maxsz);
199 uint32_t a, uint32_t oprsz, uint32_t maxsz);
H A Dtranslate-sve.c581 uint32_t a, uint32_t oprsz, uint32_t maxsz) in TRANS_FEAT()
584 tcg_gen_gvec_bitsel(vece, d, a, n, m, oprsz, maxsz); in TRANS_FEAT()
610 uint32_t a, uint32_t oprsz, uint32_t maxsz) in gen_bsl1n() argument
619 tcg_gen_gvec_4(d, n, m, a, oprsz, maxsz, &op); in gen_bsl1n()
654 uint32_t a, uint32_t oprsz, uint32_t maxsz) in gen_bsl2n() argument
663 tcg_gen_gvec_4(d, n, m, a, oprsz, maxsz, &op); in gen_bsl2n()
683 uint32_t a, uint32_t oprsz, uint32_t maxsz) in gen_nbsl() argument
692 tcg_gen_gvec_4(d, n, m, a, oprsz, maxsz, &op); in gen_nbsl()
1636 unsigned maxsz = size_for_gvec(fullsz / 8); in do_predset() local
1640 tcg_gen_gvec_dup_imm(MO_64, ofs, oprsz, maxsz, word); in do_predset()
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H A Dsve_helper.c4195 uintptr_t i, oprsz = simd_oprsz(desc), maxsz = simd_data(desc); \
4205 for (; i < maxsz; i += sizeof(TYPE)) { \
4208 return NAME##_reduce(data, vs, maxsz / sizeof(TYPE)); \
H A Dtranslate-a64.c6934 int64_t c, uint32_t oprsz, uint32_t maxsz) in gen_movi() argument
6936 tcg_gen_gvec_dup_imm(MO_64, dofs, oprsz, maxsz, c); in gen_movi()
/openbmc/linux/drivers/misc/eeprom/
H A Dat25.c201 size_t maxsz = spi_max_transfer_size(at25->spi); in at25_ee_write() local
265 if (segment > maxsz) in at25_ee_write()
266 segment = maxsz; in at25_ee_write()
/openbmc/u-boot/include/
H A Dcommon.h251 int env_complete(char *var, int maxv, char *cmdv[], int maxsz, char *buf,
/openbmc/qemu/target/riscv/insn_trans/
H A Dtrans_rvv.c.inc641 * The first part is vlen in bytes (vlenb), encoded in maxsz of simd_desc.
1338 TCGv_i64 c, uint32_t oprsz, uint32_t maxsz)
1366 tcg_gen_gvec_2s(dofs, aofs, oprsz, maxsz, c, &rsub_op[vece]);
1460 int64_t c, uint32_t oprsz, uint32_t maxsz)
1463 tcg_gen_gvec_rsubs(vece, dofs, aofs, tmp, oprsz, maxsz);
3575 uint32_t maxsz = s->cfg_ptr->vlenb * LEN; \
3578 vreg_ofs(s, a->rs2), maxsz, maxsz); \
3581 tcg_env, maxsz, maxsz, 0, gen_helper_vmvr_v); \
/openbmc/qemu/accel/tcg/
H A Dtcg-runtime-gvec.c29 intptr_t maxsz = simd_maxsz(desc); in clear_high() local
32 if (unlikely(maxsz > oprsz)) { in clear_high()
33 for (i = oprsz; i < maxsz; i += sizeof(uint64_t)) { in clear_high()
/openbmc/qemu/target/riscv/
H A Dcpu_helper.c147 uint32_t maxsz = vlmax << vsew; in cpu_get_tb_cpu_state() local
149 (maxsz >= 8); in cpu_get_tb_cpu_state()
H A Dvector_helper.c5344 uint32_t maxsz = simd_maxsz(desc); local
5349 if (startb >= maxsz) {
5364 maxsz - i);
/openbmc/qemu/target/sparc/
H A Dtranslate.c950 uint32_t bofs, uint32_t oprsz, uint32_t maxsz) in gen_op_fchksm16() argument
961 tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &op); in gen_op_fchksm16()
978 uint32_t bofs, uint32_t oprsz, uint32_t maxsz) in gen_op_fmean16() argument
989 tcg_gen_gvec_3(dofs, aofs, bofs, oprsz, maxsz, &op); in gen_op_fmean16()
/openbmc/qemu/system/
H A Dphysmem.c2117 RAMBlock *qemu_ram_alloc_resizeable(ram_addr_t size, ram_addr_t maxsz, in qemu_ram_alloc_resizeable() argument
2123 return qemu_ram_alloc_internal(size, maxsz, resized, NULL, in qemu_ram_alloc_resizeable()
/openbmc/qemu/target/s390x/tcg/
H A Dtranslate_vx.c.inc31 * On s390x, the operand size (oprsz) and the maximum size (maxsz) are
/openbmc/qemu/target/i386/tcg/
H A Demit.c.inc2590 * it disqualifies using oprsz < maxsz to emulate VEX128.