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/openbmc/linux/drivers/hwmon/
H A Ddme1737.c74 #define DME1737_REG_IN(ix) ((ix) < 5 ? 0x20 + (ix) : \ argument
75 (ix) < 7 ? 0x94 + (ix) : \
77 #define DME1737_REG_IN_MIN(ix) ((ix) < 5 ? 0x44 + (ix) * 2 \ argument
78 : 0x91 + (ix) * 2)
79 #define DME1737_REG_IN_MAX(ix) ((ix) < 5 ? 0x45 + (ix) * 2 \ argument
80 : 0x92 + (ix) * 2)
83 #define DME1737_REG_TEMP(ix) (0x25 + (ix)) argument
84 #define DME1737_REG_TEMP_MIN(ix) (0x4e + (ix) * 2) argument
85 #define DME1737_REG_TEMP_MAX(ix) (0x4f + (ix) * 2) argument
86 #define DME1737_REG_TEMP_OFFSET(ix) ((ix) == 0 ? 0x1f \ argument
[all …]
H A Dvt1211.c62 #define VT1211_REG_IN(ix) (0x21 + (ix)) argument
63 #define VT1211_REG_IN_MIN(ix) ((ix) == 0 ? 0x3e : 0x2a + 2 * (ix)) argument
64 #define VT1211_REG_IN_MAX(ix) ((ix) == 0 ? 0x3d : 0x29 + 2 * (ix)) argument
72 #define VT1211_REG_FAN(ix) (0x29 + (ix)) argument
73 #define VT1211_REG_FAN_MIN(ix) (0x3b + (ix)) argument
78 #define VT1211_REG_PWM(ix) (0x60 + (ix)) argument
82 #define VT1211_REG_PWM_AUTO_PWM(ix, ap) (0x58 + 2 * (ix) - (ap)) argument
134 #define ISVOLT(ix, uch_config) ((ix) > 4 ? 1 : \ argument
135 !(((uch_config) >> ((ix) + 2)) & 1))
138 #define ISTEMP(ix, uch_config) ((ix) < 2 ? 1 : \ argument
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H A Damc6821.c271 int ix = to_sensor_dev_attr(devattr)->index; in temp_show() local
273 return sprintf(buf, "%d\n", data->temp[ix] * 1000); in temp_show()
281 int ix = to_sensor_dev_attr(attr)->index; in temp_store() local
290 data->temp[ix] = val; in temp_store()
291 if (i2c_smbus_write_byte_data(client, temp_reg[ix], data->temp[ix])) { in temp_store()
303 int ix = to_sensor_dev_attr(devattr)->index; in temp_alarm_show() local
306 switch (ix) { in temp_alarm_show()
326 dev_dbg(dev, "Unknown attr->index (%d).\n", ix); in temp_alarm_show()
436 int ix = to_sensor_dev_attr_2(devattr)->index; in temp_auto_point_temp_show() local
442 data->temp1_auto_point_temp[ix] * 1000); in temp_auto_point_temp_show()
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/openbmc/linux/arch/sh/kernel/cpu/sh2a/
H A Dfpu.c96 unsigned int ix, iy; in denormal_mulf() local
100 ix = hx & 0x7fffffff; in denormal_mulf()
102 if (iy < 0x00800000 || ix == 0) in denormal_mulf()
106 ix &= 0x007fffff; in denormal_mulf()
108 m = (unsigned long long)ix * iy; in denormal_mulf()
116 ix = ((int) (m >> (w - 23)) & 0x007fffff) | (exp << 23); in denormal_mulf()
118 ix = (int) (m >> (w - 22 - exp)) & 0x007fffff; in denormal_mulf()
120 ix = 0; in denormal_mulf()
122 ix |= (hx ^ hy) & 0x80000000; in denormal_mulf()
123 return ix; in denormal_mulf()
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/openbmc/linux/io_uring/
H A Dxattr.c27 struct io_xattr *ix = io_kiocb_to_cmd(req, struct io_xattr); in io_xattr_cleanup() local
29 if (ix->filename) in io_xattr_cleanup()
30 putname(ix->filename); in io_xattr_cleanup()
32 kfree(ix->ctx.kname); in io_xattr_cleanup()
33 kvfree(ix->ctx.kvalue); in io_xattr_cleanup()
47 struct io_xattr *ix = io_kiocb_to_cmd(req, struct io_xattr); in __io_getxattr_prep() local
54 ix->filename = NULL; in __io_getxattr_prep()
55 ix->ctx.kvalue = NULL; in __io_getxattr_prep()
57 ix->ctx.cvalue = u64_to_user_ptr(READ_ONCE(sqe->addr2)); in __io_getxattr_prep()
58 ix->ctx.size = READ_ONCE(sqe->len); in __io_getxattr_prep()
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/openbmc/linux/drivers/net/ethernet/mellanox/mlx5/core/en/
H A Drx_res.c297 int ix; in mlx5e_rx_res_channels_init() local
309 for (ix = 0; ix < res->max_nch; ix++) { in mlx5e_rx_res_channels_init()
310 err = mlx5e_rqt_init_direct(&res->channels[ix].direct_rqt, in mlx5e_rx_res_channels_init()
314 err, ix); in mlx5e_rx_res_channels_init()
319 for (ix = 0; ix < res->max_nch; ix++) { in mlx5e_rx_res_channels_init()
321 mlx5e_rqt_get_rqtn(&res->channels[ix].direct_rqt), in mlx5e_rx_res_channels_init()
326 err = mlx5e_tir_init(&res->channels[ix].direct_tir, builder, res->mdev, true); in mlx5e_rx_res_channels_init()
329 err, ix); in mlx5e_rx_res_channels_init()
339 while (--ix >= 0) in mlx5e_rx_res_channels_init()
340 mlx5e_tir_destroy(&res->channels[ix].direct_tir); in mlx5e_rx_res_channels_init()
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H A Dchannels.c13 static struct mlx5e_channel *mlx5e_channels_get(struct mlx5e_channels *chs, unsigned int ix) in mlx5e_channels_get() argument
15 WARN_ON_ONCE(ix >= mlx5e_channels_get_num(chs)); in mlx5e_channels_get()
16 return chs->c[ix]; in mlx5e_channels_get()
19 bool mlx5e_channels_is_xsk(struct mlx5e_channels *chs, unsigned int ix) in mlx5e_channels_is_xsk() argument
21 struct mlx5e_channel *c = mlx5e_channels_get(chs, ix); in mlx5e_channels_is_xsk()
26 void mlx5e_channels_get_regular_rqn(struct mlx5e_channels *chs, unsigned int ix, u32 *rqn) in mlx5e_channels_get_regular_rqn() argument
28 struct mlx5e_channel *c = mlx5e_channels_get(chs, ix); in mlx5e_channels_get_regular_rqn()
33 void mlx5e_channels_get_xsk_rqn(struct mlx5e_channels *chs, unsigned int ix, u32 *rqn) in mlx5e_channels_get_xsk_rqn() argument
35 struct mlx5e_channel *c = mlx5e_channels_get(chs, ix); in mlx5e_channels_get_xsk_rqn()
H A Drqt.c72 unsigned int ix = i; in mlx5e_calc_indir_rqns() local
75 ix = mlx5e_bits_invert(ix, ilog2(MLX5E_INDIR_RQT_SIZE)); in mlx5e_calc_indir_rqns()
77 ix = indir->table[ix]; in mlx5e_calc_indir_rqns()
79 if (WARN_ON(ix >= num_rqns)) in mlx5e_calc_indir_rqns()
84 rss_rqns[i] = rqns[ix]; in mlx5e_calc_indir_rqns()
/openbmc/linux/arch/mips/math-emu/
H A Dsp_sqrt.c14 int ix, s, q, m, t, i; in ieee754sp_sqrt() local
56 ix = x.bits; in ieee754sp_sqrt()
59 m = (ix >> 23); in ieee754sp_sqrt()
61 for (i = 0; (ix & 0x00800000) == 0; i++) in ieee754sp_sqrt()
62 ix <<= 1; in ieee754sp_sqrt()
66 ix = (ix & 0x007fffff) | 0x00800000; in ieee754sp_sqrt()
68 ix += ix; in ieee754sp_sqrt()
72 ix += ix; in ieee754sp_sqrt()
79 if (t <= ix) { in ieee754sp_sqrt()
81 ix -= t; in ieee754sp_sqrt()
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/openbmc/linux/drivers/net/ethernet/mellanox/mlx5/core/en/xsk/
H A Dpool.c46 static int mlx5e_xsk_add_pool(struct mlx5e_xsk *xsk, struct xsk_buff_pool *pool, u16 ix) in mlx5e_xsk_add_pool() argument
54 xsk->pools[ix] = pool; in mlx5e_xsk_add_pool()
58 static void mlx5e_xsk_remove_pool(struct mlx5e_xsk *xsk, u16 ix) in mlx5e_xsk_remove_pool() argument
60 xsk->pools[ix] = NULL; in mlx5e_xsk_remove_pool()
79 struct xsk_buff_pool *pool, u16 ix) in mlx5e_xsk_enable_locked() argument
86 if (unlikely(mlx5e_xsk_get_pool(&priv->channels.params, &priv->xsk, ix))) in mlx5e_xsk_enable_locked()
96 err = mlx5e_xsk_add_pool(&priv->xsk, pool, ix); in mlx5e_xsk_enable_locked()
123 c = priv->channels.c[ix]; in mlx5e_xsk_enable_locked()
136 mlx5e_rx_res_xsk_update(priv->rx_res, &priv->channels, ix, true); in mlx5e_xsk_enable_locked()
144 mlx5e_xsk_remove_pool(&priv->xsk, ix); in mlx5e_xsk_enable_locked()
[all …]
/openbmc/qemu/tests/tcg/s390x/
H A Dvxeh2_vlstr.c99 int ix; in main() local
125 for (ix = 0; ix < 4; ix++) { in main()
126 if (vd.w[ix] != (ix != 1 ? 0 : 0xBEAD0BCE)) { in main()
132 for (ix = 0; ix < 8; ix++) { in main()
133 if (0xAD0B != vd.h[ix]) { in main()
H A Dvxeh2_vs.c73 for (int ix = 0; ix < 16; ix++) { in main() local
74 vsi.b[ix] = (1 + (5 ^ ~ix)) & 7; in main()
/openbmc/linux/drivers/net/ethernet/mellanox/mlx5/core/
H A Dwq.h82 void mlx5_wq_cyc_wqe_dump(struct mlx5_wq_cyc *wq, u16 ix, u8 nstrides);
157 static inline void *mlx5_wq_cyc_get_wqe(struct mlx5_wq_cyc *wq, u16 ix) in mlx5_wq_cyc_get_wqe() argument
159 return mlx5_frag_buf_get_wqe(&wq->fbc, ix); in mlx5_wq_cyc_get_wqe()
162 static inline u16 mlx5_wq_cyc_get_contig_wqebbs(struct mlx5_wq_cyc *wq, u16 ix) in mlx5_wq_cyc_get_contig_wqebbs() argument
164 return mlx5_frag_buf_get_idx_last_contig_stride(&wq->fbc, ix) - ix + 1; in mlx5_wq_cyc_get_contig_wqebbs()
200 static inline struct mlx5_cqe64 *mlx5_cqwq_get_wqe(struct mlx5_cqwq *wq, u32 ix) in mlx5_cqwq_get_wqe() argument
202 struct mlx5_cqe64 *cqe = mlx5_frag_buf_get_wqe(&wq->fbc, ix); in mlx5_cqwq_get_wqe()
283 static inline void *mlx5_wq_ll_get_wqe(struct mlx5_wq_ll *wq, u16 ix) in mlx5_wq_ll_get_wqe() argument
285 return mlx5_frag_buf_get_wqe(&wq->fbc, ix); in mlx5_wq_ll_get_wqe()
288 static inline u16 mlx5_wq_ll_get_wqe_next_ix(struct mlx5_wq_ll *wq, u16 ix) in mlx5_wq_ll_get_wqe_next_ix() argument
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/openbmc/linux/arch/s390/lib/
H A Dspinlock.c63 int ix; in arch_spin_lock_setup() local
66 for (ix = 0; ix < 4; ix++, node++) { in arch_spin_lock_setup()
69 (ix << _Q_TAIL_IDX_OFFSET); in arch_spin_lock_setup()
99 int ix, cpu; in arch_spin_decode_tail() local
101 ix = (lock & _Q_TAIL_IDX_MASK) >> _Q_TAIL_IDX_OFFSET; in arch_spin_decode_tail()
103 return per_cpu_ptr(&spin_wait[ix], cpu - 1); in arch_spin_decode_tail()
120 int lockval, ix, node_id, tail_id, old, new, owner, count; in arch_spin_lock_queued() local
122 ix = S390_lowcore.spinlock_index++; in arch_spin_lock_queued()
125 node = this_cpu_ptr(&spin_wait[ix]); in arch_spin_lock_queued()
/openbmc/linux/fs/qnx4/
H A Ddir.c61 int ix, ino; in qnx4_readdir() local
74 ix = (ctx->pos >> QNX4_DIR_ENTRY_SIZE_BITS) % QNX4_INODES_PER_BLOCK; in qnx4_readdir()
75 for (; ix < QNX4_INODES_PER_BLOCK; ix++, ctx->pos += QNX4_DIR_ENTRY_SIZE) { in qnx4_readdir()
78 offset = ix * QNX4_DIR_ENTRY_SIZE; in qnx4_readdir()
87 ino = blknum * QNX4_INODES_PER_BLOCK + ix - 1; in qnx4_readdir()
/openbmc/linux/drivers/net/ethernet/mellanox/mlx5/core/lib/
H A Dfs_ttc.c295 int ix = 0; in mlx5_create_ttc_table_groups() local
318 MLX5_SET_CFG(in, start_flow_index, ix); in mlx5_create_ttc_table_groups()
319 ix += MLX5_TTC_GROUP1_SIZE; in mlx5_create_ttc_table_groups()
320 MLX5_SET_CFG(in, end_flow_index, ix - 1); in mlx5_create_ttc_table_groups()
328 MLX5_SET_CFG(in, start_flow_index, ix); in mlx5_create_ttc_table_groups()
329 ix += MLX5_TTC_GROUP2_SIZE; in mlx5_create_ttc_table_groups()
330 MLX5_SET_CFG(in, end_flow_index, ix - 1); in mlx5_create_ttc_table_groups()
338 MLX5_SET_CFG(in, start_flow_index, ix); in mlx5_create_ttc_table_groups()
339 ix += MLX5_TTC_GROUP3_SIZE; in mlx5_create_ttc_table_groups()
340 MLX5_SET_CFG(in, end_flow_index, ix - 1); in mlx5_create_ttc_table_groups()
[all …]
H A Dipsec_fs_roce.c147 int ix = 0; in mlx5_ipsec_fs_roce_tx_create() local
170 MLX5_SET_CFG(in, start_flow_index, ix); in mlx5_ipsec_fs_roce_tx_create()
171 ix += MLX5_TX_ROCE_GROUP_SIZE; in mlx5_ipsec_fs_roce_tx_create()
172 MLX5_SET_CFG(in, end_flow_index, ix - 1); in mlx5_ipsec_fs_roce_tx_create()
243 int ix = 0; in mlx5_ipsec_fs_roce_rx_create() local
278 MLX5_SET_CFG(in, start_flow_index, ix); in mlx5_ipsec_fs_roce_rx_create()
279 ix += MLX5_RX_ROCE_GROUP_SIZE; in mlx5_ipsec_fs_roce_rx_create()
280 MLX5_SET_CFG(in, end_flow_index, ix - 1); in mlx5_ipsec_fs_roce_rx_create()
290 MLX5_SET_CFG(in, start_flow_index, ix); in mlx5_ipsec_fs_roce_rx_create()
291 ix += MLX5_RX_ROCE_GROUP_SIZE; in mlx5_ipsec_fs_roce_rx_create()
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/openbmc/openbmc-test-automation/lib/
H A Dgen_arg.py85 for ix in range(0, len(stock_list)):
86 if len(stock_list[ix]) < 1:
89 + str(ix)
96 if isinstance(stock_list[ix], tuple):
97 arg_name = stock_list[ix][0]
98 default = stock_list[ix][1]
100 arg_name = stock_list[ix]
184 for ix in range(0, len(stock_list)):
185 if isinstance(stock_list[ix], tuple):
186 arg_name = stock_list[ix][0]
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H A Dvalid.tcl130 set ix 0
134 incr ix
136 lappend invalid_ix_list ${ix}
154 foreach ix $invalid_ix_list {
155 set new_value "[lindex $printed_var_list $ix]*"
156 set printed_var_list [lreplace $printed_var_list ${ix} ${ix} $new_value]
H A Descape.tcl64 for {set ix 0} {$ix < [string length $buffer]} {incr ix} {
65 set char [string index $buffer $ix]
/openbmc/linux/drivers/media/dvb-frontends/
H A Dmxl692.c196 u32 ix, div_size; in mxl692_checksum() local
203 for (ix = 0; ix < div_size; ix++) in mxl692_checksum()
204 cur_cksum += be32_to_cpu(buf[ix]); in mxl692_checksum()
215 u32 ix, temp; in mxl692_validate_fw_header() local
235 for (ix = 16; ix < buf_len; ix++) in mxl692_validate_fw_header()
236 temp_cksum += buffer[ix]; in mxl692_validate_fw_header()
251 u32 ix = 0, total_len = 0, addr = 0, chunk_len = 0, prevchunk_len = 0; in mxl692_write_fw_block() local
255 ix = *index; in mxl692_write_fw_block()
257 if (buffer[ix] == 0x53) { in mxl692_write_fw_block()
258 total_len = buffer[ix + 1] << 16 | buffer[ix + 2] << 8 | buffer[ix + 3]; in mxl692_write_fw_block()
[all …]
/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu_helper.h155 PHM_GET_FIELD(cgs_read_ind_register(device, port, ix##reg), \
159 PHM_GET_FIELD(cgs_read_ind_register(device, port, ix##reg), \
167 cgs_write_ind_register(device, port, ix##reg, \
168 PHM_SET_FIELD(cgs_read_ind_register(device, port, ix##reg), \
172 cgs_write_ind_register(device, port, ix##reg, \
173 PHM_SET_FIELD(cgs_read_ind_register(device, port, ix##reg), \
181 PHM_WAIT_INDIRECT_REGISTER_GIVEN_INDEX(hwmgr, port, ix##reg, value, mask)
192 PHM_WAIT_INDIRECT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, port, ix##reg, value, mask)
206 PHM_WAIT_VFPF_INDIRECT_REGISTER_UNEQUAL_GIVEN_INDEX(hwmgr, port, ix##reg, value, mask)
220 PHM_WAIT_VFPF_INDIRECT_REGISTER_GIVEN_INDEX(hwmgr, port, ix##reg, value, mask)
/openbmc/linux/fs/ext4/
H A Dext4_extents.h239 static inline ext4_fsblk_t ext4_idx_pblock(struct ext4_extent_idx *ix) in ext4_idx_pblock() argument
243 block = le32_to_cpu(ix->ei_leaf_lo); in ext4_idx_pblock()
244 block |= ((ext4_fsblk_t) le16_to_cpu(ix->ei_leaf_hi) << 31) << 1; in ext4_idx_pblock()
266 static inline void ext4_idx_store_pblock(struct ext4_extent_idx *ix, in ext4_idx_store_pblock() argument
269 ix->ei_leaf_lo = cpu_to_le32((unsigned long) (pb & 0xffffffff)); in ext4_idx_store_pblock()
270 ix->ei_leaf_hi = cpu_to_le16((unsigned long) ((pb >> 31) >> 1) & in ext4_idx_store_pblock()
/openbmc/linux/drivers/input/misc/
H A Dyealink.c282 int ix, len; in yealink_set_ringtone() local
298 ix = 0; in yealink_set_ringtone()
299 while (size != ix) { in yealink_set_ringtone()
300 len = size - ix; in yealink_set_ringtone()
304 p->offset = cpu_to_be16(ix); in yealink_set_ringtone()
305 memcpy(p->data, &buf[ix], len); in yealink_set_ringtone()
307 ix += len; in yealink_set_ringtone()
317 int i, ix, len; in yealink_do_idle_tasks() local
319 ix = yld->stat_ix; in yealink_do_idle_tasks()
327 if (ix >= sizeof(yld->master)) { in yealink_do_idle_tasks()
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/openbmc/linux/drivers/net/wireless/marvell/mwifiex/
H A Dutil.c711 int ix; in mwifiex_hist_data_reset() local
715 for (ix = 0; ix < MWIFIEX_MAX_AC_RX_RATES; ix++) in mwifiex_hist_data_reset()
716 atomic_set(&phist_data->rx_rate[ix], 0); in mwifiex_hist_data_reset()
717 for (ix = 0; ix < MWIFIEX_MAX_SNR; ix++) in mwifiex_hist_data_reset()
718 atomic_set(&phist_data->snr[ix], 0); in mwifiex_hist_data_reset()
719 for (ix = 0; ix < MWIFIEX_MAX_NOISE_FLR; ix++) in mwifiex_hist_data_reset()
720 atomic_set(&phist_data->noise_flr[ix], 0); in mwifiex_hist_data_reset()
721 for (ix = 0; ix < MWIFIEX_MAX_SIG_STRENGTH; ix++) in mwifiex_hist_data_reset()
722 atomic_set(&phist_data->sig_str[ix], 0); in mwifiex_hist_data_reset()

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