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Searched refs:intr_mask (Results 1 – 25 of 78) sorted by relevance

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/openbmc/linux/drivers/scsi/qla4xxx/
H A Dql4_inline.h42 &ha->reg->u1.isp4022.intr_mask); in __qla4xxx_enable_intrs()
43 readl(&ha->reg->u1.isp4022.intr_mask); in __qla4xxx_enable_intrs()
56 &ha->reg->u1.isp4022.intr_mask); in __qla4xxx_disable_intrs()
57 readl(&ha->reg->u1.isp4022.intr_mask); in __qla4xxx_disable_intrs()
/openbmc/linux/drivers/irqchip/
H A Dirq-xilinx-intc.c42 u32 intr_mask; member
119 if (irqc->intr_mask & BIT(hw)) { in xintc_map()
186 ret = of_property_read_u32(intc, "xlnx,kind-of-intr", &irqc->intr_mask); in xilinx_intc_of_init()
189 irqc->intr_mask = 0; in xilinx_intc_of_init()
192 if ((u64)irqc->intr_mask >> irqc->nr_irq) in xilinx_intc_of_init()
196 intc, irqc->nr_irq, irqc->intr_mask); in xilinx_intc_of_init()
/openbmc/linux/drivers/net/ethernet/marvell/octeontx2/af/
H A Dmcs_cnf10kb.c167 event.intr_mask = MCS_CPM_TX_PN_THRESH_REACHED_INT; in cnf10kb_mcs_tx_pn_thresh_reached_handler()
202 event.intr_mask = MCS_CPM_TX_PACKET_XPN_EQ0_INT; in cnf10kb_mcs_tx_pn_wrapped_handler()
239 event.intr_mask = (dir == MCS_RX) ? in cnf10kb_mcs_bbe_intr_handler()
243 event.intr_mask = (dir == MCS_RX) ? in cnf10kb_mcs_bbe_intr_handler()
269 event.intr_mask = (dir == MCS_RX) ? in cnf10kb_mcs_pab_intr_handler()
H A Dmcs_rvu_if.c102 event->intr_mask &= pfvf->intr_mask; in mcs_add_intr_wq_entry()
105 if (!(pfvf->intr_mask && event->intr_mask)) in mcs_add_intr_wq_entry()
137 req->intr_mask = event->intr_mask; in mcs_notify_pfvf()
197 pfvf->intr_mask = req->intr_mask; in rvu_mbox_handler_mcs_intr_cfg()
/openbmc/linux/drivers/net/ethernet/marvell/octeon_ep/
H A Doctep_cn9k_pf.c560 u64 intr_mask = 0ULL; in octep_enable_interrupts_cn93_pf() local
567 intr_mask |= (0x1ULL << (srn + i)); in octep_enable_interrupts_cn93_pf()
569 octep_write_csr64(oct, CN93_SDP_EPF_IRERR_RINT_ENA_W1S, intr_mask); in octep_enable_interrupts_cn93_pf()
570 octep_write_csr64(oct, CN93_SDP_EPF_ORERR_RINT_ENA_W1S, intr_mask); in octep_enable_interrupts_cn93_pf()
572 octep_write_csr64(oct, CN93_SDP_EPF_MISC_RINT_ENA_W1S, intr_mask); in octep_enable_interrupts_cn93_pf()
573 octep_write_csr64(oct, CN93_SDP_EPF_DMA_RINT_ENA_W1S, intr_mask); in octep_enable_interrupts_cn93_pf()
579 u64 intr_mask = 0ULL; in octep_disable_interrupts_cn93_pf() local
586 intr_mask |= (0x1ULL << (srn + i)); in octep_disable_interrupts_cn93_pf()
588 octep_write_csr64(oct, CN93_SDP_EPF_IRERR_RINT_ENA_W1C, intr_mask); in octep_disable_interrupts_cn93_pf()
589 octep_write_csr64(oct, CN93_SDP_EPF_ORERR_RINT_ENA_W1C, intr_mask); in octep_disable_interrupts_cn93_pf()
[all …]
/openbmc/linux/drivers/i2c/busses/
H A Di2c-xlp9xx.c327 u32 intr_mask, cmd, val, len; in xlp9xx_i2c_xfer_msg() local
374 intr_mask = (XLP9XX_I2C_INTEN_ARLOST | XLP9XX_I2C_INTEN_BUSERR | in xlp9xx_i2c_xfer_msg()
378 intr_mask |= XLP9XX_I2C_INTEN_MFIFOHI; in xlp9xx_i2c_xfer_msg()
380 intr_mask |= XLP9XX_I2C_INTEN_SADDR; in xlp9xx_i2c_xfer_msg()
383 intr_mask |= XLP9XX_I2C_INTEN_SADDR; in xlp9xx_i2c_xfer_msg()
385 intr_mask |= XLP9XX_I2C_INTEN_MFIFOEMTY; in xlp9xx_i2c_xfer_msg()
387 xlp9xx_i2c_unmask_irq(priv, intr_mask); in xlp9xx_i2c_xfer_msg()
H A Di2c-designware-master.c458 u32 intr_mask; in i2c_dw_xfer_msg() local
466 intr_mask = DW_IC_INTR_MASTER_MASK; in i2c_dw_xfer_msg()
557 intr_mask &= ~DW_IC_INTR_TX_EMPTY; in i2c_dw_xfer_msg()
572 intr_mask &= ~DW_IC_INTR_TX_EMPTY; in i2c_dw_xfer_msg()
575 intr_mask = 0; in i2c_dw_xfer_msg()
577 regmap_write(dev->map, DW_IC_INTR_MASK, intr_mask); in i2c_dw_xfer_msg()
/openbmc/linux/drivers/scsi/bfa/
H A Dbfa_hw_ct.c34 bfa_regs->intr_mask = (kva + HOSTFN0_INT_MSK); in bfa_hwct_reginit()
37 bfa_regs->intr_mask = (kva + HOSTFN1_INT_MSK); in bfa_hwct_reginit()
48 bfa_regs->intr_mask = (kva + CT2_HOSTFN_INTR_MASK); in bfa_hwct2_reginit()
H A Dbfa_hw_cb.c24 bfa_regs->intr_mask = (kva + HOSTFN0_INT_MSK); in bfa_hwcb_reginit()
27 bfa_regs->intr_mask = (kva + HOSTFN1_INT_MSK); in bfa_hwcb_reginit()
/openbmc/linux/drivers/soc/qcom/
H A Dsmsm.c481 u32 *intr_mask; in qcom_smsm_probe() local
554 intr_mask = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_SMSM_CPU_INTR_MASK, NULL); in qcom_smsm_probe()
555 if (IS_ERR(intr_mask)) { in qcom_smsm_probe()
557 ret = PTR_ERR(intr_mask); in qcom_smsm_probe()
563 smsm->subscription = intr_mask + smsm->local_host * smsm->num_hosts; in qcom_smsm_probe()
591 entry->subscription = intr_mask + id * smsm->num_hosts; in qcom_smsm_probe()
/openbmc/linux/drivers/spi/
H A Dspi-xlp.c274 u32 intr_mask = 0; in xlp_spi_xfer_block() local
294 intr_mask |= XLP_SPI_INTR_TXTH | XLP_SPI_INTR_TXUF | in xlp_spi_xfer_block()
297 intr_mask |= XLP_SPI_INTR_RXTH | XLP_SPI_INTR_RXOF; in xlp_spi_xfer_block()
299 intr_mask |= XLP_SPI_INTR_DONE; in xlp_spi_xfer_block()
300 xlp_spi_reg_write(xs, xs->cs, XLP_SPI_INTR_EN, intr_mask); in xlp_spi_xfer_block()
/openbmc/linux/drivers/net/ethernet/silan/
H A Dsc92031.c290 atomic_t intr_mask; member
359 atomic_set(&priv->intr_mask, 0); in sc92031_disable_interrupts()
378 atomic_set(&priv->intr_mask, IntrBits); in sc92031_enable_interrupts()
625 atomic_set(&priv->intr_mask, 0); in _sc92031_reset()
838 u32 intr_status, intr_mask; in sc92031_tasklet() local
865 intr_mask = atomic_read(&priv->intr_mask); in sc92031_tasklet()
868 iowrite32(intr_mask, port_base + IntrMask); in sc92031_tasklet()
878 u32 intr_status, intr_mask; in sc92031_interrupt() local
898 intr_mask = atomic_read(&priv->intr_mask); in sc92031_interrupt()
901 iowrite32(intr_mask, port_base + IntrMask); in sc92031_interrupt()
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/
H A Dbase.c115 gpio->func->intr_mask(gpio, type, 1 << index, 0); in nvkm_gpio_intr_fini()
122 gpio->func->intr_mask(gpio, type, 1 << index, 1 << index); in nvkm_gpio_intr_init()
152 gpio->func->intr_mask(gpio, NVKM_GPIO_TOGGLED, mask, 0); in nvkm_gpio_fini()
H A Dpriv.h19 void (*intr_mask)(struct nvkm_gpio *, u32, u32, u32); member
/openbmc/linux/drivers/soundwire/
H A Dqcom.c201 u32 intr_mask; member
676 intr_sts_masked = intr_sts & ctrl->intr_mask; in qcom_swrm_irq_handler()
712 ctrl->intr_mask &= ~SWRM_INTERRUPT_STATUS_MASTER_CLASH_DET; in qcom_swrm_irq_handler()
715 ctrl->intr_mask); in qcom_swrm_irq_handler()
755 ctrl->intr_mask &= ~SWRM_INTERRUPT_STATUS_DOUT_PORT_COLLISION; in qcom_swrm_irq_handler()
758 ctrl->intr_mask); in qcom_swrm_irq_handler()
764 ctrl->intr_mask &= in qcom_swrm_irq_handler()
768 ctrl->intr_mask); in qcom_swrm_irq_handler()
791 intr_sts_masked = intr_sts & ctrl->intr_mask; in qcom_swrm_irq_handler()
833 ctrl->intr_mask = SWRM_INTERRUPT_STATUS_RMSK; in qcom_swrm_init()
[all …]
/openbmc/linux/drivers/gpio/
H A Dgpio-realtek-otto.c72 u8 intr_mask[REALTEK_GPIO_MAX]; member
173 u32 irq_mask = ctrl->intr_mask[line]; in realtek_gpio_update_line_imr()
200 ctrl->intr_mask[line] = REALTEK_GPIO_IMR_LINE_MASK; in realtek_gpio_irq_unmask()
212 ctrl->intr_mask[line] = 0; in realtek_gpio_irq_mask()
/openbmc/linux/drivers/iio/adc/
H A Dxilinx-ams.c287 u64 intr_mask; member
315 ams->intr_mask = (ams->intr_mask & ~mask) | (val & mask); in ams_update_intrmask()
317 regval = ~(ams->intr_mask | ams->current_masked_alarm); in ams_update_intrmask()
320 regval = ~(FIELD_GET(AMS_ISR1_INTR_MASK, ams->intr_mask)); in ams_update_intrmask()
323 regval = ams->intr_mask | ams->current_masked_alarm; in ams_update_intrmask()
326 regval = FIELD_GET(AMS_ISR1_INTR_MASK, ams->intr_mask); in ams_update_intrmask()
1038 unmask |= ams->intr_mask; in ams_unmask_worker()
1043 ams->current_masked_alarm &= ~ams->intr_mask; in ams_unmask_worker()
1069 isr0 &= ~((ams->intr_mask & AMS_ISR0_ALARM_MASK) | ams->current_masked_alarm); in ams_irq()
/openbmc/linux/drivers/phy/qualcomm/
H A Dphy-qcom-qusb2.c611 u32 intr_mask; in qusb2_phy_runtime_suspend() local
626 intr_mask = DPSE_INTR_EN | DMSE_INTR_EN; in qusb2_phy_runtime_suspend()
632 intr_mask |= DMSE_INTR_HIGH_SEL; in qusb2_phy_runtime_suspend()
636 intr_mask |= DPSE_INTR_HIGH_SEL; in qusb2_phy_runtime_suspend()
640 intr_mask |= DMSE_INTR_HIGH_SEL; in qusb2_phy_runtime_suspend()
641 intr_mask |= DPSE_INTR_HIGH_SEL; in qusb2_phy_runtime_suspend()
645 writel(intr_mask, qphy->base + cfg->regs[QUSB2PHY_INTR_CTRL]); in qusb2_phy_runtime_suspend()
/openbmc/qemu/hw/pci-host/
H A Dxilinx-pcie.c75 level = !!(s->intr & s->intr_mask); in xilinx_pcie_update_intr()
200 val = s->intr_mask; in xilinx_pcie_root_config_read()
245 s->intr_mask = val; in xilinx_pcie_root_config_write()
/openbmc/linux/drivers/net/ethernet/atheros/atl1c/
H A Datl1c_main.c192 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask); in atl1c_irq_enable()
808 hw->intr_mask = IMR_NORMAL_MASK; in atl1c_sw_init()
810 hw->intr_mask |= atl1c_qregs[i].tx_isr; in atl1c_sw_init()
812 hw->intr_mask |= atl1c_qregs[i].rx_isr; in atl1c_sw_init()
1624 adapter->hw.intr_mask |= atl1c_qregs[tpd_ring->num].tx_isr; in atl1c_clean_tx()
1625 AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask); in atl1c_clean_tx()
1635 u32 intr_mask; in atl1c_intr_rx_tx() local
1639 intr_mask = hw->intr_mask; in atl1c_intr_rx_tx()
1644 intr_mask &= ~atl1c_qregs[i].rx_isr; in atl1c_intr_rx_tx()
1652 intr_mask &= ~atl1c_qregs[i].tx_isr; in atl1c_intr_rx_tx()
[all …]
/openbmc/linux/drivers/usb/dwc2/
H A Dhcd_queue.c1694 u32 intr_mask; in dwc2_hcd_qh_add() local
1727 intr_mask = dwc2_readl(hsotg, GINTMSK); in dwc2_hcd_qh_add()
1728 intr_mask |= GINTSTS_SOF; in dwc2_hcd_qh_add()
1729 dwc2_writel(hsotg, intr_mask, GINTMSK); in dwc2_hcd_qh_add()
1745 u32 intr_mask; in dwc2_hcd_qh_unlink() local
1768 intr_mask = dwc2_readl(hsotg, GINTMSK); in dwc2_hcd_qh_unlink()
1769 intr_mask &= ~GINTSTS_SOF; in dwc2_hcd_qh_unlink()
1770 dwc2_writel(hsotg, intr_mask, GINTMSK); in dwc2_hcd_qh_unlink()
/openbmc/linux/drivers/watchdog/
H A Dcpwd.c88 u8 intr_mask; member
210 (p->devs[index].intr_mask); in cpwd_toggleintr()
316 if (intr & p->devs[index].intr_mask) { in cpwd_getstatus()
580 p->devs[i].intr_mask = (WD0_INTR_MASK << i); in cpwd_probe()
/openbmc/qemu/include/hw/pci-host/
H A Dxilinx-pcie.h59 uint32_t intr_mask; member
/openbmc/linux/drivers/uio/
H A Duio_pruss.c72 int val, intr_mask = (1 << intr_bit); in pruss_handler() local
80 if (!(val & intr_mask) && (ioread32(intrstat_reg) & HIPIR_NOPEND)) in pruss_handler()
/openbmc/qemu/hw/scsi/
H A Dmptsas.c62 uint32_t state = s->intr_status & ~(s->intr_mask | MPI_HIS_IOP_DOORBELL_STATUS); in mptsas_update_interrupt()
806 save_mask = s->intr_mask; in mptsas_soft_reset()
807 s->intr_mask = MPI_HIM_DIM | MPI_HIM_RIM; in mptsas_soft_reset()
812 s->intr_mask = save_mask; in mptsas_soft_reset()
952 s->intr_mask = MPI_HIM_DIM | MPI_HIM_RIM; in mptsas_hard_reset()
1020 ret = s->intr_mask; in mptsas_mmio_read()
1061 s->intr_mask = val & (MPI_HIM_RIM | MPI_HIM_DIM); in mptsas_mmio_write()
1387 VMSTATE_UINT32(intr_mask, MPTSASState),

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