/openbmc/linux/drivers/gpu/drm/i915/display/ |
H A D | intel_vdsc.c | 398 intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_0, in intel_dsc_pps_configure() 405 intel_de_write(dev_priv, DSCC_PICTURE_PARAMETER_SET_0, in intel_dsc_pps_configure() 408 intel_de_write(dev_priv, in intel_dsc_pps_configure() 412 intel_de_write(dev_priv, in intel_dsc_pps_configure() 422 intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_1, in intel_dsc_pps_configure() 429 intel_de_write(dev_priv, DSCC_PICTURE_PARAMETER_SET_1, in intel_dsc_pps_configure() 432 intel_de_write(dev_priv, in intel_dsc_pps_configure() 436 intel_de_write(dev_priv, in intel_dsc_pps_configure() 447 intel_de_write(dev_priv, DSCA_PICTURE_PARAMETER_SET_2, in intel_dsc_pps_configure() 454 intel_de_write(dev_priv, DSCC_PICTURE_PARAMETER_SET_2, in intel_dsc_pps_configure() [all …]
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H A D | intel_fdi.c | 306 intel_de_write(dev_priv, SOUTH_CHICKEN1, temp); in cpt_set_fdi_bc_bifurcation() 352 intel_de_write(dev_priv, reg, temp); in intel_fdi_normal_train() 363 intel_de_write(dev_priv, reg, temp | FDI_RX_ENHANCE_FRAME_ENABLE); in intel_fdi_normal_train() 388 intel_de_write(dev_priv, FDI_RX_TUSIZE1(pipe), in ilk_fdi_link_train() 400 intel_de_write(dev_priv, reg, temp); in ilk_fdi_link_train() 411 intel_de_write(dev_priv, reg, temp | FDI_TX_ENABLE); in ilk_fdi_link_train() 417 intel_de_write(dev_priv, reg, temp | FDI_RX_ENABLE); in ilk_fdi_link_train() 423 intel_de_write(dev_priv, FDI_RX_CHICKEN(pipe), in ilk_fdi_link_train() 425 intel_de_write(dev_priv, FDI_RX_CHICKEN(pipe), in ilk_fdi_link_train() 435 intel_de_write(dev_priv, reg, temp | FDI_RX_BIT_LOCK); in ilk_fdi_link_train() [all …]
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H A D | vlv_dsi.c | 112 intel_de_write(dev_priv, reg, val); in write_data() 173 intel_de_write(dev_priv, MIPI_INTR_STAT(port), in intel_dsi_host_transfer() 183 intel_de_write(dev_priv, ctrl_reg, in intel_dsi_host_transfer() 239 intel_de_write(dev_priv, MIPI_INTR_STAT(port), SPL_PKT_SENT_INTERRUPT); in dpi_send_cmd() 246 intel_de_write(dev_priv, MIPI_DPI_CONTROL(port), cmd); in dpi_send_cmd() 450 intel_de_write(dev_priv, MIPI_DEVICE_READY(port), val); in bxt_dsi_device_ready() 453 intel_de_write(dev_priv, MIPI_DEVICE_READY(port), val); in bxt_dsi_device_ready() 476 intel_de_write(dev_priv, MIPI_DEVICE_READY(port), in vlv_dsi_device_ready() 487 intel_de_write(dev_priv, MIPI_DEVICE_READY(port), in vlv_dsi_device_ready() 491 intel_de_write(dev_priv, MIPI_DEVICE_READY(port), in vlv_dsi_device_ready() [all …]
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H A D | intel_vrr.c | 191 intel_de_write(dev_priv, TRANS_VRR_CTL(cpu_transcoder), 0); in intel_vrr_set_transcoder_timings() 195 intel_de_write(dev_priv, TRANS_VRR_VMIN(cpu_transcoder), crtc_state->vrr.vmin - 1); in intel_vrr_set_transcoder_timings() 196 intel_de_write(dev_priv, TRANS_VRR_VMAX(cpu_transcoder), crtc_state->vrr.vmax - 1); in intel_vrr_set_transcoder_timings() 197 intel_de_write(dev_priv, TRANS_VRR_CTL(cpu_transcoder), trans_vrr_ctl(crtc_state)); in intel_vrr_set_transcoder_timings() 198 intel_de_write(dev_priv, TRANS_VRR_FLIPLINE(cpu_transcoder), crtc_state->vrr.flipline - 1); in intel_vrr_set_transcoder_timings() 210 intel_de_write(dev_priv, TRANS_PUSH(cpu_transcoder), in intel_vrr_send_push() 234 intel_de_write(dev_priv, TRANS_PUSH(cpu_transcoder), TRANS_PUSH_EN); in intel_vrr_enable() 235 intel_de_write(dev_priv, TRANS_VRR_CTL(cpu_transcoder), in intel_vrr_enable() 248 intel_de_write(dev_priv, TRANS_VRR_CTL(cpu_transcoder), in intel_vrr_disable() 252 intel_de_write(dev_priv, TRANS_PUSH(cpu_transcoder), 0); in intel_vrr_disable()
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H A D | intel_tv.c | 1405 intel_de_write(dev_priv, TV_H_CTL_1, hctl1); in set_tv_mode_timings() 1406 intel_de_write(dev_priv, TV_H_CTL_2, hctl2); in set_tv_mode_timings() 1407 intel_de_write(dev_priv, TV_H_CTL_3, hctl3); in set_tv_mode_timings() 1408 intel_de_write(dev_priv, TV_V_CTL_1, vctl1); in set_tv_mode_timings() 1409 intel_de_write(dev_priv, TV_V_CTL_2, vctl2); in set_tv_mode_timings() 1410 intel_de_write(dev_priv, TV_V_CTL_3, vctl3); in set_tv_mode_timings() 1411 intel_de_write(dev_priv, TV_V_CTL_4, vctl4); in set_tv_mode_timings() 1412 intel_de_write(dev_priv, TV_V_CTL_5, vctl5); in set_tv_mode_timings() 1413 intel_de_write(dev_priv, TV_V_CTL_6, vctl6); in set_tv_mode_timings() 1414 intel_de_write(dev_priv, TV_V_CTL_7, vctl7); in set_tv_mode_timings() [all …]
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H A D | intel_pch_display.c | 129 intel_de_write(dev_priv, hdmi_reg, val); in ibx_sanitize_pch_hdmi_port() 148 intel_de_write(dev_priv, dp_reg, val); in ibx_sanitize_pch_dp_port() 225 intel_de_write(dev_priv, PCH_TRANS_HTOTAL(pch_transcoder), in ilk_pch_transcoder_set_timings() 227 intel_de_write(dev_priv, PCH_TRANS_HBLANK(pch_transcoder), in ilk_pch_transcoder_set_timings() 229 intel_de_write(dev_priv, PCH_TRANS_HSYNC(pch_transcoder), in ilk_pch_transcoder_set_timings() 232 intel_de_write(dev_priv, PCH_TRANS_VTOTAL(pch_transcoder), in ilk_pch_transcoder_set_timings() 234 intel_de_write(dev_priv, PCH_TRANS_VBLANK(pch_transcoder), in ilk_pch_transcoder_set_timings() 236 intel_de_write(dev_priv, PCH_TRANS_VSYNC(pch_transcoder), in ilk_pch_transcoder_set_timings() 238 intel_de_write(dev_priv, PCH_TRANS_VSYNCSHIFT(pch_transcoder), in ilk_pch_transcoder_set_timings() 268 intel_de_write(dev_priv, reg, val); in ilk_enable_pch_transcoder() [all …]
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H A D | intel_backlight.c | 211 intel_de_write(i915, BLC_PWM_PCH_CTL2, val | level); in lpt_set_backlight() 221 intel_de_write(i915, BLC_PWM_CPU_CTL, tmp | level); in pch_set_backlight() 249 intel_de_write(i915, BLC_PWM_CTL, tmp | level); in i9xx_set_backlight() 260 intel_de_write(i915, VLV_BLC_PWM_CTL(pipe), tmp | level); in vlv_set_backlight() 269 intel_de_write(i915, BXT_BLC_PWM_DUTY(panel->backlight.controller), level); in bxt_set_backlight() 352 intel_de_write(i915, BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE); in lpt_disable_backlight() 477 intel_de_write(i915, BLC_PWM_PCH_CTL1, pch_ctl1); in lpt_enable_backlight() 490 intel_de_write(i915, BLC_PWM_PCH_CTL2, pch_ctl2); in lpt_enable_backlight() 500 intel_de_write(i915, BLC_PWM_PCH_CTL1, pch_ctl1); in lpt_enable_backlight() 502 intel_de_write(i915, BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE); in lpt_enable_backlight() [all …]
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H A D | intel_fifo_underrun.c | 106 intel_de_write(dev_priv, reg, enable_mask | PIPE_FIFO_UNDERRUN_STATUS); in i9xx_check_fifo_underruns() 125 intel_de_write(dev_priv, reg, in i9xx_set_fifo_underrun_reporting() 159 intel_de_write(dev_priv, GEN7_ERR_INT, ERR_INT_FIFO_UNDERRUN(pipe)); in ivb_check_fifo_underruns() 172 intel_de_write(dev_priv, GEN7_ERR_INT, in ivb_set_fifo_underrun_reporting() 212 intel_de_write(dev_priv, ICL_PIPESTATUS(pipe), in bdw_set_fifo_underrun_reporting() 246 intel_de_write(dev_priv, SERR_INT, in cpt_check_pch_fifo_underruns() 262 intel_de_write(dev_priv, SERR_INT, in cpt_set_fifo_underrun_reporting() 423 intel_de_write(dev_priv, ICL_PIPESTATUS(pipe), underruns); in intel_cpu_fifo_underrun_irq_handler()
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H A D | g4x_hdmi.c | 60 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, hdmi_val); in intel_hdmi_prepare() 230 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp); in g4x_hdmi_enable_port() 268 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp); in ibx_enable_hdmi() 270 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp); in ibx_enable_hdmi() 282 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, in ibx_enable_hdmi() 290 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp); in ibx_enable_hdmi() 292 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp); in ibx_enable_hdmi() 337 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp); in cpt_enable_hdmi() 344 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp); in cpt_enable_hdmi() 384 intel_de_write(dev_priv, intel_hdmi->hdmi_reg, temp); in intel_disable_hdmi() [all …]
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H A D | icl_dsi.c | 165 intel_de_write(i915, DSI_CMD_TXPYLD(dsi_trans), tmp); in dsi_send_pkt_payld() 202 intel_de_write(dev_priv, DSI_CMD_TXHDR(dsi_trans), tmp); in dsi_send_pkt_hdr() 250 intel_de_write(dev_priv, ICL_PORT_TX_DW5_GRP(phy), tmp); in dsi_program_swing_and_deemphasis() 260 intel_de_write(dev_priv, ICL_PORT_TX_DW2_GRP(phy), tmp); in dsi_program_swing_and_deemphasis() 322 intel_de_write(dev_priv, dss_ctl1_reg, dss_ctl1); in configure_dual_link_mode() 362 intel_de_write(dev_priv, ICL_DSI_ESC_CLK_DIV(port), in gen11_dsi_program_esc_clk_div() 368 intel_de_write(dev_priv, ICL_DPHY_ESC_CLK_DIV(port), in gen11_dsi_program_esc_clk_div() 375 intel_de_write(dev_priv, ADL_MIPIO_DW(port, 8), in gen11_dsi_program_esc_clk_div() 444 intel_de_write(dev_priv, ICL_PORT_TX_DW2_GRP(phy), tmp); in gen11_dsi_config_phy_lanes_sequence() 456 intel_de_write(dev_priv, ICL_PORT_PCS_DW1_GRP(phy), in gen11_dsi_config_phy_lanes_sequence() [all …]
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H A D | intel_crt.c | 195 intel_de_write(dev_priv, BCLRPAT(crtc->pipe), 0); in intel_crt_set_dpms() 212 intel_de_write(dev_priv, crt->adpa_reg, adpa); in intel_crt_set_dpms() 489 intel_de_write(dev_priv, crt->adpa_reg, adpa); in ilk_crt_detect_hotplug() 499 intel_de_write(dev_priv, crt->adpa_reg, save_adpa); in ilk_crt_detect_hotplug() 546 intel_de_write(dev_priv, crt->adpa_reg, adpa); in valleyview_crt_detect_hotplug() 552 intel_de_write(dev_priv, crt->adpa_reg, save_adpa); in valleyview_crt_detect_hotplug() 612 intel_de_write(dev_priv, PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS); in intel_crt_detect_hotplug() 721 intel_de_write(dev_priv, BCLRPAT(cpu_transcoder), 0x500050); in intel_crt_load_detect() 726 intel_de_write(dev_priv, TRANSCONF(cpu_transcoder), in intel_crt_load_detect() 737 intel_de_write(dev_priv, TRANSCONF(cpu_transcoder), transconf); in intel_crt_load_detect() [all …]
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H A D | intel_hdcp.c | 268 intel_de_write(i915, HDCP_KEY_CONF, HDCP_CLEAR_KEYS_TRIGGER); in intel_hdcp_clear_keys() 269 intel_de_write(i915, HDCP_KEY_STATUS, in intel_hdcp_clear_keys() 307 intel_de_write(i915, HDCP_KEY_CONF, HDCP_KEY_LOAD_TRIGGER); in intel_hdcp_load_keys() 320 intel_de_write(i915, HDCP_KEY_CONF, HDCP_AKSV_SEND_TRIGGER); in intel_hdcp_load_keys() 328 intel_de_write(i915, HDCP_SHA_TEXT, sha_text); in intel_write_sha_text() 395 intel_de_write(i915, HDCP_SHA_V_PRIME(i), vprime); in intel_hdcp_validate_v_prime() 412 intel_de_write(i915, HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_32); in intel_hdcp_validate_v_prime() 431 intel_de_write(i915, HDCP_REP_CTL, in intel_hdcp_validate_v_prime() 464 intel_de_write(i915, HDCP_REP_CTL, in intel_hdcp_validate_v_prime() 473 intel_de_write(i915, HDCP_REP_CTL, in intel_hdcp_validate_v_prime() [all …]
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H A D | intel_fbc.c | 279 intel_de_write(i915, FBC_CONTROL, fbc_ctl); in i8xx_fbc_deactivate() 297 intel_de_write(i915, FBC_TAG(i), 0); in i8xx_fbc_activate() 300 intel_de_write(i915, FBC_CONTROL2, in i8xx_fbc_activate() 302 intel_de_write(i915, FBC_FENCE_OFF, in i8xx_fbc_activate() 306 intel_de_write(i915, FBC_CONTROL, in i8xx_fbc_activate() 341 intel_de_write(i915, FBC_CFB_BASE, in i8xx_fbc_program_cfb() 343 intel_de_write(i915, FBC_LL_BASE, in i8xx_fbc_program_cfb() 417 intel_de_write(i915, DPFC_FENCE_YOFF, in g4x_fbc_activate() 420 intel_de_write(i915, DPFC_CONTROL, in g4x_fbc_activate() 433 intel_de_write(i915, DPFC_CONTROL, dpfc_ctl); in g4x_fbc_deactivate() [all …]
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H A D | intel_hdmi.c | 218 intel_de_write(dev_priv, VIDEO_DIP_CTL, val); in g4x_write_infoframe() 221 intel_de_write(dev_priv, VIDEO_DIP_DATA, *data); in g4x_write_infoframe() 226 intel_de_write(dev_priv, VIDEO_DIP_DATA, 0); in g4x_write_infoframe() 232 intel_de_write(dev_priv, VIDEO_DIP_CTL, val); in g4x_write_infoframe() 288 intel_de_write(dev_priv, reg, val); in ibx_write_infoframe() 291 intel_de_write(dev_priv, TVIDEO_DIP_DATA(crtc->pipe), in ibx_write_infoframe() 297 intel_de_write(dev_priv, TVIDEO_DIP_DATA(crtc->pipe), 0); in ibx_write_infoframe() 303 intel_de_write(dev_priv, reg, val); in ibx_write_infoframe() 366 intel_de_write(dev_priv, reg, val); in cpt_write_infoframe() 369 intel_de_write(dev_priv, TVIDEO_DIP_DATA(crtc->pipe), in cpt_write_infoframe() [all …]
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H A D | intel_combo_phy.c | 87 intel_de_write(dev_priv, ICL_PORT_COMP_DW9(phy), procmon->dw9); in icl_set_procmon_ref_values() 88 intel_de_write(dev_priv, ICL_PORT_COMP_DW10(phy), procmon->dw10); in icl_set_procmon_ref_values() 345 intel_de_write(dev_priv, ICL_PHY_MISC(phy), val); in icl_combo_phys_init() 353 intel_de_write(dev_priv, ICL_PORT_TX_DW8_GRP(phy), val); in icl_combo_phys_init() 358 intel_de_write(dev_priv, ICL_PORT_PCS_DW1_GRP(phy), val); in icl_combo_phys_init()
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H A D | vlv_dsi_pll.c | 374 intel_de_write(dev_priv, MIPI_CTRL(port), in vlv_dsi_reset_clocks() 418 intel_de_write(dev_priv, MIPIO_TXESC_CLK_DIV1, in glk_dsi_program_esc_clock() 420 intel_de_write(dev_priv, MIPIO_TXESC_CLK_DIV2, in glk_dsi_program_esc_clock() 475 intel_de_write(dev_priv, BXT_MIPI_CLOCK_CTL, tmp); in bxt_dsi_program_clocks() 546 intel_de_write(dev_priv, BXT_DSI_PLL_CTL, config->dsi_pll.ctrl); in bxt_dsi_pll_enable() 584 intel_de_write(dev_priv, BXT_MIPI_CLOCK_CTL, tmp); in bxt_dsi_reset_clocks() 590 intel_de_write(dev_priv, MIPI_EOT_DISABLE(port), CLOCKSTOP); in bxt_dsi_reset_clocks()
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H A D | g4x_dp.c | 210 intel_de_write(dev_priv, DP_A, intel_dp->DP); in ilk_edp_pll_on() 225 intel_de_write(dev_priv, DP_A, intel_dp->DP); in ilk_edp_pll_on() 244 intel_de_write(dev_priv, DP_A, intel_dp->DP); in ilk_edp_pll_off() 432 intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP); in intel_dp_link_down() 436 intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP); in intel_dp_link_down() 456 intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP); in intel_dp_link_down() 460 intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP); in intel_dp_link_down() 585 intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP); in cpt_set_link_train() 613 intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP); in g4x_set_link_train() 637 intel_de_write(dev_priv, intel_dp->output_reg, intel_dp->DP); in intel_dp_enable_port() [all …]
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H A D | intel_dsb.c | 246 intel_de_write(dev_priv, DSB_CTRL(pipe, dsb->id), in intel_dsb_commit() 249 intel_de_write(dev_priv, DSB_HEAD(pipe, dsb->id), in intel_dsb_commit() 251 intel_de_write(dev_priv, DSB_TAIL(pipe, dsb->id), in intel_dsb_commit() 269 intel_de_write(dev_priv, DSB_CTRL(pipe, dsb->id), 0); in intel_dsb_wait()
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H A D | intel_pps.c | 146 intel_de_write(dev_priv, intel_dp->output_reg, DP); in vlv_power_sequencer_kick() 149 intel_de_write(dev_priv, intel_dp->output_reg, DP | DP_PORT_EN); in vlv_power_sequencer_kick() 152 intel_de_write(dev_priv, intel_dp->output_reg, DP & ~DP_PORT_EN); in vlv_power_sequencer_kick() 751 intel_de_write(dev_priv, pp_ctrl_reg, pp); in intel_pps_vdd_on_unlocked() 821 intel_de_write(dev_priv, pp_ctrl_reg, pp); in intel_pps_vdd_off_sync_unlocked() 948 intel_de_write(dev_priv, pp_ctrl_reg, pp); in intel_pps_on_unlocked() 956 intel_de_write(dev_priv, pp_ctrl_reg, pp); in intel_pps_on_unlocked() 964 intel_de_write(dev_priv, pp_ctrl_reg, pp); in intel_pps_on_unlocked() 1011 intel_de_write(dev_priv, pp_ctrl_reg, pp); in intel_pps_off_unlocked() 1055 intel_de_write(dev_priv, pp_ctrl_reg, pp); in intel_pps_backlight_on() [all …]
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H A D | intel_dkl_phy.c | 30 intel_de_write(i915, in dkl_phy_set_hip_idx() 73 intel_de_write(i915, DKL_REG_MMIO(reg), val); in intel_dkl_phy_write()
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H A D | intel_dpll.c | 1595 intel_de_write(dev_priv, FP0(pipe), crtc_state->dpll_hw_state.fp0); in i9xx_enable_pll() 1596 intel_de_write(dev_priv, FP1(pipe), crtc_state->dpll_hw_state.fp1); in i9xx_enable_pll() 1603 intel_de_write(dev_priv, DPLL(pipe), dpll & ~DPLL_VGA_MODE_DIS); in i9xx_enable_pll() 1604 intel_de_write(dev_priv, DPLL(pipe), dpll); in i9xx_enable_pll() 1611 intel_de_write(dev_priv, DPLL_MD(pipe), in i9xx_enable_pll() 1619 intel_de_write(dev_priv, DPLL(pipe), dpll); in i9xx_enable_pll() 1624 intel_de_write(dev_priv, DPLL(pipe), dpll); in i9xx_enable_pll() 1755 intel_de_write(dev_priv, DPLL(pipe), crtc_state->dpll_hw_state.dpll); in _vlv_enable_pll() 1775 intel_de_write(dev_priv, DPLL(pipe), in vlv_enable_pll() 1784 intel_de_write(dev_priv, DPLL_MD(pipe), in vlv_enable_pll() [all …]
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H A D | intel_pch_refclk.c | 109 intel_de_write(dev_priv, PIXCLK_GATE, PIXCLK_GATE_GATE); in lpt_disable_iclkip() 226 intel_de_write(dev_priv, PIXCLK_GATE, PIXCLK_GATE_UNGATE); in lpt_program_iclkip() 612 intel_de_write(dev_priv, PCH_DREF_CONTROL, val); in ilk_init_pch_refclk() 631 intel_de_write(dev_priv, PCH_DREF_CONTROL, val); in ilk_init_pch_refclk() 642 intel_de_write(dev_priv, PCH_DREF_CONTROL, val); in ilk_init_pch_refclk() 656 intel_de_write(dev_priv, PCH_DREF_CONTROL, val); in ilk_init_pch_refclk()
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H A D | intel_pipe_crc.c | 186 intel_de_write(dev_priv, PORT_DFT2_G4X, tmp); in vlv_pipe_crc_ctl_reg() 249 intel_de_write(dev_priv, PORT_DFT2_G4X, tmp); in vlv_undo_pipe_scramble_reset() 611 intel_de_write(dev_priv, PIPE_CRC_CTL(pipe), val); in intel_crtc_set_crc_source() 646 intel_de_write(dev_priv, PIPE_CRC_CTL(pipe), val); in intel_crtc_enable_pipe_crc() 661 intel_de_write(dev_priv, PIPE_CRC_CTL(pipe), 0); in intel_crtc_disable_pipe_crc()
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H A D | intel_ddi.c | 137 intel_de_write(dev_priv, DDI_BUF_TRANS_LO(port, i), in hsw_prepare_dp_ddi_buffers() 139 intel_de_write(dev_priv, DDI_BUF_TRANS_HI(port, i), in hsw_prepare_dp_ddi_buffers() 169 intel_de_write(dev_priv, DDI_BUF_TRANS_LO(port, 9), in hsw_prepare_hdmi_ddi_buffers() 171 intel_de_write(dev_priv, DDI_BUF_TRANS_HI(port, 9), in hsw_prepare_hdmi_ddi_buffers() 440 intel_de_write(dev_priv, TRANS_MSA_MISC(cpu_transcoder), temp); in intel_ddi_set_dp_msa() 462 intel_de_write(i915, TRANS_DP2_CTL(cpu_transcoder), val); in intel_ddi_config_transcoder_dp2() 602 intel_de_write(dev_priv, in intel_ddi_enable_transcoder_func() 606 intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), in intel_ddi_enable_transcoder_func() 626 intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder), ctl); in intel_ddi_config_transcoder_func() 637 intel_de_write(dev_priv, in intel_ddi_disable_transcoder_func() [all …]
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/openbmc/linux/drivers/gpu/drm/i915/ |
H A D | i915_suspend.c | 68 intel_de_write(dev_priv, SWF0(i), dev_priv->regfile.saveSWF0[i]); in intel_restore_swf() 69 intel_de_write(dev_priv, SWF1(i), dev_priv->regfile.saveSWF1[i]); in intel_restore_swf() 72 intel_de_write(dev_priv, SWF3(i), dev_priv->regfile.saveSWF3[i]); in intel_restore_swf() 75 intel_de_write(dev_priv, SWF1(i), dev_priv->regfile.saveSWF1[i]); in intel_restore_swf() 78 intel_de_write(dev_priv, SWF0(i), dev_priv->regfile.saveSWF0[i]); in intel_restore_swf() 79 intel_de_write(dev_priv, SWF1(i), dev_priv->regfile.saveSWF1[i]); in intel_restore_swf() 82 intel_de_write(dev_priv, SWF3(i), dev_priv->regfile.saveSWF3[i]); in intel_restore_swf() 119 intel_de_write(dev_priv, DSPARB, dev_priv->regfile.saveDSPARB); in i915_restore_display()
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