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Searched refs:int_mask (Results 1 – 25 of 96) sorted by relevance

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/openbmc/qemu/hw/intc/
H A Dloongarch_pch_pic.c26 val = mask & s->intirr & ~s->int_mask; in pch_pic_update_irq()
98 val = (uint32_t)s->int_mask; in loongarch_pch_pic_low_readw()
101 val = s->int_mask >> 32; in loongarch_pch_pic_low_readw()
141 uint64_t old, int_mask; in loongarch_pch_pic_low_writew() local
148 old = s->int_mask; in loongarch_pch_pic_low_writew()
149 s->int_mask = get_writew_val(old, data, 0); in loongarch_pch_pic_low_writew()
159 old = s->int_mask; in loongarch_pch_pic_low_writew()
160 s->int_mask = get_writew_val(old, data, 1); in loongarch_pch_pic_low_writew()
162 int_mask = old_valid & ~data; in loongarch_pch_pic_low_writew()
163 if (int_mask) { in loongarch_pch_pic_low_writew()
[all …]
/openbmc/linux/arch/m68k/amiga/
H A Dcia.c30 unsigned short int_mask; member
35 .int_mask = IF_PORTS,
41 .int_mask = IF_EXTER,
61 amiga_custom.intreq = IF_SETCLR | base->int_mask; in cia_set_irq()
82 amiga_custom.intreq = IF_SETCLR | base->int_mask; in cia_able_irq()
99 amiga_custom.intreq = base->int_mask; in cia_handler()
/openbmc/linux/arch/m68k/atari/
H A Dataints.c134 unsigned short int_mask; member
139 .int_mask = 0x0,
152 ints = base->int_mask; in mfp_timer_d_handler()
164 stmfp_base.int_mask |= 1 << mfp_num; in atari_mfptimer_enable()
171 stmfp_base.int_mask &= ~(1 << mfp_num); in atari_mfptimer_disable()
172 if (!stmfp_base.int_mask) in atari_mfptimer_disable()
/openbmc/linux/drivers/gpio/
H A Dgpio-xgs-iproc.c70 u32 int_mask, irq_type, event_mask; in iproc_gpio_irq_unmask() local
76 int_mask = readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_LEVEL_MASK); in iproc_gpio_irq_unmask()
83 int_mask |= 1 << pin; in iproc_gpio_irq_unmask()
84 writel_relaxed(int_mask, in iproc_gpio_irq_unmask()
97 u32 irq_type, int_mask, event_mask; in iproc_gpio_irq_mask() local
102 int_mask = readl_relaxed(chip->base + IPROC_GPIO_CCA_INT_LEVEL_MASK); in iproc_gpio_irq_mask()
109 int_mask &= ~BIT(pin); in iproc_gpio_irq_mask()
110 writel_relaxed(int_mask, in iproc_gpio_irq_mask()
H A Dgpio-rockchip.c37 .int_mask = 0x34,
51 .int_mask = 0x18,
489 bank->saved_masks = irq_reg_readl(gc, bank->gpio_regs->int_mask); in rockchip_irq_suspend()
490 irq_reg_writel(gc, ~gc->wake_active, bank->gpio_regs->int_mask); in rockchip_irq_suspend()
498 irq_reg_writel(gc, bank->saved_masks, bank->gpio_regs->int_mask); in rockchip_irq_resume()
544 gc->chip_types[0].regs.mask = bank->gpio_regs->int_mask; in rockchip_interrupts_register()
564 rockchip_gpio_writel(bank, 0xffffffff, bank->gpio_regs->int_mask); in rockchip_interrupts_register()
/openbmc/linux/drivers/gpu/drm/sprd/
H A Dsprd_dpu.c407 u32 int_mask = 0; in sprd_dpu_init() local
426 int_mask |= BIT_DPU_INT_UPDATE_DONE; in sprd_dpu_init()
428 int_mask |= BIT_DPU_INT_DONE; in sprd_dpu_init()
430 int_mask |= BIT_DPU_INT_VSYNC; in sprd_dpu_init()
432 int_mask |= BIT_DPU_INT_TE; in sprd_dpu_init()
434 int_mask |= BIT_DPU_INT_ERR; in sprd_dpu_init()
444 int_mask |= BIT_DPU_INT_DONE; in sprd_dpu_init()
446 int_mask |= BIT_DPU_INT_TE; in sprd_dpu_init()
449 writel(int_mask, ctx->base + REG_DPU_INT_EN); in sprd_dpu_init()
751 u32 reg_val, int_mask = 0; in sprd_dpu_isr() local
[all …]
/openbmc/qemu/hw/usb/
H A Dhcd-uhci.c644 int status, uint32_t *int_mask) in uhci_handle_td_error() argument
680 *int_mask |= 0x01; in uhci_handle_td_error()
687 uint32_t *int_mask) in uhci_complete_td() argument
701 async->packet.status, int_mask); in uhci_complete_td()
714 *int_mask |= 0x01; in uhci_complete_td()
720 *int_mask |= 0x02; in uhci_complete_td()
735 UHCI_TD *td, uint32_t td_addr, uint32_t *int_mask) in uhci_handle_td() argument
777 *int_mask |= 0x01; in uhci_handle_td()
833 int_mask); in uhci_handle_td()
878 ret = uhci_complete_td(s, td, async, int_mask); in uhci_handle_td()
[all …]
/openbmc/linux/drivers/net/wireless/ath/ath5k/
H A Ddma.c742 enum ath5k_int old_mask, int_mask; in ath5k_hw_set_imr() local
760 int_mask = new_mask & AR5K_INT_COMMON; in ath5k_hw_set_imr()
769 int_mask |= AR5K_IMR_HIUERR; in ath5k_hw_set_imr()
776 int_mask |= AR5K_IMR_TIM; in ath5k_hw_set_imr()
791 int_mask |= AR5K_INT_BNR; in ath5k_hw_set_imr()
795 ath5k_hw_reg_write(ah, int_mask, AR5K_PIMR); in ath5k_hw_set_imr()
801 int_mask |= (AR5K_IMR_SSERR | AR5K_IMR_MCABT in ath5k_hw_set_imr()
805 ath5k_hw_reg_write(ah, int_mask, AR5K_IMR); in ath5k_hw_set_imr()
/openbmc/linux/drivers/net/fddi/
H A Ddefza.c218 pr_debug(" interrupt mask: 0x%04x\n", readw_u(&fp->regs->int_mask)); in fza_regs_dump()
232 writew_o(fp->int_mask, &fp->regs->int_mask); in fza_do_reset()
233 readw_o(&fp->regs->int_mask); /* Synchronize. */ in fza_do_reset()
295 old_mask = fp->int_mask; in fza_cmd_send()
297 writew_u(new_mask, &fp->regs->int_mask); in fza_cmd_send()
298 readw_o(&fp->regs->int_mask); /* Synchronize. */ in fza_cmd_send()
299 fp->int_mask = new_mask; in fza_cmd_send()
371 fp->int_mask = old_mask; in fza_cmd_send()
372 writew_u(fp->int_mask, &fp->regs->int_mask); in fza_cmd_send()
907 int_event = readw_o(&fp->regs->int_event) & fp->int_mask; in fza_interrupt()
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/openbmc/linux/drivers/crypto/marvell/cesa/
H A Dcesa.h462 u32 int_mask; member
710 u32 int_mask) in mv_cesa_set_int_mask() argument
712 if (int_mask == engine->int_mask) in mv_cesa_set_int_mask()
715 writel_relaxed(int_mask, engine->regs + CESA_SA_INT_MSK); in mv_cesa_set_int_mask()
716 engine->int_mask = int_mask; in mv_cesa_set_int_mask()
721 return engine->int_mask; in mv_cesa_get_int_mask()
/openbmc/qemu/hw/display/
H A Dpl110.c70 uint32_t int_mask; member
96 VMSTATE_UINT32(int_mask, PL110State),
371 if (s->int_status & s->int_mask) { in pl110_update()
418 return s->int_mask; in pl110_read()
421 return s->int_mask; in pl110_read()
427 return s->int_status & s->int_mask; in pl110_read()
484 s->int_mask = val; in pl110_write()
/openbmc/qemu/hw/net/can/
H A Dctucan_core.c164 int_rq.u32 &= ~s->int_mask.u32; in ctucan_update_irq()
224 s->int_mask.u32 = 0; in ctucan_hardware_reset()
280 s->int_stat.u32 |= int_stat.u32 & ~s->int_mask.u32; in ctucan_send_ready_buffers()
350 s->int_mask.u32 |= (uint32_t)val; in ctucan_mem_write()
353 s->int_mask.u32 &= ~(uint32_t)val; in ctucan_mem_write()
442 val = s->int_mask.u32; in ctucan_mem_read()
554 s->int_stat.u32 |= int_stat.u32 & ~s->int_mask.u32; in ctucan_receive()
565 s->int_stat.u32 |= int_stat.u32 & ~s->int_mask.u32; in ctucan_receive()
644 VMSTATE_UINT32(int_mask.u32, CtuCanCoreState),
/openbmc/linux/drivers/input/keyboard/
H A Dnspire-keypad.c33 u32 int_mask; member
61 int_sts = readl(keypad->reg_base + KEYPAD_INT) & keypad->int_mask; in nspire_keypad_irq()
127 keypad->int_mask = 1 << 1; in nspire_keypad_open()
128 writel(keypad->int_mask, keypad->reg_base + KEYPAD_INTMSK); in nspire_keypad_open()
/openbmc/linux/drivers/i2c/busses/
H A Di2c-axxia.c481 u32 int_mask = MST_STATUS_ERR | MST_STATUS_SS | MST_STATUS_RFL; in axxia_i2c_xfer_seq() local
500 i2c_int_enable(idev, int_mask); in axxia_i2c_xfer_seq()
527 u32 int_mask = MST_STATUS_ERR; in axxia_i2c_xfer_msg() local
555 int_mask |= MST_STATUS_RFL; in axxia_i2c_xfer_msg()
557 int_mask |= MST_STATUS_TFL; in axxia_i2c_xfer_msg()
568 int_mask |= MST_STATUS_SNS; in axxia_i2c_xfer_msg()
571 int_mask |= MST_STATUS_SS; in axxia_i2c_xfer_msg()
576 i2c_int_enable(idev, int_mask); in axxia_i2c_xfer_msg()
581 i2c_int_disable(idev, int_mask); in axxia_i2c_xfer_msg()
H A Di2c-tegra.c372 u32 int_mask; in tegra_i2c_mask_irq() local
374 int_mask = i2c_readl(i2c_dev, I2C_INT_MASK) & ~mask; in tegra_i2c_mask_irq()
375 i2c_writel(i2c_dev, int_mask, I2C_INT_MASK); in tegra_i2c_mask_irq()
380 u32 int_mask; in tegra_i2c_unmask_irq() local
382 int_mask = i2c_readl(i2c_dev, I2C_INT_MASK) | mask; in tegra_i2c_unmask_irq()
383 i2c_writel(i2c_dev, int_mask, I2C_INT_MASK); in tegra_i2c_unmask_irq()
1219 u32 int_mask; in tegra_i2c_xfer_msg() local
1268 int_mask = I2C_INT_NO_ACK | I2C_INT_ARBITRATION_LOST; in tegra_i2c_xfer_msg()
1269 tegra_i2c_unmask_irq(i2c_dev, int_mask); in tegra_i2c_xfer_msg()
1307 int_mask |= I2C_INT_PACKET_XFER_COMPLETE; in tegra_i2c_xfer_msg()
[all …]
/openbmc/u-boot/arch/x86/include/asm/arch-braswell/
H A Dgpio.h180 int_mask, glitch, inv_rx_tx, wake_mask, wake_mask_bit, gpe, \ argument
212 (((int_mask) != NA) ? (int_mask << 3) : 0)) | \
/openbmc/linux/drivers/gpu/drm/qxl/
H A Dqxl_irq.c69 qdev->ram_header->int_mask = QXL_INTERRUPT_MASK; in qxl_irq_handler()
100 qdev->ram_header->int_mask = QXL_INTERRUPT_MASK; in qxl_irq_init()
/openbmc/linux/drivers/pci/controller/dwc/
H A Dpcie-spear13xx.c40 u32 int_mask; /* cr8 */ member
109 writel(readl(&app_reg->int_mask) | in spear13xx_pcie_enable_interrupts()
110 MSI_CTRL_INT, &app_reg->int_mask); in spear13xx_pcie_enable_interrupts()
/openbmc/u-boot/drivers/timer/
H A Dag101p_timer.c58 u32 int_mask; /* 0x38 */ member
85 writel(T3_MATCH1|T3_MATCH2|T3_OVERFLOW , &regs->int_mask); in atftmr_timer_probe()
/openbmc/qemu/hw/net/
H A Dsmc91c111.c56 uint8_t int_mask; member
84 VMSTATE_UINT8(int_mask, smc91c111_state),
130 level = (s->int_level & s->int_mask) != 0; in smc91c111_update()
314 s->int_mask = 0; in smc91c111_reset()
476 s->int_mask = value; in smc91c111_writeb()
619 return s->int_mask; in smc91c111_readb()
/openbmc/linux/drivers/input/misc/
H A Dadxl34x.c207 unsigned int_mask; member
794 ac->int_mask = FREE_FALL; in adxl34x_probe()
801 ac->int_mask |= ACTIVITY | INACTIVITY; in adxl34x_probe()
804 ac->int_mask |= WATERMARK; in adxl34x_probe()
808 ac->int_mask |= DATA_READY; in adxl34x_probe()
812 ac->int_mask |= SINGLE_TAP | DOUBLE_TAP; in adxl34x_probe()
859 AC_WRITE(ac, INT_MAP, ac->int_mask | OVERRUN); in adxl34x_probe()
886 AC_WRITE(ac, INT_ENABLE, ac->int_mask | OVERRUN); in adxl34x_probe()
/openbmc/linux/drivers/char/tpm/
H A Dtpm_tis_core.c50 static u8 tpm_tis_filter_sts_mask(u8 int_mask, u8 sts_mask) in tpm_tis_filter_sts_mask() argument
52 if (!(int_mask & TPM_INTF_STS_VALID_INT)) in tpm_tis_filter_sts_mask()
55 if (!(int_mask & TPM_INTF_DATA_AVAIL_INT)) in tpm_tis_filter_sts_mask()
58 if (!(int_mask & TPM_INTF_CMD_READY_INT)) in tpm_tis_filter_sts_mask()
84 sts_mask = tpm_tis_filter_sts_mask(priv->int_mask, sts_mask); in wait_for_tpm_stat()
509 u32 int_mask = 0; in __tpm_tis_disable_interrupts() local
511 tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &int_mask); in __tpm_tis_disable_interrupts()
512 int_mask &= ~TPM_GLOBAL_INT_ENABLE; in __tpm_tis_disable_interrupts()
513 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), int_mask); in __tpm_tis_disable_interrupts()
1280 priv->int_mask = intmask; in tpm_tis_core_init()
[all …]
/openbmc/qemu/hw/m68k/
H A Dnext-cube.c101 uint32_t int_mask; member
275 DPRINTF("MMIO Read INT mask: %x\n", s->int_mask); in next_mmio_read()
276 val = s->int_mask; in next_mmio_read()
315 DPRINTF("INT Mask old: %x new: %x\n", s->int_mask, (unsigned int)val); in next_mmio_write()
316 s->int_mask = val; in next_mmio_write()
720 if (s->int_mask & (1 << shift)) { in next_irq()
946 VMSTATE_UINT32(int_mask, NeXTPC),
/openbmc/linux/drivers/net/ethernet/atheros/alx/
H A Dmain.c320 alx->int_mask |= ALX_ISR_TX_Q0 | ALX_ISR_RX_Q0; in alx_poll()
321 alx_write_mem32(hw, ALX_IMR, alx->int_mask); in alx_poll()
349 alx->int_mask &= ~ALX_ISR_PHY; in alx_intr_handle_misc()
350 alx_write_mem32(hw, ALX_IMR, alx->int_mask); in alx_intr_handle_misc()
365 intr &= alx->int_mask; in alx_intr_handle()
373 alx->int_mask &= ~ALX_ISR_ALL_QUEUES; in alx_intr_handle()
374 alx_write_mem32(hw, ALX_IMR, alx->int_mask); in alx_intr_handle()
410 intr &= (alx->int_mask & ~ALX_ISR_ALL_QUEUES); in alx_intr_msix_misc()
439 if (intr & ALX_ISR_DIS || !(intr & alx->int_mask)) in alx_intr_legacy()
745 alx->int_mask &= ~ALX_ISR_ALL_QUEUES; in alx_alloc_napis()
[all …]
/openbmc/linux/drivers/media/pci/bt8xx/
H A Dbt878.c188 u32 int_mask; in bt878_start() local
207 int_mask = BT878_ASCERR | BT878_AOCERR | BT878_APABORT | in bt878_start()
213 int_mask &= ~irq_err_ignore; in bt878_start()
215 btwrite(int_mask, BT878_AINT_MASK); in bt878_start()

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