Home
last modified time | relevance | path

Searched refs:i2s (Results 1 – 25 of 520) sorted by relevance

12345678910>>...21

/openbmc/linux/sound/soc/img/
H A Dimg-i2s-out.c69 struct img_i2s_out *i2s = dev_get_drvdata(dev); in img_i2s_out_runtime_suspend() local
71 clk_disable_unprepare(i2s->clk_ref); in img_i2s_out_runtime_suspend()
72 clk_disable_unprepare(i2s->clk_sys); in img_i2s_out_runtime_suspend()
79 struct img_i2s_out *i2s = dev_get_drvdata(dev); in img_i2s_out_runtime_resume() local
82 ret = clk_prepare_enable(i2s->clk_sys); in img_i2s_out_runtime_resume()
88 ret = clk_prepare_enable(i2s->clk_ref); in img_i2s_out_runtime_resume()
91 clk_disable_unprepare(i2s->clk_sys); in img_i2s_out_runtime_resume()
98 static inline void img_i2s_out_writel(struct img_i2s_out *i2s, u32 val, in img_i2s_out_writel() argument
101 writel(val, i2s->base + reg); in img_i2s_out_writel()
104 static inline u32 img_i2s_out_readl(struct img_i2s_out *i2s, u32 reg) in img_i2s_out_readl() argument
[all …]
H A Dimg-i2s-in.c67 struct img_i2s_in *i2s = dev_get_drvdata(dev); in img_i2s_in_runtime_suspend() local
69 clk_disable_unprepare(i2s->clk_sys); in img_i2s_in_runtime_suspend()
76 struct img_i2s_in *i2s = dev_get_drvdata(dev); in img_i2s_in_runtime_resume() local
79 ret = clk_prepare_enable(i2s->clk_sys); in img_i2s_in_runtime_resume()
88 static inline void img_i2s_in_writel(struct img_i2s_in *i2s, u32 val, u32 reg) in img_i2s_in_writel() argument
90 writel(val, i2s->base + reg); in img_i2s_in_writel()
93 static inline u32 img_i2s_in_readl(struct img_i2s_in *i2s, u32 reg) in img_i2s_in_readl() argument
95 return readl(i2s->base + reg); in img_i2s_in_readl()
98 static inline void img_i2s_in_ch_writel(struct img_i2s_in *i2s, u32 chan, in img_i2s_in_ch_writel() argument
101 writel(val, i2s->channel_base + (chan * IMG_I2S_IN_CH_STRIDE) + reg); in img_i2s_in_ch_writel()
[all …]
/openbmc/linux/sound/soc/hisilicon/
H A Dhi6210-i2s.c81 static inline void hi6210_write_reg(struct hi6210_i2s *i2s, int reg, u32 val) in hi6210_write_reg() argument
83 writel(val, i2s->base + reg); in hi6210_write_reg()
86 static inline u32 hi6210_read_reg(struct hi6210_i2s *i2s, int reg) in hi6210_read_reg() argument
88 return readl(i2s->base + reg); in hi6210_read_reg()
94 struct hi6210_i2s *i2s = dev_get_drvdata(cpu_dai->dev); in hi6210_i2s_startup() local
99 regmap_read(i2s->sysctrl, SC_PERIPH_RSTSTAT2, &val); in hi6210_i2s_startup()
101 regmap_write(i2s->sysctrl, SC_PERIPH_RSTDIS2, BIT(4)); in hi6210_i2s_startup()
103 for (n = 0; n < i2s->clocks; n++) { in hi6210_i2s_startup()
104 ret = clk_prepare_enable(i2s->clk[n]); in hi6210_i2s_startup()
109 ret = clk_set_rate(i2s->clk[CLK_I2S_BASE], 49152000); in hi6210_i2s_startup()
[all …]
/openbmc/linux/sound/soc/rockchip/
H A Drockchip_i2s.c63 static int i2s_pinctrl_select_bclk_on(struct rk_i2s_dev *i2s) in i2s_pinctrl_select_bclk_on() argument
67 if (!IS_ERR(i2s->pinctrl) && !IS_ERR_OR_NULL(i2s->bclk_on)) in i2s_pinctrl_select_bclk_on()
68 ret = pinctrl_select_state(i2s->pinctrl, i2s->bclk_on); in i2s_pinctrl_select_bclk_on()
71 dev_err(i2s->dev, "bclk enable failed %d\n", ret); in i2s_pinctrl_select_bclk_on()
76 static int i2s_pinctrl_select_bclk_off(struct rk_i2s_dev *i2s) in i2s_pinctrl_select_bclk_off() argument
81 if (!IS_ERR(i2s->pinctrl) && !IS_ERR_OR_NULL(i2s->bclk_off)) in i2s_pinctrl_select_bclk_off()
82 ret = pinctrl_select_state(i2s->pinctrl, i2s->bclk_off); in i2s_pinctrl_select_bclk_off()
85 dev_err(i2s->dev, "bclk disable failed %d\n", ret); in i2s_pinctrl_select_bclk_off()
92 struct rk_i2s_dev *i2s = dev_get_drvdata(dev); in i2s_runtime_suspend() local
94 regcache_cache_only(i2s->regmap, true); in i2s_runtime_suspend()
[all …]
/openbmc/linux/sound/soc/adi/
H A Daxi-i2s.c60 struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai); in axi_i2s_trigger() local
83 regmap_update_bits(i2s->regmap, AXI_I2S_REG_CTRL, mask, val); in axi_i2s_trigger()
91 struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai); in axi_i2s_hw_params() local
98 bclk_div = DIV_ROUND_UP(clk_get_rate(i2s->clk_ref), bclk_rate) / 2 - 1; in axi_i2s_hw_params()
100 regmap_write(i2s->regmap, AXI_I2S_REG_CLK_CTRL, (word_size << 16) | in axi_i2s_hw_params()
109 struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai); in axi_i2s_startup() local
118 regmap_write(i2s->regmap, AXI_I2S_REG_RESET, mask); in axi_i2s_startup()
122 &i2s->rate_constraints); in axi_i2s_startup()
126 return clk_prepare_enable(i2s->clk_ref); in axi_i2s_startup()
132 struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai); in axi_i2s_shutdown() local
[all …]
/openbmc/linux/sound/soc/stm/
H A Dstm32_i2s.c264 static int stm32_i2s_calc_clk_div(struct stm32_i2s_data *i2s, in stm32_i2s_calc_clk_div() argument
282 dev_dbg(&i2s->pdev->dev, "Divider: 2*%d(div)+%d(odd) = %d\n", in stm32_i2s_calc_clk_div()
288 dev_err(&i2s->pdev->dev, "Wrong divider setting\n"); in stm32_i2s_calc_clk_div()
293 dev_dbg(&i2s->pdev->dev, in stm32_i2s_calc_clk_div()
297 i2s->div = div; in stm32_i2s_calc_clk_div()
298 i2s->odd = odd; in stm32_i2s_calc_clk_div()
299 i2s->divider = divider; in stm32_i2s_calc_clk_div()
304 static int stm32_i2s_set_clk_div(struct stm32_i2s_data *i2s) in stm32_i2s_set_clk_div() argument
308 cgfr = I2S_CGFR_I2SDIV_SET(i2s->div) | (i2s->odd << I2S_CGFR_ODD_SHIFT); in stm32_i2s_set_clk_div()
311 return regmap_update_bits(i2s->regmap, STM32_I2S_CGFR_REG, in stm32_i2s_set_clk_div()
[all …]
/openbmc/linux/sound/soc/tegra/
H A Dtegra30_i2s.c41 struct tegra30_i2s *i2s = dev_get_drvdata(dev); in tegra30_i2s_runtime_suspend() local
43 regcache_cache_only(i2s->regmap, true); in tegra30_i2s_runtime_suspend()
45 clk_disable_unprepare(i2s->clk_i2s); in tegra30_i2s_runtime_suspend()
52 struct tegra30_i2s *i2s = dev_get_drvdata(dev); in tegra30_i2s_runtime_resume() local
55 ret = clk_prepare_enable(i2s->clk_i2s); in tegra30_i2s_runtime_resume()
61 regcache_cache_only(i2s->regmap, false); in tegra30_i2s_runtime_resume()
62 regcache_mark_dirty(i2s->regmap); in tegra30_i2s_runtime_resume()
64 ret = regcache_sync(i2s->regmap); in tegra30_i2s_runtime_resume()
71 clk_disable_unprepare(i2s->clk_i2s); in tegra30_i2s_runtime_resume()
79 struct tegra30_i2s *i2s = snd_soc_dai_get_drvdata(dai); in tegra30_i2s_set_fmt() local
[all …]
H A Dtegra210_i2s.c50 struct tegra210_i2s *i2s = dev_get_drvdata(dev); in tegra210_i2s_set_clock_rate() local
54 regmap_read(i2s->regmap, TEGRA210_I2S_CTRL, &val); in tegra210_i2s_set_clock_rate()
60 err = clk_set_rate(i2s->clk_i2s, clock_rate); in tegra210_i2s_set_clock_rate()
67 if (!IS_ERR(i2s->clk_sync_input)) { in tegra210_i2s_set_clock_rate()
73 err = clk_set_rate(i2s->clk_sync_input, clock_rate); in tegra210_i2s_set_clock_rate()
89 struct tegra210_i2s *i2s = dev_get_drvdata(dev); in tegra210_i2s_sw_reset() local
107 regmap_read(i2s->regmap, cif_reg, &cif_ctrl); in tegra210_i2s_sw_reset()
108 regmap_read(i2s->regmap, stream_reg, &stream_ctrl); in tegra210_i2s_sw_reset()
109 regmap_read(i2s->regmap, TEGRA210_I2S_CTRL, &i2s_ctrl); in tegra210_i2s_sw_reset()
112 regmap_update_bits(i2s->regmap, reset_reg, reset_mask, reset_en); in tegra210_i2s_sw_reset()
[all …]
H A Dtegra20_i2s.c39 struct tegra20_i2s *i2s = dev_get_drvdata(dev); in tegra20_i2s_runtime_suspend() local
41 regcache_cache_only(i2s->regmap, true); in tegra20_i2s_runtime_suspend()
43 clk_disable_unprepare(i2s->clk_i2s); in tegra20_i2s_runtime_suspend()
50 struct tegra20_i2s *i2s = dev_get_drvdata(dev); in tegra20_i2s_runtime_resume() local
53 ret = reset_control_assert(i2s->reset); in tegra20_i2s_runtime_resume()
57 ret = clk_prepare_enable(i2s->clk_i2s); in tegra20_i2s_runtime_resume()
65 ret = reset_control_deassert(i2s->reset); in tegra20_i2s_runtime_resume()
69 regcache_cache_only(i2s->regmap, false); in tegra20_i2s_runtime_resume()
70 regcache_mark_dirty(i2s->regmap); in tegra20_i2s_runtime_resume()
72 ret = regcache_sync(i2s->regmap); in tegra20_i2s_runtime_resume()
[all …]
/openbmc/linux/sound/soc/xtensa/
H A Dxtfpga-i2s.c76 unsigned (*tx_fn)(struct xtfpga_i2s *i2s,
131 struct xtfpga_i2s *i2s, struct snd_pcm_runtime *runtime, \
137 for (; i2s->tx_fifo_level < i2s->tx_fifo_high; \
138 i2s->tx_fifo_level += 2) { \
140 i2s->regs + XTFPGA_I2S_CHAN0_DATA); \
142 i2s->regs + XTFPGA_I2S_CHAN0_DATA); \
156 static bool xtfpga_pcm_push_tx(struct xtfpga_i2s *i2s) in xtfpga_pcm_push_tx() argument
162 tx_substream = rcu_dereference(i2s->tx_substream); in xtfpga_pcm_push_tx()
165 unsigned tx_ptr = READ_ONCE(i2s->tx_ptr); in xtfpga_pcm_push_tx()
166 unsigned new_tx_ptr = i2s->tx_fn(i2s, tx_substream->runtime, in xtfpga_pcm_push_tx()
[all …]
/openbmc/linux/sound/soc/jz4740/
H A Djz4740-i2s.c97 struct jz4740_i2s *i2s = snd_soc_dai_get_drvdata(dai); in jz4740_i2s_startup() local
105 if (!i2s->soc_info->shared_fifo_flush) { in jz4740_i2s_startup()
107 regmap_set_bits(i2s->regmap, JZ_REG_AIC_CTRL, JZ_AIC_CTRL_TFLUSH); in jz4740_i2s_startup()
109 regmap_set_bits(i2s->regmap, JZ_REG_AIC_CTRL, JZ_AIC_CTRL_RFLUSH); in jz4740_i2s_startup()
121 if (i2s->soc_info->shared_fifo_flush) in jz4740_i2s_startup()
122 regmap_set_bits(i2s->regmap, JZ_REG_AIC_CTRL, JZ_AIC_CTRL_TFLUSH); in jz4740_i2s_startup()
124 ret = clk_prepare_enable(i2s->clk_i2s); in jz4740_i2s_startup()
128 regmap_set_bits(i2s->regmap, JZ_REG_AIC_CONF, JZ_AIC_CONF_ENABLE); in jz4740_i2s_startup()
135 struct jz4740_i2s *i2s = snd_soc_dai_get_drvdata(dai); in jz4740_i2s_shutdown() local
140 regmap_clear_bits(i2s->regmap, JZ_REG_AIC_CONF, JZ_AIC_CONF_ENABLE); in jz4740_i2s_shutdown()
[all …]
/openbmc/linux/sound/soc/sunxi/
H A Dsun4i-i2s.c194 unsigned long (*get_bclk_parent_rate)(const struct sun4i_i2s *i2s);
203 int (*set_chan_cfg)(const struct sun4i_i2s *i2s,
206 int (*set_fmt)(const struct sun4i_i2s *i2s, unsigned int fmt);
276 static unsigned long sun4i_i2s_get_bclk_parent_rate(const struct sun4i_i2s *i2s) in sun4i_i2s_get_bclk_parent_rate() argument
278 return i2s->mclk_freq; in sun4i_i2s_get_bclk_parent_rate()
281 static unsigned long sun8i_i2s_get_bclk_parent_rate(const struct sun4i_i2s *i2s) in sun8i_i2s_get_bclk_parent_rate() argument
283 return clk_get_rate(i2s->mod_clk); in sun8i_i2s_get_bclk_parent_rate()
286 static int sun4i_i2s_get_bclk_div(struct sun4i_i2s *i2s, in sun4i_i2s_get_bclk_div() argument
292 const struct sun4i_i2s_clk_div *dividers = i2s->variant->bclk_dividers; in sun4i_i2s_get_bclk_div()
296 for (i = 0; i < i2s->variant->num_bclk_dividers; i++) { in sun4i_i2s_get_bclk_div()
[all …]
/openbmc/linux/sound/soc/google/
H A Dchv3-i2s.c101 static inline void chv3_i2s_wr(struct chv3_i2s_dev *i2s, int offset, u32 val) in chv3_i2s_wr() argument
103 writel(val, i2s->iobase + offset); in chv3_i2s_wr()
106 static inline u32 chv3_i2s_rd(struct chv3_i2s_dev *i2s, int offset) in chv3_i2s_rd() argument
108 return readl(i2s->iobase + offset); in chv3_i2s_rd()
113 struct chv3_i2s_dev *i2s = data; in chv3_i2s_isr() local
116 reg = readl(i2s->iobase_irq + I2S_IRQ_CLR); in chv3_i2s_isr()
121 snd_pcm_period_elapsed(i2s->rx_substream); in chv3_i2s_isr()
124 snd_pcm_period_elapsed(i2s->tx_substream); in chv3_i2s_isr()
126 writel(reg, i2s->iobase_irq + I2S_IRQ_CLR); in chv3_i2s_isr()
135 struct chv3_i2s_dev *i2s = snd_soc_dai_get_drvdata(asoc_rtd_to_cpu(rtd, 0)); in chv3_dma_open() local
[all …]
/openbmc/linux/sound/soc/loongson/
H A Dloongson_i2s.c27 struct loongson_i2s *i2s = snd_soc_dai_get_drvdata(dai); in loongson_i2s_trigger() local
35 regmap_update_bits(i2s->regmap, LS_I2S_CTRL, in loongson_i2s_trigger()
39 regmap_update_bits(i2s->regmap, LS_I2S_CTRL, in loongson_i2s_trigger()
47 regmap_update_bits(i2s->regmap, LS_I2S_CTRL, in loongson_i2s_trigger()
50 regmap_update_bits(i2s->regmap, LS_I2S_CTRL, in loongson_i2s_trigger()
64 struct loongson_i2s *i2s = snd_soc_dai_get_drvdata(dai); in loongson_i2s_hw_params() local
65 u32 clk_rate = i2s->clk_rate; in loongson_i2s_hw_params()
66 u32 sysclk = i2s->sysclk; in loongson_i2s_hw_params()
74 switch (i2s->rev_id) { in loongson_i2s_hw_params()
85 regmap_write(i2s->regmap, LS_I2S_CFG, val); in loongson_i2s_hw_params()
[all …]
H A Dloongson_i2s_pci.c78 struct loongson_i2s *i2s; in loongson_i2s_pci_probe() local
86 i2s = devm_kzalloc(&pdev->dev, sizeof(*i2s), GFP_KERNEL); in loongson_i2s_pci_probe()
87 if (!i2s) in loongson_i2s_pci_probe()
90 i2s->rev_id = pdev->revision; in loongson_i2s_pci_probe()
91 i2s->dev = &pdev->dev; in loongson_i2s_pci_probe()
92 pci_set_drvdata(pdev, i2s); in loongson_i2s_pci_probe()
99 i2s->reg_base = pcim_iomap_table(pdev)[0]; in loongson_i2s_pci_probe()
100 i2s->regmap = devm_regmap_init_mmio(&pdev->dev, i2s->reg_base, in loongson_i2s_pci_probe()
102 if (IS_ERR(i2s->regmap)) { in loongson_i2s_pci_probe()
104 return PTR_ERR(i2s->regmap); in loongson_i2s_pci_probe()
[all …]
/openbmc/linux/sound/soc/samsung/
H A Di2s.c139 static inline bool is_secondary(struct i2s_dai *i2s) in is_secondary() argument
141 return i2s->drv->id == SAMSUNG_I2S_ID_SECONDARY; in is_secondary()
145 static inline bool tx_active(struct i2s_dai *i2s) in tx_active() argument
149 if (!i2s) in tx_active()
152 active = readl(i2s->priv->addr + I2SCON); in tx_active()
154 if (is_secondary(i2s)) in tx_active()
163 static inline struct i2s_dai *get_other_dai(struct i2s_dai *i2s) in get_other_dai() argument
165 return i2s->pri_dai ? : i2s->sec_dai; in get_other_dai()
169 static inline bool other_tx_active(struct i2s_dai *i2s) in other_tx_active() argument
171 struct i2s_dai *other = get_other_dai(i2s); in other_tx_active()
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dexynos5250.dtsi81 i2s0: i2s@3830000 {
82 compatible = "samsung,s5pv210-i2s";
87 samsung,i2s-epll-clock-frequency = <192000000>;
88 samsung,i2s-sampling-rate = <48000>;
89 samsung,i2s-bits-per-sample = <16>;
90 samsung,i2s-channels = <2>;
91 samsung,i2s-lr-clk-framesize = <256>;
92 samsung,i2s-bit-clk-framesize = <32>;
93 samsung,i2s-id = <0>;
96 i2s1: i2s@12d60000 {
[all …]
H A Dexynos54xx.dtsi107 i2s0: i2s@3830000 {
108 compatible = "samsung,s5pv210-i2s";
112 samsung,i2s-epll-clock-frequency = <192000000>;
113 samsung,i2s-sampling-rate = <48000>;
114 samsung,i2s-bits-per-sample = <16>;
115 samsung,i2s-channels = <2>;
116 samsung,i2s-lr-clk-framesize = <256>;
117 samsung,i2s-bit-clk-framesize = <32>;
118 samsung,i2s-id = <0>;
/openbmc/u-boot/doc/device-tree-bindings/exynos/
H A Dsound.txt3 The device node for sound subsytem which contains codec and i2s block
8 - samsung,i2s-epll-clock-frequency : epll clock output frequency in Hz
9 - samsung,i2s-sampling-rate : sampling rate, default is 48000
10 - samsung,i2s-bits-per-sample : sample width, defalut is 16 bit
11 - samsung,i2s-channels : nummber of channels, default is 2
12 - samsung,i2s-lr-clk-framesize : lr clock frame size
13 - samsung,i2s-bit-clk-framesize : bit clock frame size
20 samsung,i2s-epll-clock-frequency = <192000000>;
21 samsung,i2s-sampling-rate = <48000>;
22 samsung,i2s-bits-per-sample = <16>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dhisilicon,hi6210-i2s.txt1 * Hisilicon 6210 i2s controller
6 - "hisilicon,hi6210-i2s"
7 - reg: physical base address of the i2s controller unit and length of
9 - interrupts: should contain the i2s interrupt.
14 - "i2s-base"
25 Example for the hi6210 i2s controller:
27 i2s0: i2s@f7118000{
28 compatible = "hisilicon,hi6210-i2s";
29 reg = <0x0 0xf7118000 0x0 0x8000>; /* i2s unit */
33 clock-names = "dacodec", "i2s-base";
[all …]
H A Dnvidia,tegra30-i2s.txt4 - compatible : For Tegra30, must contain "nvidia,tegra30-i2s". For Tegra124,
5 must contain "nvidia,tegra124-i2s". Otherwise, must contain
6 "nvidia,<chip>-i2s" plus at least one of the above, where <chip> is
14 - i2s
20 i2s@70080300 {
21 compatible = "nvidia,tegra30-i2s";
26 reset-names = "i2s";
H A Drockchip-max98090.txt6 - rockchip,i2s-controller: The phandle of the Rockchip I2S controller that's
21 rockchip,i2s-controller = <&i2s>;
30 rockchip,i2s-controller = <&i2s>;
38 rockchip,i2s-controller = <&i2s>;
H A Dmikroe,mikroe-proto.txt5 - dai-format: Must be "i2s".
6 - i2s-controller: The phandle of the I2S controller.
19 i2s-controller = <&i2s0>;
21 dai-format = "i2s";
/openbmc/linux/sound/soc/bcm/
H A DMakefile3 snd-soc-bcm2835-i2s-objs := bcm2835-i2s.o
5 obj-$(CONFIG_SND_BCM2835_SOC_I2S) += snd-soc-bcm2835-i2s.o
13 snd-soc-63xx-objs := bcm63xx-i2s-whistler.o bcm63xx-pcm-whistler.o
/openbmc/linux/sound/soc/atmel/
H A DMakefile6 snd-soc-atmel-i2s-objs := atmel-i2s.o
7 snd-soc-mchp-i2s-mcc-objs := mchp-i2s-mcc.o
21 obj-$(CONFIG_SND_ATMEL_SOC_I2S) += snd-soc-atmel-i2s.o
22 obj-$(CONFIG_SND_MCHP_SOC_I2S_MCC) += snd-soc-mchp-i2s-mcc.o

12345678910>>...21