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/openbmc/u-boot/drivers/usb/gadget/
H A Dgadget_chips.h18 #define gadget_is_net2280(g) (!strcmp("net2280", (g)->name)) argument
20 #define gadget_is_net2280(g) 0 argument
24 #define gadget_is_amd5536udc(g) (!strcmp("amd5536udc", (g)->name)) argument
26 #define gadget_is_amd5536udc(g) 0 argument
30 #define gadget_is_dummy(g) (!strcmp("dummy_udc", (g)->name)) argument
32 #define gadget_is_dummy(g) 0 argument
36 #define gadget_is_pxa(g) (!strcmp("pxa2xx_udc", (g)->name)) argument
38 #define gadget_is_pxa(g) 0 argument
42 #define gadget_is_goku(g) (!strcmp("goku_udc", (g)->name)) argument
44 #define gadget_is_goku(g) 0 argument
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/openbmc/qemu/hw/display/
H A Dvirtio-gpu-base.c24 virtio_gpu_base_reset(VirtIOGPUBase *g) in virtio_gpu_base_reset() argument
28 g->enable = 0; in virtio_gpu_base_reset()
30 for (i = 0; i < g->conf.max_outputs; i++) { in virtio_gpu_base_reset()
31 g->scanout[i].resource_id = 0; in virtio_gpu_base_reset()
32 g->scanout[i].width = 0; in virtio_gpu_base_reset()
33 g->scanout[i].height = 0; in virtio_gpu_base_reset()
34 g->scanout[i].x = 0; in virtio_gpu_base_reset()
35 g->scanout[i].y = 0; in virtio_gpu_base_reset()
36 g->scanout[i].ds = NULL; in virtio_gpu_base_reset()
41 virtio_gpu_base_fill_display_info(VirtIOGPUBase *g, in virtio_gpu_base_fill_display_info() argument
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H A Dvhost-user-gpu.c119 static void vhost_user_gpu_update_blocked(VhostUserGPU *g, bool blocked);
122 vhost_user_gpu_handle_cursor(VhostUserGPU *g, VhostUserGpuMsg *msg) in vhost_user_gpu_handle_cursor() argument
127 if (pos->scanout_id >= g->parent_obj.conf.max_outputs) { in vhost_user_gpu_handle_cursor()
130 s = &g->parent_obj.scanout[pos->scanout_id]; in vhost_user_gpu_handle_cursor()
152 vhost_user_gpu_send_msg(VhostUserGPU *g, const VhostUserGpuMsg *msg) in vhost_user_gpu_send_msg() argument
154 qemu_chr_fe_write(&g->vhost_chr, (uint8_t *)msg, in vhost_user_gpu_send_msg()
159 vhost_user_gpu_unblock(VhostUserGPU *g) in vhost_user_gpu_unblock() argument
166 vhost_user_gpu_send_msg(g, &msg); in vhost_user_gpu_unblock()
170 vhost_user_gpu_handle_display(VhostUserGPU *g, VhostUserGpuMsg *msg) in vhost_user_gpu_handle_display() argument
187 vhost_user_gpu_send_msg(g, &reply); in vhost_user_gpu_handle_display()
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H A Dvirtio-gpu-virgl.c33 virtio_gpu_virgl_find_resource(VirtIOGPU *g, uint32_t resource_id) in virtio_gpu_virgl_find_resource() argument
37 res = virtio_gpu_find_resource(g, resource_id); in virtio_gpu_virgl_find_resource()
56 struct VirtIOGPU *g; member
68 VirtIOGPU *g = opaque; in virtio_gpu_virgl_resume_cmdq_bh() local
70 virtio_gpu_process_cmdq(g); in virtio_gpu_virgl_resume_cmdq_bh()
83 b = VIRTIO_GPU_BASE(vmr->g); in virtio_gpu_virgl_hostmem_region_free()
91 gl = VIRTIO_GPU_GL(vmr->g); in virtio_gpu_virgl_hostmem_region_free()
96 virtio_gpu_virgl_map_resource_blob(VirtIOGPU *g, in virtio_gpu_virgl_map_resource_blob() argument
101 VirtIOGPUBase *b = VIRTIO_GPU_BASE(g); in virtio_gpu_virgl_map_resource_blob()
120 vmr->g = g; in virtio_gpu_virgl_map_resource_blob()
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H A Dvirtio-gpu.c39 virtio_gpu_find_check_resource(VirtIOGPU *g, uint32_t resource_id,
45 void virtio_gpu_update_cursor_data(VirtIOGPU *g, in virtio_gpu_update_cursor_data() argument
53 res = virtio_gpu_find_check_resource(g, resource_id, false, in virtio_gpu_update_cursor_data()
78 static void update_cursor(VirtIOGPU *g, struct virtio_gpu_update_cursor *cursor) in update_cursor() argument
81 VirtIOGPUClass *vgc = VIRTIO_GPU_GET_CLASS(g); in update_cursor()
84 if (cursor->pos.scanout_id >= g->parent_obj.conf.max_outputs) { in update_cursor()
87 s = &g->parent_obj.scanout[cursor->pos.scanout_id]; in update_cursor()
104 vgc->update_cursor_data(g, s, cursor->resource_id); in update_cursor()
117 virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id) in virtio_gpu_find_resource() argument
121 QTAILQ_FOREACH(res, &g->reslist, next) { in virtio_gpu_find_resource()
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H A Dvirtio-vga.c13 VirtIOGPUBase *g = vvga->vgpu; in virtio_vga_base_invalidate_display() local
15 if (g->enable) { in virtio_vga_base_invalidate_display()
16 g->hw_ops->invalidate(g); in virtio_vga_base_invalidate_display()
25 VirtIOGPUBase *g = vvga->vgpu; in virtio_vga_base_update_display() local
27 if (g->enable) { in virtio_vga_base_update_display()
28 g->hw_ops->gfx_update(g); in virtio_vga_base_update_display()
37 VirtIOGPUBase *g = vvga->vgpu; in virtio_vga_base_text_update() local
39 if (g->enable) { in virtio_vga_base_text_update()
40 if (g->hw_ops->text_update) { in virtio_vga_base_text_update()
41 g->hw_ops->text_update(g, chardata); in virtio_vga_base_text_update()
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H A Dvirtio-gpu-rutabaga.c32 virtio_gpu_rutabaga_update_cursor(VirtIOGPU *g, struct virtio_gpu_scanout *s, in virtio_gpu_rutabaga_update_cursor() argument
39 VirtIOGPURutabaga *vr = VIRTIO_GPU_RUTABAGA(g); in virtio_gpu_rutabaga_update_cursor()
41 res = virtio_gpu_find_resource(g, resource_id); in virtio_gpu_rutabaga_update_cursor()
69 VirtIOGPU *g = VIRTIO_GPU(b); in virtio_gpu_rutabaga_gl_flushed() local
70 virtio_gpu_process_cmdq(g); in virtio_gpu_rutabaga_gl_flushed()
74 rutabaga_cmd_create_resource_2d(VirtIOGPU *g, in rutabaga_cmd_create_resource_2d() argument
82 VirtIOGPURutabaga *vr = VIRTIO_GPU_RUTABAGA(g); in rutabaga_cmd_create_resource_2d()
108 QTAILQ_INSERT_HEAD(&g->reslist, res, next); in rutabaga_cmd_create_resource_2d()
112 rutabaga_cmd_create_resource_3d(VirtIOGPU *g, in rutabaga_cmd_create_resource_3d() argument
120 VirtIOGPURutabaga *vr = VIRTIO_GPU_RUTABAGA(g); in rutabaga_cmd_create_resource_3d()
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H A Dvirtio-gpu-gl.c28 static void virtio_gpu_gl_update_cursor_data(VirtIOGPU *g, in virtio_gpu_gl_update_cursor_data() argument
32 VirtIOGPUGL *gl = VIRTIO_GPU_GL(g); in virtio_gpu_gl_update_cursor_data()
58 VirtIOGPU *g = VIRTIO_GPU(b); in virtio_gpu_gl_flushed() local
60 virtio_gpu_process_cmdq(g); in virtio_gpu_gl_flushed()
65 VirtIOGPU *g = VIRTIO_GPU(vdev); in virtio_gpu_gl_handle_ctrl() local
75 virtio_gpu_virgl_reset(g); in virtio_gpu_gl_handle_ctrl()
78 if (virtio_gpu_virgl_init(g)) { in virtio_gpu_gl_handle_ctrl()
96 QTAILQ_INSERT_TAIL(&g->cmdq, cmd, next); in virtio_gpu_gl_handle_ctrl()
100 virtio_gpu_process_cmdq(g); in virtio_gpu_gl_handle_ctrl()
101 virtio_gpu_virgl_fence_poll(g); in virtio_gpu_gl_handle_ctrl()
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/openbmc/linux/tools/perf/bench/
H A Dnuma.c48 #define tprintf(x...) do { if (g && g->p.show_details >= 0) printf(x); } while (0)
54 #define dprintf(x...) do { if (g && g->p.show_details >= 1) printf(x); } while (0)
162 static struct global_info *g = NULL; variable
231 for (i = 0; i < g->p.nr_nodes; i++) { in nr_numa_nodes()
293 for (cpu = 0; cpu < g->p.nr_cpus; cpu++) in bind_to_cpu()
296 if (target_cpu < 0 || target_cpu >= g->p.nr_cpus) in bind_to_cpu()
339 for (cpu = 0; cpu < g->p.nr_cpus; cpu++) in bind_to_node()
387 ret = set_mempolicy(MPOL_DEFAULT, NULL, g->p.nr_nodes-1); in mempol_restore()
450 if (ret && !g->print_once) { in alloc_data()
451 g->print_once = 1; in alloc_data()
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/openbmc/linux/drivers/gpio/
H A Dgpio-ftgpio010.c57 struct ftgpio_gpio *g = gpiochip_get_data(gc); in ftgpio_gpio_ack_irq() local
59 writel(BIT(irqd_to_hwirq(d)), g->base + GPIO_INT_CLR); in ftgpio_gpio_ack_irq()
65 struct ftgpio_gpio *g = gpiochip_get_data(gc); in ftgpio_gpio_mask_irq() local
68 val = readl(g->base + GPIO_INT_EN); in ftgpio_gpio_mask_irq()
70 writel(val, g->base + GPIO_INT_EN); in ftgpio_gpio_mask_irq()
77 struct ftgpio_gpio *g = gpiochip_get_data(gc); in ftgpio_gpio_unmask_irq() local
81 val = readl(g->base + GPIO_INT_EN); in ftgpio_gpio_unmask_irq()
83 writel(val, g->base + GPIO_INT_EN); in ftgpio_gpio_unmask_irq()
89 struct ftgpio_gpio *g = gpiochip_get_data(gc); in ftgpio_gpio_set_irq_type() local
93 reg_type = readl(g->base + GPIO_INT_TYPE); in ftgpio_gpio_set_irq_type()
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H A Dgpio-ixp4xx.c61 struct ixp4xx_gpio *g = gpiochip_get_data(gc); in ixp4xx_gpio_irq_ack() local
63 __raw_writel(BIT(d->hwirq), g->base + IXP4XX_REG_GPIS); in ixp4xx_gpio_irq_ack()
77 struct ixp4xx_gpio *g = gpiochip_get_data(gc); in ixp4xx_gpio_irq_unmask() local
80 if (!(g->irq_edge & BIT(d->hwirq))) in ixp4xx_gpio_irq_unmask()
90 struct ixp4xx_gpio *g = gpiochip_get_data(gc); in ixp4xx_gpio_irq_set_type() local
101 g->irq_edge |= BIT(d->hwirq); in ixp4xx_gpio_irq_set_type()
106 g->irq_edge |= BIT(d->hwirq); in ixp4xx_gpio_irq_set_type()
111 g->irq_edge |= BIT(d->hwirq); in ixp4xx_gpio_irq_set_type()
116 g->irq_edge &= ~BIT(d->hwirq); in ixp4xx_gpio_irq_set_type()
121 g->irq_edge &= ~BIT(d->hwirq); in ixp4xx_gpio_irq_set_type()
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H A Dgpio-davinci.c75 struct davinci_gpio_regs __iomem *g; in irq2regs() local
77 g = (__force struct davinci_gpio_regs __iomem *)irq_data_get_irq_chip_data(d); in irq2regs()
79 return g; in irq2regs()
91 struct davinci_gpio_regs __iomem *g; in __davinci_direction() local
97 g = d->regs[bank]; in __davinci_direction()
99 temp = readl_relaxed(&g->dir); in __davinci_direction()
102 writel_relaxed(mask, value ? &g->set_data : &g->clr_data); in __davinci_direction()
106 writel_relaxed(temp, &g->dir); in __davinci_direction()
133 struct davinci_gpio_regs __iomem *g; in davinci_gpio_get() local
136 g = d->regs[bank]; in davinci_gpio_get()
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/openbmc/linux/drivers/pinctrl/qcom/
H A Dpinctrl-msm.c87 const struct msm_pingroup *g) \
89 return readl(pctrl->regs[g->tile] + g->name##_reg); \
92 const struct msm_pingroup *g) \
94 writel(val, pctrl->regs[g->tile] + g->name##_reg); \
104 const struct msm_pingroup *g) in MSM_ACCESSOR()
106 u32 val = g->intr_ack_high ? BIT(g->intr_status_bit) : 0; in MSM_ACCESSOR()
108 msm_writel_intr_status(val, pctrl, g); in MSM_ACCESSOR()
191 const struct msm_pingroup *g; in msm_pinmux_set_mux() local
196 g = &pctrl->soc->groups[group]; in msm_pinmux_set_mux()
197 mask = GENMASK(g->mux_bit + order_base_2(g->nfuncs) - 1, g->mux_bit); in msm_pinmux_set_mux()
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/openbmc/linux/Documentation/userspace-api/media/v4l/
H A Duser-func.rst17 vidioc-dbg-g-chip-info
18 vidioc-dbg-g-register
34 vidioc-g-audio
35 vidioc-g-audioout
36 vidioc-g-crop
37 vidioc-g-ctrl
38 vidioc-g-dv-timings
39 vidioc-g-edid
40 vidioc-g-enc-index
41 vidioc-g-ext-ctrls
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H A Dpixfmt-rgb.rst45 - 'r', 'g' and 'b' denote bits of the red, green and blue components
130 - g\ :sub:`2`
131 - g\ :sub:`1`
132 - g\ :sub:`0`
141 - g\ :sub:`3`
142 - g\ :sub:`2`
143 - g\ :sub:`1`
144 - g\ :sub:`0`
164 - g\ :sub:`3`
165 - g\ :sub:`2`
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H A Dsubdev-formats.rst294 - g\ :sub:`3`
295 - g\ :sub:`2`
296 - g\ :sub:`1`
297 - g\ :sub:`0`
366 - g\ :sub:`3`
367 - g\ :sub:`2`
368 - g\ :sub:`1`
369 - g\ :sub:`0`
403 - g\ :sub:`3`
404 - g\ :sub:`2`
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/openbmc/qemu/include/ui/
H A Dpixel_ops.h1 static inline unsigned int rgb_to_pixel8(unsigned int r, unsigned int g, in rgb_to_pixel8() argument
4 return ((r >> 5) << 5) | ((g >> 5) << 2) | (b >> 6); in rgb_to_pixel8()
7 static inline unsigned int rgb_to_pixel15(unsigned int r, unsigned int g, in rgb_to_pixel15() argument
10 return ((r >> 3) << 10) | ((g >> 3) << 5) | (b >> 3); in rgb_to_pixel15()
13 static inline unsigned int rgb_to_pixel15bgr(unsigned int r, unsigned int g, in rgb_to_pixel15bgr() argument
16 return ((b >> 3) << 10) | ((g >> 3) << 5) | (r >> 3); in rgb_to_pixel15bgr()
19 static inline unsigned int rgb_to_pixel16(unsigned int r, unsigned int g, in rgb_to_pixel16() argument
22 return ((r >> 3) << 11) | ((g >> 2) << 5) | (b >> 3); in rgb_to_pixel16()
25 static inline unsigned int rgb_to_pixel16bgr(unsigned int r, unsigned int g, in rgb_to_pixel16bgr() argument
28 return ((b >> 3) << 11) | ((g >> 2) << 5) | (r >> 3); in rgb_to_pixel16bgr()
[all …]
/openbmc/linux/drivers/pinctrl/tegra/
H A Dpinctrl-tegra.c256 const struct tegra_pingroup *g; in tegra_pinctrl_set_mux() local
260 g = &pmx->soc->groups[group]; in tegra_pinctrl_set_mux()
262 if (WARN_ON(g->mux_reg < 0)) in tegra_pinctrl_set_mux()
265 for (i = 0; i < ARRAY_SIZE(g->funcs); i++) { in tegra_pinctrl_set_mux()
266 if (g->funcs[i] == function) in tegra_pinctrl_set_mux()
269 if (WARN_ON(i == ARRAY_SIZE(g->funcs))) in tegra_pinctrl_set_mux()
272 val = pmx_readl(pmx, g->mux_bank, g->mux_reg); in tegra_pinctrl_set_mux()
273 val &= ~(0x3 << g->mux_bit); in tegra_pinctrl_set_mux()
274 val |= i << g->mux_bit; in tegra_pinctrl_set_mux()
275 pmx_writel(pmx, val, g->mux_bank, g->mux_reg); in tegra_pinctrl_set_mux()
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/openbmc/qemu/contrib/vhost-user-gpu/
H A Dvirgl.c22 vg_virgl_update_cursor_data(VuGpu *g, uint32_t resource_id, in vg_virgl_update_cursor_data() argument
38 virgl_cmd_context_create(VuGpu *g, in virgl_cmd_context_create() argument
50 virgl_cmd_context_destroy(VuGpu *g, in virgl_cmd_context_destroy() argument
61 virgl_cmd_create_resource_2d(VuGpu *g, in virgl_cmd_create_resource_2d() argument
84 virgl_cmd_create_resource_3d(VuGpu *g, in virgl_cmd_create_resource_3d() argument
107 virgl_cmd_resource_unref(VuGpu *g, in virgl_cmd_resource_unref() argument
120 vg_cleanup_mapping_iov(g, res_iovs, num_iovs); in virgl_cmd_resource_unref()
131 virgl_cmd_get_capset_info(VuGpu *g, in virgl_cmd_get_capset_info() argument
155 vg_ctrl_response(g, cmd, &resp.hdr, sizeof(resp)); in virgl_cmd_get_capset_info()
170 virgl_cmd_get_capset(VuGpu *g, in virgl_cmd_get_capset() argument
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H A Dvhost-user-gpu.c52 static void vg_cleanup_mapping(VuGpu *g,
111 vg_sock_fd_close(VuGpu *g) in vg_sock_fd_close() argument
113 if (g->sock_fd >= 0) { in vg_sock_fd_close()
114 close(g->sock_fd); in vg_sock_fd_close()
115 g->sock_fd = -1; in vg_sock_fd_close()
122 VuGpu *g = user_data; in source_wait_cb() local
124 if (!vg_recv_msg(g, VHOST_USER_GPU_DMABUF_UPDATE, 0, NULL)) { in source_wait_cb()
129 g->wait_in = 0; in source_wait_cb()
130 vg_handle_ctrl(&g->dev.parent, 0); in source_wait_cb()
136 vg_wait_ok(VuGpu *g) in vg_wait_ok() argument
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/openbmc/linux/drivers/usb/gadget/udc/
H A Dtrace.h21 TP_PROTO(struct usb_gadget *g, int ret),
22 TP_ARGS(g, ret),
45 __entry->speed = g->speed;
46 __entry->max_speed = g->max_speed;
47 __entry->state = g->state;
48 __entry->mA = g->mA;
49 __entry->sg_supported = g->sg_supported;
50 __entry->is_otg = g->is_otg;
51 __entry->is_a_peripheral = g->is_a_peripheral;
52 __entry->b_hnp_enable = g->b_hnp_enable;
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/openbmc/linux/crypto/
H A Dsm3.c38 #define R(i, a, b, c, d, e, f, g, h, t, w1, w2) \ argument
43 h += GG ## i(e, f, g) + ss1 + (w1); \
49 #define R1(a, b, c, d, e, f, g, h, t, w1, w2) \ argument
50 R(1, a, b, c, d, e, f, g, h, t, w1, w2)
51 #define R2(a, b, c, d, e, f, g, h, t, w1, w2) \ argument
52 R(2, a, b, c, d, e, f, g, h, t, w1, w2)
74 u32 a, b, c, d, e, f, g, h, ss1, ss2; in sm3_transform() local
82 g = sctx->state[6]; in sm3_transform()
85 R1(a, b, c, d, e, f, g, h, K[0], I(0), I(4)); in sm3_transform()
86 R1(d, a, b, c, h, e, f, g, K[1], I(1), I(5)); in sm3_transform()
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/openbmc/qemu/tests/avocado/
H A Dreverse_debugging.py63 def get_reg_le(g, reg): argument
64 res = g.cmd(b'p%x' % reg)
71 def get_reg_be(g, reg): argument
72 res = g.cmd(b'p%x' % reg)
75 def get_reg(self, g, reg): argument
78 return self.get_reg_le(g, reg)
80 return self.get_reg_be(g, reg)
82 def get_pc(self, g): argument
83 return self.get_reg(g, self.REG_PC)
85 def check_pc(self, g, addr): argument
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/openbmc/linux/drivers/staging/most/dim2/
H A Dhal.c84 static struct lld_global_vars_t g = { false }; variable
120 if ((g.dbr_map[i] & mask) == 0) { in alloc_dbr()
121 g.dbr_map[i] |= mask; in alloc_dbr()
140 g.dbr_map[block_idx / 32] &= ~mask; in free_dbr()
147 writel(val, &g.dim2->MADR); in dim2_transfer_madr()
150 while ((readl(&g.dim2->MCTL) & 1) != 1) in dim2_transfer_madr()
153 writel(0, &g.dim2->MCTL); /* clear transfer complete */ in dim2_transfer_madr()
163 writel(0, &g.dim2->MCTL); /* clear transfer complete */ in dim2_clear_dbr()
164 writel(0, &g.dim2->MDAT0); in dim2_clear_dbr()
174 return readl((&g.dim2->MDAT0) + mdat_idx); in dim2_read_ctr()
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/openbmc/openbmc/poky/meta/recipes-devtools/valgrind/valgrind/
H A D0001-makefiles-Drop-setting-mcpu-to-cortex-a8-on-arm-arch.patch43 -v6intARM_CFLAGS = $(AM_CFLAGS) -g -O0 -mcpu=cortex-a8 -marm
44 -v6intThumb_CFLAGS = $(AM_CFLAGS) -g -O0 -mcpu=cortex-a8 -mthumb
45 +v6intARM_CFLAGS = $(AM_CFLAGS) -g -O0 -marm
46 +v6intThumb_CFLAGS = $(AM_CFLAGS) -g -O0 -mthumb
48 -v6media_CFLAGS = $(AM_CFLAGS) -g -O0 -mcpu=cortex-a8 -mthumb
49 +v6media_CFLAGS = $(AM_CFLAGS) -g -O0 -mthumb
51 v8crypto_a_CFLAGS = $(AM_CFLAGS) -g -O0 -mfpu=crypto-neon-fp-armv8 -marm -march=armv8-a
52 v8crypto_t_CFLAGS = $(AM_CFLAGS) -g -O0 -mfpu=crypto-neon-fp-armv8 -mthumb -march=armv8-a
53 @@ -74,23 +74,23 @@ v8memory_t_CFLAGS = $(AM_CFLAGS) -g -O0
55 vcvt_fixed_float_VFP_CFLAGS = $(AM_CFLAGS) -g -O0 -mcpu=cortex-a8 -mfpu=neon
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