Searched refs:freeze_controller_base (Results 1 – 2 of 2) sorted by relevance
13 static const struct socfpga_freeze_controller *freeze_controller_base = variable33 writel(SYSMGR_FRZCTRL_SRC_VIO1_ENUM_SW, &freeze_controller_base->src); in sys_mgr_frzctrl_freeze_req()38 &freeze_controller_base->vioctrl + channel_id); in sys_mgr_frzctrl_freeze_req()73 clrbits_le32(&freeze_controller_base->hioctrl, reg_cfg_mask); in sys_mgr_frzctrl_freeze_req()80 reg_value = readl(&freeze_controller_base->hioctrl); in sys_mgr_frzctrl_freeze_req()88 writel(reg_value, &freeze_controller_base->hioctrl); in sys_mgr_frzctrl_freeze_req()94 reg_value = readl(&freeze_controller_base->hioctrl); in sys_mgr_frzctrl_freeze_req()99 writel(reg_value, &freeze_controller_base->hioctrl); in sys_mgr_frzctrl_freeze_req()115 writel(SYSMGR_FRZCTRL_SRC_VIO1_ENUM_SW, &freeze_controller_base->src); in sys_mgr_frzctrl_thaw_req()120 = (u32)(&freeze_controller_base->vioctrl + channel_id); in sys_mgr_frzctrl_thaw_req()[all …]
32 static const struct socfpga_freeze_controller *freeze_controller_base = variable156 clrbits_le32(&freeze_controller_base->hioctrl, in scan_mgr_io_scan_chain_prg()