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Searched refs:frac_div (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/clk/tegra/
H A Dclk-super.c149 struct clk_hw *div_hw = &super->frac_div.hw; in clk_super_determine_rate()
167 struct clk_hw *div_hw = &super->frac_div.hw; in clk_super_recalc_rate()
178 struct clk_hw *div_hw = &super->frac_div.hw; in clk_super_set_rate()
188 struct clk_hw *div_hw = &super->frac_div.hw; in clk_super_restore_context()
267 super->frac_div.reg = reg + 4; in tegra_clk_register_super_clk()
268 super->frac_div.shift = 16; in tegra_clk_register_super_clk()
269 super->frac_div.width = 8; in tegra_clk_register_super_clk()
270 super->frac_div.frac_width = 1; in tegra_clk_register_super_clk()
271 super->frac_div.lock = lock; in tegra_clk_register_super_clk()
H A Dclk-tegra-super-cclk.c165 super->frac_div.reg = reg + 4; in tegra_clk_register_super_cclk()
166 super->frac_div.shift = 16; in tegra_clk_register_super_cclk()
167 super->frac_div.width = 8; in tegra_clk_register_super_cclk()
168 super->frac_div.frac_width = 1; in tegra_clk_register_super_cclk()
169 super->frac_div.lock = lock; in tegra_clk_register_super_cclk()
H A Dclk.h742 struct tegra_clk_frac_div frac_div; member
/openbmc/linux/drivers/clk/x86/
H A Dclk-cgu-pll.c26 unsigned int div, unsigned int frac, unsigned int frac_div) in lgm_pll_calc_rate() argument
33 do_div(frate, frac_div); in lgm_pll_calc_rate()
/openbmc/linux/sound/soc/codecs/
H A Dcx2072x.c591 unsigned int frac_div; in cx2072x_config_pll() local
625 frac_div = pll_output - (int_div * pll_input); in cx2072x_config_pll()
627 if (frac_div) { in cx2072x_config_pll()
628 frac_div *= 1000; in cx2072x_config_pll()
629 frac_div /= pll_input; in cx2072x_config_pll()
630 frac_num = (u64)(4000 + frac_div) * ((1 << 20) - 4); in cx2072x_config_pll()
638 if (frac_div == 0) { in cx2072x_config_pll()
653 if (frac_div == 0) { in cx2072x_config_pll()
H A Dda732x.c1120 u64 frac_div; in da732x_set_dai_pll() local
1158 frac_div = (u64)(freq_out % fref) * 8192ULL; in da732x_set_dai_pll()
1159 do_div(frac_div, fref); in da732x_set_dai_pll()
1160 div_mid = (frac_div >> DA732X_1BYTE_SHIFT) & DA732X_U8_MASK; in da732x_set_dai_pll()
1161 div_lo = (frac_div) & DA732X_U8_MASK; in da732x_set_dai_pll()
H A Dda7213.c1441 u64 frac_div; in _da7213_set_component_pll() local
1516 frac_div = (u64)(fout % freq_ref) * 8192ULL; in _da7213_set_component_pll()
1517 do_div(frac_div, freq_ref); in _da7213_set_component_pll()
1518 pll_frac_top = (frac_div >> DA7213_BYTE_SHIFT) & DA7213_BYTE_MASK; in _da7213_set_component_pll()
1519 pll_frac_bot = (frac_div) & DA7213_BYTE_MASK; in _da7213_set_component_pll()
H A Dda7219.c1227 u64 frac_div; in da7219_set_pll() local
1278 frac_div = (u64)(fout % freq_ref) * 8192ULL; in da7219_set_pll()
1279 do_div(frac_div, freq_ref); in da7219_set_pll()
1280 pll_frac_top = (frac_div >> DA7219_BYTE_SHIFT) & DA7219_BYTE_MASK; in da7219_set_pll()
1281 pll_frac_bot = (frac_div) & DA7219_BYTE_MASK; in da7219_set_pll()
H A Dsgtl5000.c990 unsigned int in, int_div, frac_div; in sgtl5000_set_clock() local
1007 frac_div = t; in sgtl5000_set_clock()
1009 frac_div << SGTL5000_PLL_FRAC_DIV_SHIFT; in sgtl5000_set_clock()
H A Dda7218.c1864 u64 frac_div; in da7218_set_dai_pll() local
1915 frac_div = (u64)(fout % freq_ref) * 8192ULL; in da7218_set_dai_pll()
1916 do_div(frac_div, freq_ref); in da7218_set_dai_pll()
1917 pll_frac_top = (frac_div >> DA7218_BYTE_SHIFT) & DA7218_BYTE_MASK; in da7218_set_dai_pll()
1918 pll_frac_bot = (frac_div) & DA7218_BYTE_MASK; in da7218_set_dai_pll()
/openbmc/qemu/fpu/
H A Dsoftfloat-parts.c.inc606 a->exp -= b->exp + frac_div(a, b);
H A Dsoftfloat.c1094 #define frac_div(A, B) FRAC_GENERIC_64_128(div, A)(A, B) macro