/openbmc/linux/arch/parisc/math-emu/ |
H A D | decode_exc.c | 94 int target, exception_index = 1; in decode_fpu() local 135 for (exception_index=1; exception_index<=MAX_EXCP_REG; exception_index++) { in decode_fpu() 136 current_ir = Excp_instr(exception_index); in decode_fpu() 142 excptype = Excp_type(exception_index); in decode_fpu() 150 Clear_excp_register(exception_index); in decode_fpu() 171 Fpu_register[exception_index]); in decode_fpu() 212 if (Ibit(Fpu_register[exception_index])) inexact = TRUE; in decode_fpu() 222 if (Rabit(Fpu_register[exception_index])) in decode_fpu() 234 if (Rabit(Fpu_register[exception_index])) in decode_fpu() 255 Set_exceptiontype(Fpu_register[exception_index], in decode_fpu() [all …]
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/openbmc/qemu/target/i386/tcg/ |
H A D | excp_helper.c | 34 G_NORETURN void helper_raise_exception(CPUX86State *env, int exception_index) in helper_raise_exception() argument 36 raise_exception(env, exception_index); in helper_raise_exception() 106 cs->exception_index = intno; in raise_interrupt2() 120 G_NORETURN void raise_exception_err(CPUX86State *env, int exception_index, in raise_exception_err() argument 123 raise_interrupt2(env, exception_index, 0, error_code, 0, 0); in raise_exception_err() 126 G_NORETURN void raise_exception_err_ra(CPUX86State *env, int exception_index, in raise_exception_err_ra() argument 129 raise_interrupt2(env, exception_index, 0, error_code, 0, retaddr); in raise_exception_err_ra() 132 G_NORETURN void raise_exception(CPUX86State *env, int exception_index) in raise_exception() argument 134 raise_interrupt2(env, exception_index, 0, 0, 0, 0); in raise_exception() 137 G_NORETURN void raise_exception_ra(CPUX86State *env, int exception_index, in raise_exception_ra() argument [all …]
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H A D | helper-tcg.h | 64 G_NORETURN void raise_exception(CPUX86State *env, int exception_index); 65 G_NORETURN void raise_exception_ra(CPUX86State *env, int exception_index, 67 G_NORETURN void raise_exception_err(CPUX86State *env, int exception_index, 69 G_NORETURN void raise_exception_err_ra(CPUX86State *env, int exception_index,
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/openbmc/qemu/target/sparc/ |
H A D | int32_helper.c | 60 static const char *excp_name_str(int32_t exception_index) in excp_name_str() argument 62 if (exception_index < 0 || exception_index >= ARRAY_SIZE(excp_names)) { in excp_name_str() 65 return excp_names[exception_index]; in excp_name_str() 103 int cwp, intno = cs->exception_index; in sparc_cpu_do_interrupt() 123 if (cs->exception_index == 0x80 && in sparc_cpu_do_interrupt() 129 cs->exception_index, excp_name_str(cs->exception_index)); in sparc_cpu_do_interrupt() 167 cs->exception_index = -1; in sparc_cpu_do_interrupt()
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H A D | helper.c | 31 cs->exception_index = tt; in cpu_raise_exception_ra() 39 cs->exception_index = tt; in helper_raise_exception() 47 cs->exception_index = EXCP_DEBUG; in helper_debug() 210 cs->exception_index = EXCP_HLT; in helper_power_down()
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H A D | mmu_helper.c | 252 cs->exception_index = TT_TFAULT; in sparc_cpu_tlb_fill() 254 cs->exception_index = TT_DFAULT; in sparc_cpu_tlb_fill() 606 cs->exception_index = TT_DFAULT; in get_physical_address_data() 609 cs->exception_index = TT_DPROT; in get_physical_address_data() 640 cs->exception_index = TT_DMISS; in get_physical_address_data() 698 cs->exception_index = TT_TFAULT; in get_physical_address_code() 716 cs->exception_index = TT_TMISS; in get_physical_address_code()
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/openbmc/linux/arch/arm64/kvm/ |
H A D | handle_exit.c | 322 int handle_exit(struct kvm_vcpu *vcpu, int exception_index) in handle_exit() argument 326 if (ARM_SERROR_PENDING(exception_index)) { in handle_exit() 334 exception_index = ARM_EXCEPTION_CODE(exception_index); in handle_exit() 336 switch (exception_index) { in handle_exit() 359 exception_index); in handle_exit() 366 void handle_exit_early(struct kvm_vcpu *vcpu, int exception_index) in handle_exit_early() argument 368 if (ARM_SERROR_PENDING(exception_index)) { in handle_exit_early() 380 exception_index = ARM_EXCEPTION_CODE(exception_index); in handle_exit_early() 382 if (exception_index == ARM_EXCEPTION_EL1_SERROR) in handle_exit_early()
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/openbmc/qemu/target/xtensa/ |
H A D | exc_helper.c | 41 cs->exception_index = excp; in HELPER() 194 cs->exception_index = EXC_DOUBLE; in handle_interrupt() 197 cs->exception_index = in handle_interrupt() 210 if (cs->exception_index == EXC_IRQ) { in xtensa_cpu_do_interrupt() 224 switch (cs->exception_index) { in xtensa_cpu_do_interrupt() 237 __func__, cs->exception_index, in xtensa_cpu_do_interrupt() 240 if (env->config->exception_vector[cs->exception_index]) { in xtensa_cpu_do_interrupt() 243 vector = env->config->exception_vector[cs->exception_index]; in xtensa_cpu_do_interrupt() 248 __func__, env->pc, cs->exception_index); in xtensa_cpu_do_interrupt() 257 __func__, env->pc, cs->exception_index); in xtensa_cpu_do_interrupt() [all …]
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/openbmc/qemu/target/s390x/tcg/ |
H A D | excp_helper.c | 100 cs->exception_index = -1; in s390_cpu_do_interrupt() 502 __func__, cs->exception_index, env->psw.mask, env->psw.addr); in s390_cpu_do_interrupt() 506 if (cs->exception_index == -1 && s390_cpu_has_mcck_int(cpu)) { in s390_cpu_do_interrupt() 507 cs->exception_index = EXCP_MCHK; in s390_cpu_do_interrupt() 510 if (cs->exception_index == -1 && s390_cpu_has_ext_int(cpu)) { in s390_cpu_do_interrupt() 511 cs->exception_index = EXCP_EXT; in s390_cpu_do_interrupt() 514 if (cs->exception_index == -1 && s390_cpu_has_io_int(cpu)) { in s390_cpu_do_interrupt() 515 cs->exception_index = EXCP_IO; in s390_cpu_do_interrupt() 518 if (cs->exception_index == -1 && s390_cpu_has_restart_int(cpu)) { in s390_cpu_do_interrupt() 519 cs->exception_index = EXCP_RESTART; in s390_cpu_do_interrupt() [all …]
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/openbmc/qemu/target/avr/ |
H A D | helper.c | 47 cs->exception_index = EXCP_RESET; in avr_cpu_exec_interrupt() 57 cs->exception_index = EXCP_INT(index); in avr_cpu_exec_interrupt() 79 if (cs->exception_index == EXCP_RESET) { in avr_cpu_do_interrupt() 99 cs->exception_index = -1; in avr_cpu_do_interrupt() 164 cs->exception_index = EXCP_HLT; in helper_sleep() 176 cs->exception_index = EXCP_DEBUG; in helper_unsupported() 188 cs->exception_index = EXCP_DEBUG; in helper_debug() 196 cs->exception_index = EXCP_DEBUG; in helper_break()
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/openbmc/qemu/target/ppc/ |
H A D | mmu-hash32.c | 127 cs->exception_index = POWERPC_EXCP_ISI; in ppc_hash32_direct_store() 143 cs->exception_index = POWERPC_EXCP_ALIGN; in ppc_hash32_direct_store() 168 cs->exception_index = POWERPC_EXCP_DSI; in ppc_hash32_direct_store() 192 cs->exception_index = POWERPC_EXCP_DSI; in ppc_hash32_direct_store() 324 cs->exception_index = POWERPC_EXCP_ISI; in ppc_hash32_xlate() 327 cs->exception_index = POWERPC_EXCP_DSI; in ppc_hash32_xlate() 356 cs->exception_index = POWERPC_EXCP_ISI; in ppc_hash32_xlate() 367 cs->exception_index = POWERPC_EXCP_ISI; in ppc_hash32_xlate() 370 cs->exception_index = POWERPC_EXCP_DSI; in ppc_hash32_xlate() 394 cs->exception_index = POWERPC_EXCP_ISI; in ppc_hash32_xlate() [all …]
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H A D | mmu_common.c | 628 cs->exception_index = POWERPC_EXCP_ITLB; in ppc_40x_xlate() 635 cs->exception_index = POWERPC_EXCP_ISI; in ppc_40x_xlate() 645 cs->exception_index = POWERPC_EXCP_DTLB; in ppc_40x_xlate() 656 cs->exception_index = POWERPC_EXCP_DSI; in ppc_40x_xlate() 709 cs->exception_index = POWERPC_EXCP_IFTLB; in ppc_6xx_xlate() 716 cs->exception_index = POWERPC_EXCP_ISI; in ppc_6xx_xlate() 721 cs->exception_index = POWERPC_EXCP_ISI; in ppc_6xx_xlate() 727 cs->exception_index = POWERPC_EXCP_ISI; in ppc_6xx_xlate() 736 cs->exception_index = POWERPC_EXCP_DSTLB; in ppc_6xx_xlate() 739 cs->exception_index = POWERPC_EXCP_DLTLB; in ppc_6xx_xlate() [all …]
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/openbmc/qemu/target/sh4/ |
H A D | helper.c | 61 int do_exp, irq_vector = cs->exception_index; in superh_cpu_do_interrupt() 65 do_exp = cs->exception_index != -1; in superh_cpu_do_interrupt() 66 do_irq = do_irq && (cs->exception_index == -1); in superh_cpu_do_interrupt() 69 if (do_exp && cs->exception_index != 0x1e0) { in superh_cpu_do_interrupt() 95 switch (cs->exception_index) { in superh_cpu_do_interrupt() 158 env->expevt = cs->exception_index; in superh_cpu_do_interrupt() 159 switch (cs->exception_index) { in superh_cpu_do_interrupt() 629 cs->exception_index = 0x140; in cpu_sh4_write_mmaped_utlb_addr() 825 cs->exception_index = 0x040; in superh_cpu_tlb_fill() 829 cs->exception_index = 0x140; in superh_cpu_tlb_fill() [all …]
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/openbmc/qemu/accel/tcg/ |
H A D | cpu-exec.c | 360 cpu->exception_index = EXCP_DEBUG; in check_for_breakpoints_slow() 504 if (unlikely(cpu->singlestep_enabled) && cpu->exception_index == -1) { in cpu_tb_exec() 505 cpu->exception_index = EXCP_DEBUG; in cpu_tb_exec() 713 if (cpu->exception_index < 0) { in cpu_handle_exception() 725 if (cpu->exception_index >= EXCP_INTERRUPT) { in cpu_handle_exception() 727 *ret = cpu->exception_index; in cpu_handle_exception() 731 cpu->exception_index = -1; in cpu_handle_exception() 744 *ret = cpu->exception_index; in cpu_handle_exception() 745 cpu->exception_index = -1; in cpu_handle_exception() 754 cpu->exception_index = -1; in cpu_handle_exception() [all …]
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H A D | cpu-exec-common.c | 31 cpu->exception_index = -1; in cpu_loop_exit_noexc() 56 cpu->exception_index = EXCP_ATOMIC; in cpu_loop_exit_atomic()
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/openbmc/qemu/target/microblaze/ |
H A D | helper.c | 95 if (cs->exception_index == EXCP_MMU) { in mb_cpu_tlb_fill() 100 cs->exception_index = EXCP_MMU; in mb_cpu_tlb_fill() 118 switch (cs->exception_index) { in mb_cpu_do_interrupt() 201 cpu_abort(cs, "unhandled exception type=%d\n", cs->exception_index); in mb_cpu_do_interrupt() 262 cs->exception_index = EXCP_IRQ; in mb_cpu_exec_interrupt() 295 cs->exception_index = EXCP_HW_EXCP; in mb_cpu_do_unaligned_access()
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/openbmc/qemu/target/openrisc/ |
H A D | interrupt.c | 33 int exception = cs->exception_index; in openrisc_cpu_do_interrupt() 102 cs->exception_index = -1; in openrisc_cpu_do_interrupt() 117 cs->exception_index = idx; in openrisc_cpu_exec_interrupt()
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/openbmc/qemu/target/loongarch/tcg/ |
H A D | tlb_helper.c | 57 cs->exception_index = access_type == MMU_INST_FETCH in raise_mmu_exception() 63 cs->exception_index = EXCCODE_PIL; in raise_mmu_exception() 65 cs->exception_index = EXCCODE_PIS; in raise_mmu_exception() 67 cs->exception_index = EXCCODE_PIF; in raise_mmu_exception() 74 cs->exception_index = EXCCODE_PIL; in raise_mmu_exception() 76 cs->exception_index = EXCCODE_PIS; in raise_mmu_exception() 78 cs->exception_index = EXCCODE_PIF; in raise_mmu_exception() 83 cs->exception_index = EXCCODE_PME; in raise_mmu_exception() 87 cs->exception_index = EXCCODE_PNX; in raise_mmu_exception() 91 cs->exception_index = EXCCODE_PNR; in raise_mmu_exception() [all …]
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/openbmc/qemu/target/hppa/ |
H A D | int_helper.c | 96 int i = cs->exception_index; in hppa_cpu_do_interrupt() 261 cs->exception_index = -1; in hppa_cpu_do_interrupt() 272 cs->exception_index = EXCP_TOC; in hppa_cpu_exec_interrupt() 281 cs->exception_index = EXCP_EXT_INTERRUPT; in hppa_cpu_exec_interrupt()
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/openbmc/qemu/target/riscv/ |
H A D | cpu_helper.c | 575 cs->exception_index = RISCV_EXCP_INT_FLAG | interruptno; in riscv_cpu_exec_interrupt() 1298 cs->exception_index = RISCV_EXCP_INST_ACCESS_FAULT; in raise_mmu_exception() 1300 cs->exception_index = RISCV_EXCP_INST_GUEST_PAGE_FAULT; in raise_mmu_exception() 1302 cs->exception_index = RISCV_EXCP_INST_PAGE_FAULT; in raise_mmu_exception() 1307 cs->exception_index = RISCV_EXCP_LOAD_ACCESS_FAULT; in raise_mmu_exception() 1309 cs->exception_index = RISCV_EXCP_LOAD_GUEST_ACCESS_FAULT; in raise_mmu_exception() 1311 cs->exception_index = RISCV_EXCP_LOAD_PAGE_FAULT; in raise_mmu_exception() 1316 cs->exception_index = RISCV_EXCP_STORE_AMO_ACCESS_FAULT; in raise_mmu_exception() 1318 cs->exception_index = RISCV_EXCP_STORE_GUEST_AMO_ACCESS_FAULT; in raise_mmu_exception() 1320 cs->exception_index = RISCV_EXCP_STORE_PAGE_FAULT; in raise_mmu_exception() [all …]
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/openbmc/qemu/target/alpha/ |
H A D | helper.c | 311 cs->exception_index = EXCP_MMFAULT; in alpha_cpu_tlb_fill() 328 int i = cs->exception_index; in alpha_cpu_do_interrupt() 375 cs->exception_index = -1; in alpha_cpu_do_interrupt() 469 cs->exception_index = idx; in alpha_cpu_exec_interrupt() 517 cs->exception_index = excp; in helper_excp() 528 cs->exception_index = excp; in dynamic_excp()
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H A D | mem_helper.c | 55 cs->exception_index = EXCP_UNALIGN; in alpha_cpu_do_unaligned_access() 70 cs->exception_index = EXCP_MCHK; in alpha_cpu_do_transaction_failed()
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/openbmc/qemu/target/m68k/ |
H A D | op_helper.c | 200 switch (cs->exception_index) { in cf_interrupt_all() 211 vector = cs->exception_index << 2; in cf_interrupt_all() 217 ++count, m68k_exception_name(cs->exception_index), in cf_interrupt_all() 266 cpu_stw_mmuidx_ra(env, *sp, (format << 12) + (cs->exception_index << 2), in do_stack_frame() 283 switch (cs->exception_index) { in m68k_interrupt_all() 291 vector = cs->exception_index << 2; in m68k_interrupt_all() 297 ++count, m68k_exception_name(cs->exception_index), in m68k_interrupt_all() 322 switch (cs->exception_index) { in m68k_interrupt_all() 493 cs->exception_index = EXCP_ACCESS; in m68k_cpu_transaction_failed() 510 cs->exception_index = env->pending_vector; in m68k_cpu_exec_interrupt() [all …]
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/openbmc/qemu/target/loongarch/ |
H A D | cpu.c | 99 cs->exception_index = exception; in do_raise_exception() 172 if (cs->exception_index != EXCCODE_INT) { in loongarch_cpu_do_interrupt() 177 cs->exception_index, in loongarch_cpu_do_interrupt() 178 loongarch_exception_name(cs->exception_index)); in loongarch_cpu_do_interrupt() 181 switch (cs->exception_index) { in loongarch_cpu_do_interrupt() 199 cause = cs->exception_index; in loongarch_cpu_do_interrupt() 220 cause = cs->exception_index; in loongarch_cpu_do_interrupt() 224 cs->exception_index); in loongarch_cpu_do_interrupt() 263 if (cs->exception_index == EXCCODE_INT) { in loongarch_cpu_do_interrupt() 300 cs->exception_index = -1; in loongarch_cpu_do_interrupt() [all …]
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/openbmc/qemu/target/i386/tcg/user/ |
H A D | seg_helper.c | 33 cs->exception_index = EXCP_SYSCALL; in helper_syscall() 87 do_interrupt_user(env, cs->exception_index, in x86_cpu_do_interrupt()
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