Searched refs:ecc_ena (Results 1 – 13 of 13) sorted by relevance
/openbmc/linux/arch/mips/include/asm/octeon/ |
H A D | cvmx-l2t-defs.h | 52 __BITFIELD_FIELD(uint64_t ecc_ena:1, 70 __BITFIELD_FIELD(uint64_t ecc_ena:1, 88 __BITFIELD_FIELD(uint64_t ecc_ena:1, 104 __BITFIELD_FIELD(uint64_t ecc_ena:1, 121 __BITFIELD_FIELD(uint64_t ecc_ena:1, 138 __BITFIELD_FIELD(uint64_t ecc_ena:1,
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H A D | cvmx-l2d-defs.h | 44 __BITFIELD_FIELD(uint64_t ecc_ena:1,
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H A D | cvmx-ciu3-defs.h | 197 uint64_t ecc_ena : 1; member 199 uint64_t ecc_ena : 1;
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H A D | cvmx-lmcx-defs.h | 497 uint64_t ecc_ena:1; member 501 uint64_t ecc_ena:1; 546 uint64_t ecc_ena:1; member 550 uint64_t ecc_ena:1; 589 uint64_t ecc_ena:1; member 593 uint64_t ecc_ena:1; 633 uint64_t ecc_ena:1; member 637 uint64_t ecc_ena:1; 1800 uint64_t ecc_ena:1; member 1804 uint64_t ecc_ena:1;
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/openbmc/u-boot/drivers/ddr/marvell/axp/ |
H A D | ddr3_hw_training.c | 107 dram_info.ecc_ena = 1; in ddr3_hw_training() 111 dram_info.ecc_ena = 0; in ddr3_hw_training() 120 dram_info.num_of_total_pups = ddr_width / PUP_SIZE + dram_info.ecc_ena; in ddr3_hw_training() 451 if (dram_info.ecc_ena) { in ddr3_hw_training() 721 dram_info->ecc_ena) in ddr3_save_training() 952 if (dram_info->ecc_ena) { in ddr3_training_suspend_resume()
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H A D | ddr3_write_leveling.c | 112 && dram_info->ecc_ena) in ddr3_write_leveling_hw() 141 && dram_info->ecc_ena) in ddr3_write_leveling_hw() 237 for (ecc = 0; ecc < (dram_info->ecc_ena + 1); in ddr3_wl_supplement() 255 (dram_info->ecc_ena * in ddr3_wl_supplement() 411 if (dram_info->ecc_ena) in ddr3_wl_supplement() 434 && dram_info->ecc_ena) in ddr3_wl_supplement() 535 && dram_info->ecc_ena) in ddr3_write_leveling_hw_reg_dimm()
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H A D | ddr3_read_leveling.c | 103 && dram_info->ecc_ena) in ddr3_read_leveling_hw() 134 && dram_info->ecc_ena) in ddr3_read_leveling_hw() 205 for (ecc = 0; ecc <= (dram_info->ecc_ena); ecc++) { in ddr3_read_leveling_sw() 209 reg |= (dram_info->ecc_ena * in ddr3_read_leveling_sw() 266 pup < (dram_info->num_of_std_pups + dram_info->ecc_ena); in ddr3_read_leveling_sw() 284 pup < (dram_info->num_of_std_pups + dram_info->ecc_ena); in ddr3_read_leveling_sw()
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H A D | ddr3_pbs.c | 135 for (ecc = 0; ecc < (dram_info->ecc_ena + 1); ecc++) { in ddr3_pbs_tx() 161 reg |= (dram_info->ecc_ena * ecc << in ddr3_pbs_tx() 371 if (pup == (max_pup - 1) && dram_info->ecc_ena) in ddr3_pbs_tx() 578 for (ecc = 0; ecc < (dram_info->ecc_ena + 1); ecc++) { in ddr3_pbs_rx() 603 reg |= (dram_info->ecc_ena * ecc << in ddr3_pbs_rx() 1429 if (pup == (max_pup - 1) && dram_info->ecc_ena) in ddr3_set_pbs_results()
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H A D | ddr3_dqs.c | 155 for (ecc = 0; ecc < (dram_info->ecc_ena + 1); ecc++) { in ddr3_dqs_centralization_rx() 160 reg |= (dram_info->ecc_ena * in ddr3_dqs_centralization_rx() 236 for (ecc = 0; ecc < (dram_info->ecc_ena + 1); ecc++) { in ddr3_dqs_centralization_tx() 240 reg |= (dram_info->ecc_ena * in ddr3_dqs_centralization_tx()
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H A D | ddr3_init.h | 117 int ddr3_dunit_setup(u32 ecc_ena, u32 hclk_time, u32 *ddr_width);
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H A D | ddr3_hw_training.h | 258 u32 ecc_ena; /* 0/1 */ member
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H A D | ddr3_spd.c | 574 int ddr3_dunit_setup(u32 ecc_ena, u32 hclk_time, u32 *ddr_width) argument 715 if (ecc_ena && ddr3_get_min_val(sum_info.err_check_type, dimm_num,
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/openbmc/linux/drivers/edac/ |
H A D | octeon_edac-lmc.c | 241 if (!cfg0.s.ecc_ena) { in octeon_lmc_edac_probe() 273 if (!config.s.ecc_ena) { in octeon_lmc_edac_probe()
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