| /openbmc/linux/drivers/mtd/nand/ |
| H A D | ecc-mtk.c | 126 static inline void mtk_ecc_wait_idle(struct mtk_ecc *ecc, in mtk_ecc_wait_idle() argument
129 struct device *dev = ecc->dev; in mtk_ecc_wait_idle()
133 ret = readl_poll_timeout_atomic(ecc->regs + ECC_IDLE_REG(op), val, in mtk_ecc_wait_idle()
143 struct mtk_ecc *ecc = id; in mtk_ecc_irq() local
146 dec = readw(ecc->regs + ecc->caps->ecc_regs[ECC_DECIRQ_STA]) in mtk_ecc_irq()
149 dec = readw(ecc->regs + ecc->caps->ecc_regs[ECC_DECDONE]); in mtk_ecc_irq()
150 if (dec & ecc->sectors) { in mtk_ecc_irq()
155 readw(ecc->regs + ecc->caps->ecc_regs[ECC_DECIRQ_STA]); in mtk_ecc_irq()
156 ecc->sectors = 0; in mtk_ecc_irq()
157 complete(&ecc->done); in mtk_ecc_irq()
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| H A D | ecc-sw-bch.c | 26 struct nand_ecc_sw_bch_conf *engine_conf = nand->ecc.ctx.priv; in nand_ecc_sw_bch_calculate()
30 bch_encode(engine_conf->bch, buf, nand->ecc.ctx.conf.step_size, code); in nand_ecc_sw_bch_calculate()
52 struct nand_ecc_sw_bch_conf *engine_conf = nand->ecc.ctx.priv; in nand_ecc_sw_bch_correct()
53 unsigned int step_size = nand->ecc.ctx.conf.step_size; in nand_ecc_sw_bch_correct()
84 struct nand_ecc_sw_bch_conf *engine_conf = nand->ecc.ctx.priv; in nand_ecc_sw_bch_cleanup()
110 struct nand_ecc_sw_bch_conf *engine_conf = nand->ecc.ctx.priv; in nand_ecc_sw_bch_init()
111 unsigned int eccsize = nand->ecc.ctx.conf.step_size; in nand_ecc_sw_bch_init()
172 struct nand_ecc_props *conf = &nand->ecc.ctx.conf; in nand_ecc_sw_bch_init_ctx()
189 conf->step_size = nand->ecc.user_conf.step_size; in nand_ecc_sw_bch_init_ctx()
190 conf->strength = nand->ecc.user_conf.strength; in nand_ecc_sw_bch_init_ctx()
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| H A D | ecc.c | 114 if (!nand->ecc.engine || !nand->ecc.engine->ops->init_ctx) in nand_ecc_init_ctx()
117 return nand->ecc.engine->ops->init_ctx(nand); in nand_ecc_init_ctx()
127 if (nand->ecc.engine && nand->ecc.engine->ops->cleanup_ctx) in nand_ecc_cleanup_ctx()
128 nand->ecc.engine->ops->cleanup_ctx(nand); in nand_ecc_cleanup_ctx()
140 if (!nand->ecc.engine || !nand->ecc.engine->ops->prepare_io_req) in nand_ecc_prepare_io_req()
143 return nand->ecc.engine->ops->prepare_io_req(nand, req); in nand_ecc_prepare_io_req()
155 if (!nand->ecc.engine || !nand->ecc.engine->ops->finish_io_req) in nand_ecc_finish_io_req()
158 return nand->ecc.engine->ops->finish_io_req(nand, req); in nand_ecc_finish_io_req()
167 unsigned int total_ecc_bytes = nand->ecc.ctx.total; in nand_ooblayout_ecc_sp()
213 .ecc = nand_ooblayout_ecc_sp,
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| /openbmc/linux/drivers/mtd/nand/raw/ingenic/ |
| H A D | ingenic_ecc.c | 28 int ingenic_ecc_calculate(struct ingenic_ecc *ecc, in ingenic_ecc_calculate() argument
32 return ecc->ops->calculate(ecc, params, buf, ecc_code); in ingenic_ecc_calculate()
48 int ingenic_ecc_correct(struct ingenic_ecc *ecc, in ingenic_ecc_correct() argument
52 return ecc->ops->correct(ecc, params, buf, ecc_code); in ingenic_ecc_correct()
69 struct ingenic_ecc *ecc; in ingenic_ecc_get() local
80 ecc = platform_get_drvdata(pdev); in ingenic_ecc_get()
81 clk_prepare_enable(ecc->clk); in ingenic_ecc_get()
83 return ecc; in ingenic_ecc_get()
98 struct ingenic_ecc *ecc = NULL; in of_ingenic_ecc_get() local
111 ecc = ingenic_ecc_get(np); in of_ingenic_ecc_get()
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| H A D | ingenic_nand_drv.c | 44 struct ingenic_ecc *ecc; member
75 struct nand_ecc_ctrl *ecc = &chip->ecc; in qi_lb60_ooblayout_ecc() local
77 if (section || !ecc->total) in qi_lb60_ooblayout_ecc()
80 oobregion->length = ecc->total; in qi_lb60_ooblayout_ecc()
90 struct nand_ecc_ctrl *ecc = &chip->ecc; in qi_lb60_ooblayout_free() local
95 oobregion->length = mtd->oobsize - ecc->total - 12; in qi_lb60_ooblayout_free()
96 oobregion->offset = 12 + ecc->total; in qi_lb60_ooblayout_free()
102 .ecc = qi_lb60_ooblayout_ecc,
110 struct nand_ecc_ctrl *ecc = &chip->ecc; in jz4725b_ooblayout_ecc() local
112 if (section || !ecc->total) in jz4725b_ooblayout_ecc()
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| H A D | jz4740_ecc.c | 45 static void jz4740_ecc_reset(struct ingenic_ecc *ecc, bool calc_ecc) in jz4740_ecc_reset() argument
50 writel(0, ecc->base + JZ_REG_NAND_IRQ_STAT); in jz4740_ecc_reset()
53 reg = readl(ecc->base + JZ_REG_NAND_ECC_CTRL); in jz4740_ecc_reset()
62 writel(reg, ecc->base + JZ_REG_NAND_ECC_CTRL); in jz4740_ecc_reset()
65 static int jz4740_ecc_calculate(struct ingenic_ecc *ecc, in jz4740_ecc_calculate() argument
73 jz4740_ecc_reset(ecc, true); in jz4740_ecc_calculate()
76 status = readl(ecc->base + JZ_REG_NAND_IRQ_STAT); in jz4740_ecc_calculate()
82 reg = readl(ecc->base + JZ_REG_NAND_ECC_CTRL); in jz4740_ecc_calculate()
84 writel(reg, ecc->base + JZ_REG_NAND_ECC_CTRL); in jz4740_ecc_calculate()
87 ecc_code[i] = readb(ecc->base + JZ_REG_NAND_PAR0 + i); in jz4740_ecc_calculate()
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| H A D | ingenic_ecc.h | 29 int ingenic_ecc_calculate(struct ingenic_ecc *ecc,
32 int ingenic_ecc_correct(struct ingenic_ecc *ecc,
36 void ingenic_ecc_release(struct ingenic_ecc *ecc);
39 static inline int ingenic_ecc_calculate(struct ingenic_ecc *ecc, in ingenic_ecc_calculate() argument
46 static inline int ingenic_ecc_correct(struct ingenic_ecc *ecc, in ingenic_ecc_correct() argument
53 static inline void ingenic_ecc_release(struct ingenic_ecc *ecc) in ingenic_ecc_release() argument
64 void (*disable)(struct ingenic_ecc *ecc);
65 int (*calculate)(struct ingenic_ecc *ecc,
68 int (*correct)(struct ingenic_ecc *ecc,
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| /openbmc/linux/drivers/dma/ti/ |
| H A D | edma.c | 218 struct edma_cc *ecc; member
299 static inline unsigned int edma_read(struct edma_cc *ecc, int offset) in edma_read() argument
301 return (unsigned int)__raw_readl(ecc->base + offset); in edma_read()
304 static inline void edma_write(struct edma_cc *ecc, int offset, int val) in edma_write() argument
306 __raw_writel(val, ecc->base + offset); in edma_write()
309 static inline void edma_modify(struct edma_cc *ecc, int offset, unsigned and, in edma_modify() argument
312 unsigned val = edma_read(ecc, offset); in edma_modify()
316 edma_write(ecc, offset, val); in edma_modify()
319 static inline void edma_or(struct edma_cc *ecc, int offset, unsigned or) in edma_or() argument
321 unsigned val = edma_read(ecc, offset); in edma_or()
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| /openbmc/linux/Documentation/devicetree/bindings/edac/ |
| H A D | socfpga-eccmgr.txt | 8 - compatible : Should be "altr,socfpga-ecc-manager"
17 - compatible : Should be "altr,socfpga-l2-ecc"
24 - compatible : Should be "altr,socfpga-ocram-ecc"
33 compatible = "altr,socfpga-ecc-manager";
38 l2-ecc@ffd08140 {
39 compatible = "altr,socfpga-l2-ecc";
44 ocram-ecc@ffd08144 {
45 compatible = "altr,socfpga-ocram-ecc";
58 - compatible : Should be "altr,socfpga-a10-ecc-manager"
73 - compatible : Should be "altr,socfpga-a10-l2-ecc"
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| /openbmc/u-boot/drivers/mtd/nand/raw/ |
| H A D | fsmc_nand.c | 261 const u_char *data, u_char *ecc) in fsmc_read_hwecc() argument
280 ecc[0] = (u_char) (ecc_tmp >> 0); in fsmc_read_hwecc()
281 ecc[1] = (u_char) (ecc_tmp >> 8); in fsmc_read_hwecc()
282 ecc[2] = (u_char) (ecc_tmp >> 16); in fsmc_read_hwecc()
283 ecc[3] = (u_char) (ecc_tmp >> 24); in fsmc_read_hwecc()
286 ecc[4] = (u_char) (ecc_tmp >> 0); in fsmc_read_hwecc()
287 ecc[5] = (u_char) (ecc_tmp >> 8); in fsmc_read_hwecc()
288 ecc[6] = (u_char) (ecc_tmp >> 16); in fsmc_read_hwecc()
289 ecc[7] = (u_char) (ecc_tmp >> 24); in fsmc_read_hwecc()
292 ecc[8] = (u_char) (ecc_tmp >> 0); in fsmc_read_hwecc()
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| H A D | sunxi_nand.c | 684 static u16 sunxi_nfc_randomizer_state(struct mtd_info *mtd, int page, bool ecc) in sunxi_nfc_randomizer_state() argument
692 if (ecc) { in sunxi_nfc_randomizer_state()
703 int page, bool ecc) in sunxi_nfc_randomizer_config() argument
714 state = sunxi_nfc_randomizer_state(mtd, page, ecc); in sunxi_nfc_randomizer_config()
753 bool ecc, int page) in sunxi_nfc_randomizer_write_buf() argument
755 sunxi_nfc_randomizer_config(mtd, page, ecc); in sunxi_nfc_randomizer_write_buf()
762 int len, bool ecc, int page) in sunxi_nfc_randomizer_read_buf() argument
764 sunxi_nfc_randomizer_config(mtd, page, ecc); in sunxi_nfc_randomizer_read_buf()
774 struct sunxi_nand_hw_ecc *data = nand->ecc.priv; in sunxi_nfc_hw_ecc_enable()
782 if (nand->ecc.size == 512) in sunxi_nfc_hw_ecc_enable()
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| H A D | nand_base.c | 1173 void *ecc, int ecclen, in nand_check_erased_ecc_chunk() argument
1186 ecc_bitflips = nand_check_erased_buf(ecc, ecclen, bitflips_threshold); in nand_check_erased_ecc_chunk()
1201 memset(ecc, 0xff, ecclen); in nand_check_erased_ecc_chunk()
1243 int eccsize = chip->ecc.size; in nand_read_page_raw_syndrome()
1244 int eccbytes = chip->ecc.bytes; in nand_read_page_raw_syndrome()
1248 for (steps = chip->ecc.steps; steps > 0; steps--) { in nand_read_page_raw_syndrome()
1252 if (chip->ecc.prepad) { in nand_read_page_raw_syndrome()
1253 chip->read_buf(mtd, oob, chip->ecc.prepad); in nand_read_page_raw_syndrome()
1254 oob += chip->ecc.prepad; in nand_read_page_raw_syndrome()
1260 if (chip->ecc.postpad) { in nand_read_page_raw_syndrome()
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| H A D | mxc_nand.c | 390 int eccpitch = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
398 for (i = 0; i < chip->ecc.steps; i++) {
399 toread = min_t(int, length, chip->ecc.prepad);
405 bufpoi += chip->ecc.bytes;
406 host->col_addr += chip->ecc.bytes;
407 length -= chip->ecc.bytes;
409 toread = min_t(int, length, chip->ecc.postpad);
421 mtd->writesize + chip->ecc.prepad, page);
422 bufpoi = buf + chip->ecc.prepad;
423 length = mtd->oobsize - chip->ecc.prepad;
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| H A D | omap_gpmc.c | 327 for (i = 0; i < chip->ecc.bytes; i++) in omap_calculate_ecc()
333 ecc_code[chip->ecc.bytes - 1] = 0x00; in omap_calculate_ecc()
496 struct nand_ecc_ctrl *ecc = &chip->ecc; in omap_correct_data_bch() local
506 for (i = 0; i < ecc->bytes && !ecc_flag; i++) { in omap_correct_data_bch()
515 for (i = 0; i < ecc->bytes && !ecc_flag; i++) { in omap_correct_data_bch()
529 omap_reverse_list(calc_ecc, ecc->bytes - 1); in omap_correct_data_bch()
533 omap_reverse_list(calc_ecc, ecc->bytes); in omap_correct_data_bch()
549 error_max = SECTOR_BYTES + (ecc->bytes - 1); in omap_correct_data_bch()
552 error_max = SECTOR_BYTES + ecc->bytes; in omap_correct_data_bch()
586 int i, eccsize = chip->ecc.size; in omap_read_page_bch()
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| H A D | davinci_nand.c | 167 u_int32_t ecc = 0; in nand_davinci_readecc() local
169 ecc = __raw_readl(&(davinci_emif_regs->nandfecc[ in nand_davinci_readecc()
172 return ecc; in nand_davinci_readecc()
235 if ((diff >> (12 + 3)) < this->ecc.size) { in nand_davinci_correct_data()
373 saved_ecc_layout = chip->ecc.layout; in nand_davinci_write_page()
374 chip->ecc.layout = &nand_keystone_rbl_4bit_layout_oobfirst; in nand_davinci_write_page()
375 mtd->oobavail = chip->ecc.layout->oobavail; in nand_davinci_write_page()
381 status = chip->ecc.write_page_raw(mtd, chip, buf, in nand_davinci_write_page()
384 status = chip->ecc.write_page(mtd, chip, buf, in nand_davinci_write_page()
404 chip->ecc.layout = saved_ecc_layout; in nand_davinci_write_page()
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| H A D | zynq_nand.c | 565 int i, eccsteps, eccsize = chip->ecc.size; in zynq_nand_write_page_hwecc()
568 u32 *eccpos = chip->ecc.layout->eccpos; in zynq_nand_write_page_hwecc()
573 for (eccsteps = chip->ecc.steps; (eccsteps - 1); eccsteps--) { in zynq_nand_write_page_hwecc()
588 chip->ecc.calculate(mtd, p, &ecc_calc[0]); in zynq_nand_write_page_hwecc()
590 for (i = 0; i < chip->ecc.total; i++) in zynq_nand_write_page_hwecc()
623 int i, eccsize = chip->ecc.size; in zynq_nand_write_page_swecc()
624 int eccbytes = chip->ecc.bytes; in zynq_nand_write_page_swecc()
625 int eccsteps = chip->ecc.steps; in zynq_nand_write_page_swecc()
628 u32 *eccpos = chip->ecc.layout->eccpos; in zynq_nand_write_page_swecc()
632 chip->ecc.calculate(mtd, p, &ecc_calc[i]); in zynq_nand_write_page_swecc()
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| /openbmc/linux/drivers/mtd/nand/raw/ |
| H A D | nand_micron.c | 66 struct micron_on_die_ecc ecc; member
127 .ecc = micron_nand_on_die_4_ooblayout_ecc,
140 oobregion->offset = mtd->oobsize - chip->ecc.total; in micron_nand_on_die_8_ooblayout_ecc()
141 oobregion->length = chip->ecc.total; in micron_nand_on_die_8_ooblayout_ecc()
156 oobregion->length = mtd->oobsize - chip->ecc.total - 2; in micron_nand_on_die_8_ooblayout_free()
162 .ecc = micron_nand_on_die_8_ooblayout_ecc,
172 if (micron->ecc.forced) in micron_nand_on_die_ecc_setup()
175 if (micron->ecc.enabled == enable) in micron_nand_on_die_ecc_setup()
183 micron->ecc.enabled = enable; in micron_nand_on_die_ecc_setup()
242 ret = nand_read_page_op(chip, page, 0, micron->ecc.rawbuf, in micron_nand_on_die_ecc_status_4()
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| H A D | nand_base.c | 263 res = chip->ecc.read_oob(chip, first_page + page_offset); in nand_block_bad()
476 status = chip->ecc.write_oob_raw(chip, page & chip->pagemask); in nand_do_write_oob()
478 status = chip->ecc.write_oob(chip, page & chip->pagemask); in nand_do_write_oob()
2861 void *ecc, int ecclen, in nand_check_erased_ecc_chunk() argument
2874 ecc_bitflips = nand_check_erased_buf(ecc, ecclen, bitflips_threshold); in nand_check_erased_ecc_chunk()
2889 memset(ecc, 0xff, ecclen); in nand_check_erased_ecc_chunk()
2997 int eccsize = chip->ecc.size; in nand_read_page_raw_syndrome()
2998 int eccbytes = chip->ecc.bytes; in nand_read_page_raw_syndrome()
3006 for (steps = chip->ecc.steps; steps > 0; steps--) { in nand_read_page_raw_syndrome()
3013 if (chip->ecc.prepad) { in nand_read_page_raw_syndrome()
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| H A D | sunxi_nand.c | 195 struct sunxi_nand_hw_ecc ecc; member
603 bool ecc) in sunxi_nfc_randomizer_state() argument
612 if (ecc) { in sunxi_nfc_randomizer_state()
623 bool ecc) in sunxi_nfc_randomizer_config() argument
633 state = sunxi_nfc_randomizer_state(nand, page, ecc); in sunxi_nfc_randomizer_config()
670 bool ecc, int page) in sunxi_nfc_randomizer_write_buf() argument
672 sunxi_nfc_randomizer_config(nand, page, ecc); in sunxi_nfc_randomizer_write_buf()
679 int len, bool ecc, int page) in sunxi_nfc_randomizer_read_buf() argument
681 sunxi_nfc_randomizer_config(nand, page, ecc); in sunxi_nfc_randomizer_read_buf()
692 writel(sunxi_nand->ecc.ecc_ctl, nfc->regs + NFC_REG_ECC_CTL); in sunxi_nfc_hw_ecc_enable()
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| H A D | rockchip-nand-controller.c | 197 return (u8 *)p + i * chip->ecc.size; in rk_nfc_buf_to_data_ptr()
214 poi = chip->oob_poi + rknand->metadata_size + chip->ecc.bytes * i; in rk_nfc_buf_to_oob_ecc_ptr()
221 return chip->ecc.size + chip->ecc.bytes + NFC_SYS_DATA_SIZE; in rk_nfc_data_len()
235 return nfc->page_buf + i * rk_nfc_data_len(chip) + chip->ecc.size; in rk_nfc_oob_ptr()
265 struct nand_ecc_ctrl *ecc = &chip->ecc; in rk_nfc_select_chip() local
299 if (nfc->cur_ecc != ecc->strength) in rk_nfc_select_chip()
300 rk_nfc_hw_ecc_setup(chip, ecc->strength); in rk_nfc_select_chip()
512 struct nand_ecc_ctrl *ecc = &chip->ecc; in rk_nfc_write_page_raw() local
518 rknand->boot_ecc != ecc->strength) { in rk_nfc_write_page_raw()
529 for (i = 0; i < ecc->steps; i++) { in rk_nfc_write_page_raw()
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| H A D | fsmc_nand.c | 172 if (section >= chip->ecc.steps) in fsmc_ecc1_ooblayout_ecc()
186 if (section >= chip->ecc.steps) in fsmc_ecc1_ooblayout_free()
191 if (section < chip->ecc.steps - 1) in fsmc_ecc1_ooblayout_free()
200 .ecc = fsmc_ecc1_ooblayout_ecc,
215 if (section >= chip->ecc.steps) in fsmc_ecc4_ooblayout_ecc()
218 oobregion->length = chip->ecc.bytes; in fsmc_ecc4_ooblayout_ecc()
233 if (section >= chip->ecc.steps) in fsmc_ecc4_ooblayout_free()
238 if (section < chip->ecc.steps - 1) in fsmc_ecc4_ooblayout_free()
247 .ecc = fsmc_ecc4_ooblayout_ecc,
392 u8 *ecc) in fsmc_read_hwecc_ecc4() argument
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| H A D | omap2.c | 792 if (info->nand.ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST && in omap_correct_data()
793 info->nand.ecc.size == 2048) in omap_correct_data()
861 val = ((((info->nand.ecc.size >> 1) - 1) << ECCSIZE1_SHIFT) | in omap_enable_hwecc()
916 nsectors = chip->ecc.steps; in omap_enable_hwecc_bch()
936 nsectors = chip->ecc.steps; in omap_enable_hwecc_bch()
949 nsectors = chip->ecc.steps; in omap_enable_hwecc_bch()
1005 int eccbytes = info->nand.ecc.bytes; in _omap_calculate_ecc_bch()
1147 int eccbytes = info->nand.ecc.bytes; in omap_calculate_ecc_bch_multi()
1178 for (i = 0; i < info->nand.ecc.size; i++) { in erased_sector_bitflips()
1180 if (flip_bits > info->nand.ecc.strength) in erased_sector_bitflips()
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| /openbmc/u-boot/drivers/ddr/marvell/axp/ |
| H A D | ddr3_pbs.c | 60 u32 cur_pup, u32 pbs_pattern_idx, u32 ecc);
62 u32 pbs_pattern_idx, u32 ecc);
64 u32 *pcur_pup, u32 pbs_pattern_idx, u32 ecc);
98 u32 ecc; in ddr3_pbs_tx() local
135 for (ecc = 0; ecc < (dram_info->ecc_ena + 1); ecc++) { in ddr3_pbs_tx()
141 cur_max_pup = (1 - ecc) * in ddr3_pbs_tx()
142 dram_info->num_of_std_pups + ecc; in ddr3_pbs_tx()
144 if (ecc) { in ddr3_pbs_tx()
161 reg |= (dram_info->ecc_ena * ecc << in ddr3_pbs_tx()
165 if (ecc) in ddr3_pbs_tx()
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| H A D | ddr3_dqs.c | 67 int ddr3_find_adll_limits(MV_DRAM_INFO *dram_info, u32 cs, u32 ecc, int is_tx);
70 static int ddr3_center_calc(MV_DRAM_INFO *dram_info, u32 cs, u32 ecc,
72 int ddr3_special_pattern_i_search(MV_DRAM_INFO *dram_info, u32 cs, u32 ecc,
74 int ddr3_special_pattern_ii_search(MV_DRAM_INFO *dram_info, u32 cs, u32 ecc,
76 int ddr3_set_dqs_centralization_results(MV_DRAM_INFO *dram_info, u32 cs, u32 ecc,
132 u32 cs, ecc, reg; in ddr3_dqs_centralization_rx() local
155 for (ecc = 0; ecc < (dram_info->ecc_ena + 1); ecc++) { in ddr3_dqs_centralization_rx()
161 ecc << REG_DRAM_TRAINING_2_ECC_MUX_OFFS); in ddr3_dqs_centralization_rx()
164 if (ecc) in ddr3_dqs_centralization_rx()
172 ecc, 0); in ddr3_dqs_centralization_rx()
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| /openbmc/linux/drivers/mtd/nand/raw/atmel/ |
| H A D | pmecc.c | 226 if (req->ecc.sectorsize == 512) { in atmel_pmecc_create_gf_tables()
260 if (req->ecc.sectorsize == 512) in atmel_pmecc_get_gf_tables()
282 if (req->pagesize <= 0 || req->oobsize <= 0 || req->ecc.bytes <= 0) in atmel_pmecc_prepare_user_req()
285 if (req->ecc.ooboffset >= 0 && in atmel_pmecc_prepare_user_req()
286 req->ecc.ooboffset + req->ecc.bytes > req->oobsize) in atmel_pmecc_prepare_user_req()
289 if (req->ecc.sectorsize == ATMEL_PMECC_SECTOR_SIZE_AUTO) { in atmel_pmecc_prepare_user_req()
290 if (req->ecc.strength != ATMEL_PMECC_MAXIMIZE_ECC_STRENGTH) in atmel_pmecc_prepare_user_req()
294 req->ecc.sectorsize = 1024; in atmel_pmecc_prepare_user_req()
296 req->ecc.sectorsize = 512; in atmel_pmecc_prepare_user_req()
299 if (req->ecc.sectorsize != 512 && req->ecc.sectorsize != 1024) in atmel_pmecc_prepare_user_req()
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