| /openbmc/qemu/target/xtensa/ |
| H A D | mmu_helper.c | 83 bool dtlb, uint32_t way) in get_page_size() argument
85 uint32_t tlbcfg = env->sregs[dtlb ? DTLBCFG : ITLBCFG]; in get_page_size()
106 bool dtlb, uint32_t way) in xtensa_tlb_get_addr_mask() argument
109 bool varway56 = dtlb ? in xtensa_tlb_get_addr_mask()
110 env->config->dtlb.varway56 : in xtensa_tlb_get_addr_mask()
115 return 0xfff00000 << get_page_size(env, dtlb, way) * 2; in xtensa_tlb_get_addr_mask()
119 return 0xf8000000 << get_page_size(env, dtlb, way); in xtensa_tlb_get_addr_mask()
126 return 0xf0000000 << (1 - get_page_size(env, dtlb, way)); in xtensa_tlb_get_addr_mask()
143 static uint32_t get_vpn_mask(const CPUXtensaState *env, bool dtlb, uint32_t way) in get_vpn_mask() argument
146 bool is32 = (dtlb ? in get_vpn_mask()
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| H A D | overlay_tool.h | 366 .dtlb = DTLB(XCHAL_HAVE_SPANNING_WAY)
389 .dtlb = TLB_TEMPLATE
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| H A D | cpu.h | 482 xtensa_tlb dtlb; member
527 xtensa_tlb_entry dtlb[10][MAX_TLB_WAY_SIZE]; member
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| H A D | translate.c | 1602 TCGv_i32 dtlb = tcg_constant_i32(par[0]); in translate_itlb() local
1604 gen_helper_itlb(tcg_env, arg[0].in, dtlb); in translate_itlb()
1930 TCGv_i32 dtlb = tcg_constant_i32(par[0]); in translate_ptlb() local
1933 gen_helper_ptlb(arg[0].out, tcg_env, arg[1].in, dtlb); in translate_ptlb()
2126 TCGv_i32 dtlb = tcg_constant_i32(par[0]); in translate_rtlb() local
2128 helper[par[1]](arg[0].out, tcg_env, arg[1].in, dtlb); in translate_rtlb()
2414 TCGv_i32 dtlb = tcg_constant_i32(par[0]); in translate_wtlb() local
2416 gen_helper_wtlb(tcg_env, arg[0].in, arg[1].in, dtlb); in translate_wtlb()
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| /openbmc/qemu/target/sparc/ |
| H A D | mmu_helper.c | 577 if (ultrasparc_tag_match(&env->dtlb[i], address, context, in get_physical_address_data()
581 if (TTE_IS_IE(env->dtlb[i].tte)) { in get_physical_address_data()
587 if (TTE_IS_PRIV(env->dtlb[i].tte) && is_user) { in get_physical_address_data()
593 if (TTE_IS_SIDEEFFECT(env->dtlb[i].tte)) { in get_physical_address_data()
598 if (TTE_IS_NFO(env->dtlb[i].tte)) { in get_physical_address_data()
607 } else if (!TTE_IS_W_OK(env->dtlb[i].tte) && (rw == 1)) { in get_physical_address_data()
616 if (TTE_IS_W_OK(env->dtlb[i].tte)) { in get_physical_address_data()
620 TTE_SET_USED(env->dtlb[i].tte); in get_physical_address_data()
797 switch (TTE_PGSIZE(env->dtlb[i].tte)) { in dump_mmu()
812 if (TTE_IS_VALID(env->dtlb[i].tte)) { in dump_mmu()
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| H A D | ldst_helper.c | 1518 ret = env->dtlb[reg].tte; in helper_ld_asi()
1525 ret = env->dtlb[reg].tag; in helper_ld_asi()
1859 replace_tlb_1bit_lru(env->dtlb, env->dmmu.tag_access, in helper_st_asi()
1869 replace_tlb_entry(&env->dtlb[i], env->dmmu.tag_access, in helper_st_asi()
1879 demap_tlb(env->dtlb, addr, "dmmu", env); in helper_st_asi()
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| H A D | machine.c | 239 VMSTATE_STRUCT_ARRAY(env.dtlb, SPARCCPU, 64, 0,
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| H A D | cpu.h | 499 SparcTLBEntry dtlb[64]; member
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| /openbmc/linux/arch/xtensa/mm/ |
| H A D | tlb.c | 232 static int check_tlb_entry(unsigned w, unsigned e, bool dtlb) in check_tlb_entry() argument
235 unsigned r0 = dtlb ? in check_tlb_entry()
237 unsigned r1 = dtlb ? in check_tlb_entry()
248 dtlb ? 'D' : 'I', w, e, vpn, in check_tlb_entry()
256 dtlb ? 'D' : 'I', w, e, r0, r1, pte); in check_tlb_entry()
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| /openbmc/qemu/target/openrisc/ |
| H A D | sys_helper.c | 102 mr = env->tlb.dtlb[idx].mr; in HELPER()
109 env->tlb.dtlb[idx].mr = rb; in HELPER()
113 env->tlb.dtlb[idx].tr = rb; in HELPER()
300 return env->tlb.dtlb[idx].mr; in HELPER()
304 return env->tlb.dtlb[idx].tr; in HELPER()
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| H A D | mmu.c | 43 uint32_t dmr = cpu->env.tlb.dtlb[idx].mr; in get_phys_mmu()
44 uint32_t dtr = cpu->env.tlb.dtlb[idx].tr; in get_phys_mmu()
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| H A D | machine.c | 42 VMSTATE_STRUCT_ARRAY(dtlb, CPUOpenRISCTLBContext, TLB_SIZE, 0,
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| H A D | cpu.h | 222 OpenRISCTLBEntry dtlb[TLB_SIZE]; member
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| /openbmc/linux/arch/m68k/mm/ |
| H A D | mcfmmu.c | 87 int cf_tlb_miss(struct pt_regs *regs, int write, int dtlb, int extension_word) in cf_tlb_miss() argument
101 mmuar = (dtlb) ? mmu_read(MMUAR) : in cf_tlb_miss()
148 if (dtlb) in cf_tlb_miss()
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| /openbmc/linux/arch/m68k/include/asm/ |
| H A D | mcfmmu.h | 110 int cf_tlb_miss(struct pt_regs *regs, int write, int dtlb, int extension_word);
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| /openbmc/linux/arch/sh/include/asm/ |
| H A D | processor.h | 83 struct tlb_info dtlb; member
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| /openbmc/qemu/pc-bios/ |
| H A D | petalogix-s3adsp1800.dts | 81 xlnx,mmu-dtlb-size = <0x04>;
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| H A D | petalogix-ml605.dts | 99 xlnx,mmu-dtlb-size = < 0x04 >;
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| /openbmc/linux/arch/microblaze/boot/dts/ |
| H A D | system.dts | 89 xlnx,mmu-dtlb-size = <0x4>;
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