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Searched refs:dsc (Results 1 – 25 of 129) sorted by relevance

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/openbmc/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_hw_dsc_1_2.c86 struct drm_dsc_config *dsc, in dpu_hw_dsc_config_1_2() argument
97 if (!hw_dsc || !dsc) in dpu_hw_dsc_config_1_2()
110 num_active_slice_per_enc = dsc->slice_count; in dpu_hw_dsc_config_1_2()
112 num_active_slice_per_enc = dsc->slice_count / 2; in dpu_hw_dsc_config_1_2()
127 data = (dsc->dsc_version_minor & 0xf) << 28; in dpu_hw_dsc_config_1_2()
128 if (dsc->dsc_version_minor == 0x2) { in dpu_hw_dsc_config_1_2()
129 if (dsc->native_422) in dpu_hw_dsc_config_1_2()
131 if (dsc->native_420) in dpu_hw_dsc_config_1_2()
135 bpp = dsc->bits_per_pixel; in dpu_hw_dsc_config_1_2()
139 if (dsc->native_422 || dsc->native_420) in dpu_hw_dsc_config_1_2()
[all …]
H A Ddpu_hw_dsc.c36 static void dpu_hw_dsc_disable(struct dpu_hw_dsc *dsc) in dpu_hw_dsc_disable() argument
38 struct dpu_hw_blk_reg_map *c = &dsc->hw; in dpu_hw_dsc_disable()
44 struct drm_dsc_config *dsc, in dpu_hw_dsc_config() argument
59 slice_last_group_size = (dsc->slice_width + 2) % 3; in dpu_hw_dsc_config()
64 data |= (dsc->bits_per_pixel << 8); in dpu_hw_dsc_config()
65 data |= (dsc->block_pred_enable << 7); in dpu_hw_dsc_config()
66 data |= (dsc->line_buf_depth << 3); in dpu_hw_dsc_config()
67 data |= (dsc->simple_422 << 2); in dpu_hw_dsc_config()
68 data |= (dsc->convert_rgb << 1); in dpu_hw_dsc_config()
69 data |= dsc->bits_per_component; in dpu_hw_dsc_config()
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H A Ddpu_hw_dsc.h37 struct drm_dsc_config *dsc,
47 struct drm_dsc_config *dsc);
87 void dpu_hw_dsc_destroy(struct dpu_hw_dsc *dsc);
H A Ddpu_encoder.c215 struct drm_dsc_config *dsc; member
236 return dpu_enc->dsc ? true : false; in dpu_encoder_is_dsc_enabled()
549 if (dpu_enc->dsc) in dpu_encoder_use_dsc_merge()
572 struct drm_dsc_config *dsc) in dpu_encoder_get_topology() argument
604 if (dsc) { in dpu_encoder_get_topology()
630 struct drm_dsc_config *dsc; in dpu_encoder_virt_atomic_check() local
666 dsc = dpu_encoder_get_dsc_config(drm_enc); in dpu_encoder_virt_atomic_check()
668 topology = dpu_encoder_get_topology(dpu_enc, dpu_kms, adj_mode, crtc_state, dsc); in dpu_encoder_virt_atomic_check()
1210 dpu_enc->dsc = dpu_encoder_get_dsc_config(drm_enc); in dpu_encoder_virt_atomic_enable()
1784 dpu_encoder_dsc_initial_line_calc(struct drm_dsc_config *dsc, in dpu_encoder_dsc_initial_line_calc() argument
[all …]
/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_vdsc.c244 struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config; in intel_dsc_compute_params()
245 u16 compressed_bpp = pipe_config->dsc.compressed_bpp; in intel_dsc_compute_params()
251 pipe_config->dsc.slice_count); in intel_dsc_compute_params()
355 int num_vdsc_instances = (crtc_state->dsc.dsc_split) ? 2 : 1; in intel_dsc_get_num_vdsc_instances()
367 const struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config; in intel_dsc_pps_configure()
404 if (crtc_state->dsc.dsc_split) in intel_dsc_pps_configure()
411 if (crtc_state->dsc.dsc_split) in intel_dsc_pps_configure()
428 if (crtc_state->dsc.dsc_split) in intel_dsc_pps_configure()
435 if (crtc_state->dsc.dsc_split) in intel_dsc_pps_configure()
453 if (crtc_state->dsc.dsc_split) in intel_dsc_pps_configure()
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H A Dintel_dp_mst.c51 bool dsc) in intel_dp_mst_check_constraints() argument
53 if (intel_dp_is_uhbr(crtc_state) && DISPLAY_VER(i915) <= 13 && dsc) { in intel_dp_mst_check_constraints()
76 bool dsc) in intel_dp_mst_find_vcpi_slots_for_bpp() argument
107 ret = intel_dp_mst_check_constraints(i915, bpp, adjusted_mode, crtc_state, dsc); in intel_dp_mst_find_vcpi_slots_for_bpp()
139 if (!dsc) in intel_dp_mst_find_vcpi_slots_for_bpp()
142 crtc_state->dsc.compressed_bpp = bpp; in intel_dp_mst_find_vcpi_slots_for_bpp()
143 drm_dbg_kms(&i915->drm, "Got %d slots for pipe bpp %d dsc %d\n", slots, bpp, dsc); in intel_dp_mst_find_vcpi_slots_for_bpp()
237 last_compressed_bpp = crtc_state->dsc.compressed_bpp; in intel_dp_dsc_mst_compute_link_config()
239 crtc_state->dsc.compressed_bpp = intel_dp_dsc_nearest_valid_bpp(i915, in intel_dp_dsc_mst_compute_link_config()
243 if (crtc_state->dsc.compressed_bpp != last_compressed_bpp) in intel_dp_dsc_mst_compute_link_config()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_dsc.c33 static void dsc_write_to_registers(struct display_stream_compressor *dsc, const struct dsc_reg_valu…
36 static void dsc2_read_state(struct display_stream_compressor *dsc, struct dcn_dsc_state *s);
37 static bool dsc2_validate_stream(struct display_stream_compressor *dsc, const struct dsc_config *ds…
38 static void dsc2_set_config(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg,
40 static void dsc2_enable(struct display_stream_compressor *dsc, int opp_pipe);
41 static void dsc2_disable(struct display_stream_compressor *dsc);
42 static void dsc2_disconnect(struct display_stream_compressor *dsc);
66 dsc->ctx->logger
77 void dsc2_construct(struct dcn20_dsc *dsc, in dsc2_construct() argument
84 dsc->base.ctx = ctx; in dsc2_construct()
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/openbmc/linux/drivers/gpu/drm/panel/
H A Dpanel-visionox-r66451.c196 if (!dsi->dsc) { in visionox_r66451_enable()
201 drm_dsc_pps_payload_pack(&pps, dsi->dsc); in visionox_r66451_enable()
298 struct drm_dsc_config *dsc; in visionox_r66451_probe() local
305 dsc = devm_kzalloc(dev, sizeof(*dsc), GFP_KERNEL); in visionox_r66451_probe()
306 if (!dsc) in visionox_r66451_probe()
310 dsc->dsc_version_major = 0x1; in visionox_r66451_probe()
311 dsc->dsc_version_minor = 0x2; in visionox_r66451_probe()
313 dsc->slice_height = 20; in visionox_r66451_probe()
314 dsc->slice_width = 540; in visionox_r66451_probe()
315 dsc->slice_count = 2; in visionox_r66451_probe()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/hw/
H A Ddsc.h99 void (*dsc_read_state)(struct display_stream_compressor *dsc, struct dcn_dsc_state *s);
100 …bool (*dsc_validate_stream)(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cf…
101 void (*dsc_set_config)(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg,
103 bool (*dsc_get_packed_pps)(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg,
105 void (*dsc_enable)(struct display_stream_compressor *dsc, int opp_pipe);
106 void (*dsc_disable)(struct display_stream_compressor *dsc);
107 void (*dsc_disconnect)(struct display_stream_compressor *dsc);
/openbmc/linux/drivers/gpu/drm/msm/
H A Dmsm_dsc_helper.h21 static inline u32 msm_dsc_get_slices_per_intf(const struct drm_dsc_config *dsc, u32 intf_width) in msm_dsc_get_slices_per_intf() argument
23 return DIV_ROUND_UP(intf_width, dsc->slice_width); in msm_dsc_get_slices_per_intf()
33 static inline u32 msm_dsc_get_bytes_per_line(const struct drm_dsc_config *dsc) in msm_dsc_get_bytes_per_line() argument
35 return dsc->slice_count * dsc->slice_chunk_size; in msm_dsc_get_bytes_per_line()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/
H A Ddcn314_hwseq.c97 struct display_stream_compressor *dsc = pipe_ctx->stream_res.dsc; in update_dsc_on_stream() local
102 ASSERT(dsc); in update_dsc_on_stream()
121 dsc->funcs->dsc_set_config(dsc, &dsc_cfg, &dsc_optc_cfg); in update_dsc_on_stream()
122 dsc->funcs->dsc_enable(dsc, pipe_ctx->stream_res.opp->inst); in update_dsc_on_stream()
124 struct display_stream_compressor *odm_dsc = odm_pipe->stream_res.dsc; in update_dsc_on_stream()
148 dsc->funcs->dsc_disable(pipe_ctx->stream_res.dsc); in update_dsc_on_stream()
150 ASSERT(odm_pipe->stream_res.dsc); in update_dsc_on_stream()
151 odm_pipe->stream_res.dsc->funcs->dsc_disable(odm_pipe->stream_res.dsc); in update_dsc_on_stream()
222 if (pipe_ctx->stream_res.dsc) { in dcn314_update_odm()
229 current_pipe_ctx->next_odm_pipe->stream_res.dsc) { in dcn314_update_odm()
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/openbmc/openbmc/meta-arm/meta-arm/recipes-bsp/uefi/sbsa-acs/
H A D0001-Patch-in-the-paths-to-the-SBSA-test-suite.patch9 ShellPkg/ShellPkg.dsc | 3 +++
12 diff --git a/ShellPkg/ShellPkg.dsc b/ShellPkg/ShellPkg.dsc
14 --- a/ShellPkg/ShellPkg.dsc
15 +++ b/ShellPkg/ShellPkg.dsc
17 !include MdePkg/MdeLibs.dsc.inc
/openbmc/u-boot/fs/yaffs2/
H A Dyaffsfs.c2791 static void yaffsfs_SetDirRewound(struct yaffsfs_DirSearchContxt *dsc) in yaffsfs_SetDirRewound() argument
2793 if (dsc && in yaffsfs_SetDirRewound()
2794 dsc->dirObj && in yaffsfs_SetDirRewound()
2795 dsc->dirObj->variant_type == YAFFS_OBJECT_TYPE_DIRECTORY) { in yaffsfs_SetDirRewound()
2797 dsc->offset = 0; in yaffsfs_SetDirRewound()
2799 if (list_empty(&dsc->dirObj->variant.dir_variant.children)) in yaffsfs_SetDirRewound()
2800 dsc->nextReturn = NULL; in yaffsfs_SetDirRewound()
2802 dsc->nextReturn = in yaffsfs_SetDirRewound()
2803 list_entry(dsc->dirObj->variant.dir_variant. in yaffsfs_SetDirRewound()
2811 static void yaffsfs_DirAdvance(struct yaffsfs_DirSearchContxt *dsc) in yaffsfs_DirAdvance() argument
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/openbmc/linux/drivers/gpu/drm/msm/dsi/
H A Ddsi_host.c38 static int dsi_populate_dsc_params(struct msm_dsi_host *msm_host, struct drm_dsc_config *dsc);
163 struct drm_dsc_config *dsc; member
533 const struct drm_dsc_config *dsc) in dsi_adjust_pclk_for_compression() argument
535 int new_hdisplay = DIV_ROUND_UP(mode->hdisplay * drm_dsc_get_bpp_int(dsc), in dsi_adjust_pclk_for_compression()
536 dsc->bits_per_component * 3); in dsi_adjust_pclk_for_compression()
544 const struct drm_dsc_config *dsc, bool is_bonded_dsi) in dsi_get_pclk_rate() argument
550 if (dsc) in dsi_get_pclk_rate()
551 pclk_rate = dsi_adjust_pclk_for_compression(mode, dsc); in dsi_get_pclk_rate()
571 unsigned long pclk_rate = dsi_get_pclk_rate(mode, msm_host->dsc, is_bonded_dsi); in dsi_byte_clk_get_rate()
590 msm_host->pixel_clk_rate = dsi_get_pclk_rate(msm_host->mode, msm_host->dsc, is_bonded_dsi); in dsi_calc_pclk()
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/openbmc/qemu/tests/uefi-test-tools/
H A Duefi-test-build.config8 conf = UefiTestToolsPkg/UefiTestToolsPkg.dsc
18 conf = UefiTestToolsPkg/UefiTestToolsPkg.dsc
28 conf = UefiTestToolsPkg/UefiTestToolsPkg.dsc
38 conf = UefiTestToolsPkg/UefiTestToolsPkg.dsc
48 conf = UefiTestToolsPkg/UefiTestToolsPkg.dsc
/openbmc/qemu/roms/
H A Dedk2-build.config41 conf = OvmfPkg/OvmfPkgIa32.dsc
51 conf = OvmfPkg/OvmfPkgIa32.dsc
64 conf = OvmfPkg/OvmfPkgX64.dsc
73 conf = OvmfPkg/OvmfPkgX64.dsc
83 conf = OvmfPkg/Microvm/MicrovmX64.dsc
95 conf = ArmVirtPkg/ArmVirtQemu.dsc
112 conf = ArmVirtPkg/ArmVirtQemu.dsc
126 conf = OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc
139 conf = OvmfPkg/LoongArchVirt/LoongArchVirtQemu.dsc
/openbmc/openbmc/meta-arm/meta-arm/recipes-bsp/uefi/files/
H A D0001-Platform-StMmRpmb-Fix-build.patch12 .../PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.dsc | 3 +++
17 …aloneMmPkg/PlatformStandaloneMmRpmb.dsc b/Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformSt…
19 --- a/Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.dsc
20 +++ b/Platform/StandaloneMm/PlatformStandaloneMmPkg/PlatformStandaloneMmRpmb.dsc
/openbmc/openbmc/meta-arm/meta-arm/recipes-bsp/uefi/
H A Dedk2-firmware_%.bbappend3 EDK2_PLATFORM_DSC:qemuarm64-secureboot = "ArmVirtPkg/ArmVirtQemu.dsc"
8 EDK2_PLATFORM_DSC:qemuarm64 = "ArmVirtPkg/ArmVirtQemu.dsc"
13 EDK2_PLATFORM_DSC:qemuarm = "ArmVirtPkg/ArmVirtQemu.dsc"
/openbmc/linux/drivers/gpu/drm/tests/
H A Ddrm_dp_mst_helper_test.c18 const bool dsc; member
26 .dsc = false,
32 .dsc = false,
38 .dsc = false,
44 .dsc = true,
50 .dsc = true,
65 sprintf(desc, "Clock %d BPP %d DSC %s", t->clock, t->bpp, t->dsc ? "enabled" : "disabled"); in dp_mst_calc_pbn_mode_desc()
/openbmc/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_debugfs.c1451 struct display_stream_compressor *dsc; in dp_dsc_clock_en_read() local
1474 dsc = pipe_ctx->stream_res.dsc; in dp_dsc_clock_en_read()
1475 if (dsc) in dp_dsc_clock_en_read()
1476 dsc->funcs->dsc_read_state(dsc, &dsc_state); in dp_dsc_clock_en_read()
1641 struct display_stream_compressor *dsc; in dp_dsc_slice_width_read() local
1664 dsc = pipe_ctx->stream_res.dsc; in dp_dsc_slice_width_read()
1665 if (dsc) in dp_dsc_slice_width_read()
1666 dsc->funcs->dsc_read_state(dsc, &dsc_state); in dp_dsc_slice_width_read()
1829 struct display_stream_compressor *dsc; in dp_dsc_slice_height_read() local
1852 dsc = pipe_ctx->stream_res.dsc; in dp_dsc_slice_height_read()
[all …]
/openbmc/linux/drivers/net/ethernet/broadcom/
H A Dsb1250-mac.c775 struct sbdmadscr *dsc; in sbdma_add_rcvbuffer() local
782 dsc = d->sbdma_addptr; in sbdma_add_rcvbuffer()
839 dsc->dscr_a = virt_to_phys(sb_new->data) | in sbdma_add_rcvbuffer()
842 dsc->dscr_a = virt_to_phys(sb_new->data) | in sbdma_add_rcvbuffer()
848 dsc->dscr_b = 0; in sbdma_add_rcvbuffer()
854 d->sbdma_ctxtable[dsc-d->sbdma_dscrtable] = sb_new; in sbdma_add_rcvbuffer()
889 struct sbdmadscr *dsc; in sbdma_add_txbuffer() local
897 dsc = d->sbdma_addptr; in sbdma_add_txbuffer()
928 dsc->dscr_a = phys | in sbdma_add_txbuffer()
937 dsc->dscr_b = V_DMA_DSCRB_OPTIONS(K_DMA_ETHTX_APPENDCRC_APPENDPAD) | in sbdma_add_txbuffer()
[all …]
/openbmc/linux/include/drm/display/
H A Ddrm_dsc_helper.h28 u8 drm_dsc_initial_scale_value(const struct drm_dsc_config *dsc);
29 u32 drm_dsc_flatness_det_thresh(const struct drm_dsc_config *dsc);
/openbmc/linux/include/linux/irqchip/
H A Dirq-partition-percpu.h28 struct irq_domain *partition_get_domain(struct partition_desc *dsc);
47 struct irq_domain *partition_get_domain(struct partition_desc *dsc) in partition_get_domain() argument
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_hwseq.c1005 struct display_stream_compressor *dsc = pipe_ctx->stream_res.dsc; in update_dsc_on_stream() local
1010 ASSERT(dsc); in update_dsc_on_stream()
1029 dsc->funcs->dsc_set_config(dsc, &dsc_cfg, &dsc_optc_cfg); in update_dsc_on_stream()
1030 dsc->funcs->dsc_enable(dsc, pipe_ctx->stream_res.opp->inst); in update_dsc_on_stream()
1032 struct display_stream_compressor *odm_dsc = odm_pipe->stream_res.dsc; in update_dsc_on_stream()
1056 dsc->funcs->dsc_disable(pipe_ctx->stream_res.dsc); in update_dsc_on_stream()
1058 ASSERT(odm_pipe->stream_res.dsc); in update_dsc_on_stream()
1059 odm_pipe->stream_res.dsc->funcs->dsc_disable(odm_pipe->stream_res.dsc); in update_dsc_on_stream()
1132 if (pipe_ctx->stream_res.dsc) { in dcn32_update_odm()
1139 current_pipe_ctx->next_odm_pipe->stream_res.dsc) { in dcn32_update_odm()
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/openbmc/linux/drivers/net/ethernet/mellanox/mlx5/core/
H A Den_stats.h36 #define MLX5E_READ_CTR64_CPU(ptr, dsc, i) \ argument
37 (*(u64 *)((char *)ptr + dsc[i].offset))
38 #define MLX5E_READ_CTR64_BE(ptr, dsc, i) \ argument
39 be64_to_cpu(*(__be64 *)((char *)ptr + dsc[i].offset))
40 #define MLX5E_READ_CTR32_CPU(ptr, dsc, i) \ argument
41 (*(u32 *)((char *)ptr + dsc[i].offset))
42 #define MLX5E_READ_CTR32_BE(ptr, dsc, i) \ argument
43 be32_to_cpu(*(__be32 *)((char *)ptr + dsc[i].offset))

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