/openbmc/linux/net/smc/ |
H A D | smc_ism.c | 184 struct smcd_dmb dmb; in smc_ism_unregister_dmb() local 190 memset(&dmb, 0, sizeof(dmb)); in smc_ism_unregister_dmb() 191 dmb.dmb_tok = dmb_desc->token; in smc_ism_unregister_dmb() 192 dmb.sba_idx = dmb_desc->sba_idx; in smc_ism_unregister_dmb() 193 dmb.cpu_addr = dmb_desc->cpu_addr; in smc_ism_unregister_dmb() 194 dmb.dma_addr = dmb_desc->dma_addr; in smc_ism_unregister_dmb() 195 dmb.dmb_len = dmb_desc->len; in smc_ism_unregister_dmb() 196 rc = smcd->ops->unregister_dmb(smcd, &dmb); in smc_ism_unregister_dmb() 209 struct smcd_dmb dmb; in smc_ism_register_dmb() local 212 memset(&dmb, 0, sizeof(dmb)); in smc_ism_register_dmb() [all …]
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/openbmc/linux/drivers/s390/net/ |
H A D | ism_drv.c | 291 static void ism_free_dmb(struct ism_dev *ism, struct ism_dmb *dmb) in ism_free_dmb() argument 293 clear_bit(dmb->sba_idx, ism->sba_bitmap); in ism_free_dmb() 294 dma_unmap_page(&ism->pdev->dev, dmb->dma_addr, dmb->dmb_len, in ism_free_dmb() 296 folio_put(virt_to_folio(dmb->cpu_addr)); in ism_free_dmb() 299 static int ism_alloc_dmb(struct ism_dev *ism, struct ism_dmb *dmb) in ism_alloc_dmb() argument 305 if (PAGE_ALIGN(dmb->dmb_len) > dma_get_max_seg_size(&ism->pdev->dev)) in ism_alloc_dmb() 308 if (!dmb->sba_idx) { in ism_alloc_dmb() 314 dmb->sba_idx = bit; in ism_alloc_dmb() 316 if (dmb->sba_idx < ISM_DMB_BIT_OFFSET || in ism_alloc_dmb() 317 test_and_set_bit(dmb->sba_idx, ism->sba_bitmap)) in ism_alloc_dmb() [all …]
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H A D | ism.h | 116 u64 dmb; member 192 #define ISM_CREATE_REQ(dmb, idx, sf, offset) \ argument 193 ((dmb) | (idx) << 24 | (sf) << 23 | (offset))
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/openbmc/linux/arch/arm64/include/asm/vdso/ |
H A D | compat_barrier.h | 17 #ifdef dmb 18 #undef dmb 21 #define dmb(option) __asm__ __volatile__ ("dmb " #option : : : "memory") macro 23 #define aarch32_smp_mb() dmb(ish) 24 #define aarch32_smp_rmb() dmb(ishld) 25 #define aarch32_smp_wmb() dmb(ishst)
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/openbmc/linux/arch/arm/include/asm/ |
H A D | barrier.h | 21 #define dmb(option) __asm__ __volatile__ ("dmb " #option : : : "memory") macro 33 #define dmb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" \ macro 40 #define dmb(x) __asm__ __volatile__ ("" : : : "memory") macro 45 #define dmb(x) __asm__ __volatile__ ("" : : : "memory") macro 67 #define dma_rmb() dmb(osh) 68 #define dma_wmb() dmb(oshst) 77 #define __smp_mb() dmb(ish) 79 #define __smp_wmb() dmb(ishst)
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H A D | assembler.h | 380 ALT_SMP(dmb ish) 382 ALT_SMP(W(dmb) ish) 385 ALT_SMP(mcr p15, 0, r0, c7, c10, 5) @ dmb 403 dmb ish 405 W(dmb) ish 408 mcr p15, 0, r0, c7, c10, 5 @ dmb
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/openbmc/linux/arch/arm64/include/asm/ |
H A D | barrier.h | 28 #define dmb(opt) asm volatile("dmb " #opt : : : "memory") macro 64 #define __dma_mb() dmb(osh) 65 #define __dma_rmb() dmb(oshld) 66 #define __dma_wmb() dmb(oshst) 123 #define __smp_mb() dmb(ish) 124 #define __smp_rmb() dmb(ishld) 125 #define __smp_wmb() dmb(ishst)
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H A D | atomic_ll_sc.h | 86 ATOMIC_OP_RETURN( , dmb ish, , l, "memory", __VA_ARGS__)\ 90 ATOMIC_FETCH_OP ( , dmb ish, , l, "memory", __VA_ARGS__)\ 101 ATOMIC_FETCH_OP ( , dmb ish, , l, "memory", __VA_ARGS__)\ in ATOMIC_OPS() 182 ATOMIC64_OP_RETURN(, dmb ish, , l, "memory", __VA_ARGS__) \ 186 ATOMIC64_FETCH_OP (, dmb ish, , l, "memory", __VA_ARGS__) \ 197 ATOMIC64_FETCH_OP (, dmb ish, , l, "memory", __VA_ARGS__) \ 290 __CMPXCHG_CASE(w, b, mb_, 8, dmb ish, , l, "memory", K) 291 __CMPXCHG_CASE(w, h, mb_, 16, dmb ish, , l, "memory", K) 292 __CMPXCHG_CASE(w, , mb_, 32, dmb ish, , l, "memory", K) 293 __CMPXCHG_CASE( , , mb_, 64, dmb ish, , l, "memory", L) [all …]
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H A D | cmpxchg.h | 57 __XCHG_CASE(w, b, mb_, 8, dmb ish, nop, , a, l, "memory") 58 __XCHG_CASE(w, h, mb_, 16, dmb ish, nop, , a, l, "memory") 59 __XCHG_CASE(w, , mb_, 32, dmb ish, nop, , a, l, "memory") 60 __XCHG_CASE( , , mb_, 64, dmb ish, nop, , a, l, "memory")
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/openbmc/linux/tools/virtio/asm/ |
H A D | barrier.h | 20 #define dmb(opt) asm volatile("dmb " #opt : : : "memory") macro 22 #define virt_rmb() dmb(ishld) 23 #define virt_wmb() dmb(ishst) 24 #define virt_store_mb(var, value) do { WRITE_ONCE(var, value); dmb(ish); } while (0)
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/openbmc/linux/arch/arm/common/ |
H A D | vlock.S | 31 dmb 35 dmb 82 dmb 95 dmb
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H A D | mcpm_head.S | 123 dmb 138 dmb 150 dmb 154 dmb 175 dmb 184 dmb 198 dmb
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/openbmc/linux/include/net/ |
H A D | smc.h | 63 int (*register_dmb)(struct smcd_dev *dev, struct smcd_dmb *dmb, 65 int (*unregister_dmb)(struct smcd_dev *dev, struct smcd_dmb *dmb); 83 int (*attach_dmb)(struct smcd_dev *dev, struct smcd_dmb *dmb);
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/openbmc/u-boot/arch/arm/mach-omap2/ |
H A D | lowlevel_init.S | 59 dmb 72 dmb 84 dmb
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/openbmc/linux/tools/testing/selftests/kvm/include/aarch64/ |
H A D | processor.h | 142 #define dmb(opt) asm volatile("dmb " #opt : : : "memory") macro 144 #define dma_wmb() dmb(oshst) 147 #define dma_rmb() dmb(oshld)
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/openbmc/linux/include/linux/ |
H A D | ism.h | 84 int ism_register_dmb(struct ism_dev *dev, struct ism_dmb *dmb, 86 int ism_unregister_dmb(struct ism_dev *dev, struct ism_dmb *dmb);
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/openbmc/u-boot/arch/arm/mach-omap2/omap5/ |
H A D | sec_entry_cpu1.S | 45 dmb 57 dmb
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/openbmc/linux/arch/arm/mach-omap2/ |
H A D | sleep34xx.S | 97 dmb @ data memory barrier 213 dmb 418 dmb @ data memory barrier 429 dmb @ data memory barrier 444 dmb @ data memory barrier
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/openbmc/linux/arch/arm/mm/ |
H A D | cache-b15-rac.c | 66 dmb(); in __b15_rac_disable() 80 dmb(); in __b15_rac_flush()
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/openbmc/u-boot/arch/arm/include/asm/ |
H A D | barriers.h | 48 #define dmb() DMB macro
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/openbmc/u-boot/arch/x86/include/asm/ |
H A D | io.h | 240 #define dmb() __asm__ __volatile__ ("" : : : "memory") macro 241 #define __iormb() dmb() 242 #define __iowmb() dmb()
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/openbmc/linux/arch/arm64/mm/ |
H A D | flush.c | 92 dmb(osh); in arch_wb_cache_pmem()
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/openbmc/u-boot/arch/arm/mach-mvebu/ |
H A D | lowlevel_spl.S | 64 dmb /* @data memory barrier */
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/openbmc/linux/arch/arm/mach-socfpga/ |
H A D | self-refresh.S | 85 dmb
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/openbmc/qemu/tests/tcg/arm/system/ |
H A D | test-armv6m-undef.S | 108 dmb
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