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Searched refs:devdisr5 (Results 1 – 5 of 5) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-ls102xa/
H A Dimmap_ls102xa.h104 u32 devdisr5; /* Device disable control 5 */ member
/openbmc/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
H A Dimmap_lsch3.h279 u32 devdisr5; /* Device disable control 5 */ member
H A Dimmap_lsch2.h253 u32 devdisr5; /* Device disable control 5 */ member
/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dcpu.c93 setbits_be32(&gur->devdisr5, FSL_CORENET_DEVDISR5_DDR3); in checkcpu()
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dimmap_85xx.h1609 u32 devdisr5; /* Device disable control 5 */ member