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Searched refs:dd (Results 1 – 25 of 643) sorted by relevance

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/openbmc/linux/drivers/crypto/
H A Domap-des.c43 #define _calc_walked(inout) (dd->inout##_walk.offset - dd->inout##_sg->offset)
45 #define DES_REG_KEY(dd, x) ((dd)->pdata->key_ofs - \ argument
48 #define DES_REG_IV(dd, x) ((dd)->pdata->iv_ofs + ((x) * 0x04)) argument
50 #define DES_REG_CTRL(dd) ((dd)->pdata->ctrl_ofs) argument
57 #define DES_REG_DATA_N(dd, x) ((dd)->pdata->data_ofs + ((x) * 0x04)) argument
59 #define DES_REG_REV(dd) ((dd)->pdata->rev_ofs) argument
61 #define DES_REG_MASK(dd) ((dd)->pdata->mask_ofs) argument
65 #define DES_REG_IRQ_STATUS(dd) ((dd)->pdata->irq_status_ofs) argument
66 #define DES_REG_IRQ_ENABLE(dd) ((dd)->pdata->irq_enable_ofs) argument
82 struct omap_des_dev *dd; member
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H A Domap-aes.c47 #define omap_aes_read(dd, offset) \ argument
50 _read_ret = __raw_readl(dd->io_base + offset); \
56 inline u32 omap_aes_read(struct omap_aes_dev *dd, u32 offset) in omap_aes_read() argument
58 return __raw_readl(dd->io_base + offset); in omap_aes_read()
63 #define omap_aes_write(dd, offset, value) \ argument
67 __raw_writel(value, dd->io_base + offset); \
70 inline void omap_aes_write(struct omap_aes_dev *dd, u32 offset, in omap_aes_write() argument
73 __raw_writel(value, dd->io_base + offset); in omap_aes_write()
77 static inline void omap_aes_write_mask(struct omap_aes_dev *dd, u32 offset, in omap_aes_write_mask() argument
82 val = omap_aes_read(dd, offset); in omap_aes_write_mask()
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H A Datmel-tdes.c75 struct atmel_tdes_dev *dd; member
181 static inline u32 atmel_tdes_read(struct atmel_tdes_dev *dd, u32 offset) in atmel_tdes_read() argument
183 return readl_relaxed(dd->io_base + offset); in atmel_tdes_read()
186 static inline void atmel_tdes_write(struct atmel_tdes_dev *dd, in atmel_tdes_write() argument
189 writel_relaxed(value, dd->io_base + offset); in atmel_tdes_write()
192 static void atmel_tdes_write_n(struct atmel_tdes_dev *dd, u32 offset, in atmel_tdes_write_n() argument
196 atmel_tdes_write(dd, offset, *value); in atmel_tdes_write_n()
211 static int atmel_tdes_hw_init(struct atmel_tdes_dev *dd) in atmel_tdes_hw_init() argument
215 err = clk_prepare_enable(dd->iclk); in atmel_tdes_hw_init()
219 if (!(dd->flags & TDES_FLAGS_INIT)) { in atmel_tdes_hw_init()
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H A Datmel-aes.c104 struct atmel_aes_dev *dd; member
347 static inline u32 atmel_aes_read(struct atmel_aes_dev *dd, u32 offset) in atmel_aes_read() argument
349 u32 value = readl_relaxed(dd->io_base + offset); in atmel_aes_read()
352 if (dd->flags & AES_FLAGS_DUMP_REG) { in atmel_aes_read()
355 dev_vdbg(dd->dev, "read 0x%08x from %s\n", value, in atmel_aes_read()
363 static inline void atmel_aes_write(struct atmel_aes_dev *dd, in atmel_aes_write() argument
367 if (dd->flags & AES_FLAGS_DUMP_REG) { in atmel_aes_write()
370 dev_vdbg(dd->dev, "write 0x%08x into %s\n", value, in atmel_aes_write()
375 writel_relaxed(value, dd->io_base + offset); in atmel_aes_write()
378 static void atmel_aes_read_n(struct atmel_aes_dev *dd, u32 offset, in atmel_aes_read_n() argument
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H A Domap-aes-gcm.c29 static int omap_aes_gcm_handle_queue(struct omap_aes_dev *dd,
32 static void omap_aes_gcm_finish_req(struct omap_aes_dev *dd, int ret) in omap_aes_gcm_finish_req() argument
34 struct aead_request *req = dd->aead_req; in omap_aes_gcm_finish_req()
36 dd->in_sg = NULL; in omap_aes_gcm_finish_req()
37 dd->out_sg = NULL; in omap_aes_gcm_finish_req()
39 crypto_finalize_aead_request(dd->engine, req, ret); in omap_aes_gcm_finish_req()
41 pm_runtime_mark_last_busy(dd->dev); in omap_aes_gcm_finish_req()
42 pm_runtime_put_autosuspend(dd->dev); in omap_aes_gcm_finish_req()
45 static void omap_aes_gcm_done_task(struct omap_aes_dev *dd) in omap_aes_gcm_done_task() argument
51 alen = ALIGN(dd->assoc_len, AES_BLOCK_SIZE); in omap_aes_gcm_done_task()
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H A Datmel-sha.c90 struct atmel_sha_dev *dd; member
114 struct atmel_sha_dev *dd; member
253 static inline u32 atmel_sha_read(struct atmel_sha_dev *dd, u32 offset) in atmel_sha_read() argument
255 u32 value = readl_relaxed(dd->io_base + offset); in atmel_sha_read()
258 if (dd->flags & SHA_FLAGS_DUMP_REG) { in atmel_sha_read()
261 dev_vdbg(dd->dev, "read 0x%08x from %s\n", value, in atmel_sha_read()
269 static inline void atmel_sha_write(struct atmel_sha_dev *dd, in atmel_sha_write() argument
273 if (dd->flags & SHA_FLAGS_DUMP_REG) { in atmel_sha_write()
276 dev_vdbg(dd->dev, "write 0x%08x into %s\n", value, in atmel_sha_write()
281 writel_relaxed(value, dd->io_base + offset); in atmel_sha_write()
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/openbmc/linux/drivers/infiniband/hw/hfi1/
H A Dpcie.c24 int hfi1_pcie_init(struct hfi1_devdata *dd) in hfi1_pcie_init() argument
27 struct pci_dev *pdev = dd->pcidev; in hfi1_pcie_init()
43 dd_dev_err(dd, "pci enable failed: error %d\n", -ret); in hfi1_pcie_init()
49 dd_dev_err(dd, "pci_request_regions fails: err %d\n", -ret); in hfi1_pcie_init()
62 dd_dev_err(dd, "Unable to set DMA mask: %d\n", ret); in hfi1_pcie_init()
93 int hfi1_pcie_ddinit(struct hfi1_devdata *dd, struct pci_dev *pdev) in hfi1_pcie_ddinit() argument
110 dd_dev_err(dd, "chip PIO range does not match\n"); in hfi1_pcie_ddinit()
114 dd->kregbase1 = ioremap(addr, RCV_ARRAY); in hfi1_pcie_ddinit()
115 if (!dd->kregbase1) { in hfi1_pcie_ddinit()
116 dd_dev_err(dd, "UC mapping of kregbase1 failed\n"); in hfi1_pcie_ddinit()
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H A Dfirmware.c212 static int load_fabric_serdes_firmware(struct hfi1_devdata *dd,
214 static void dump_fw_version(struct hfi1_devdata *dd);
229 static int __read_8051_data(struct hfi1_devdata *dd, u32 addr, u64 *result) in __read_8051_data() argument
237 write_csr(dd, DC_DC8051_CFG_RAM_ACCESS_CTRL, reg); in __read_8051_data()
239 write_csr(dd, DC_DC8051_CFG_RAM_ACCESS_CTRL, in __read_8051_data()
244 while ((read_csr(dd, DC_DC8051_CFG_RAM_ACCESS_STATUS) in __read_8051_data()
249 dd_dev_err(dd, "timeout reading 8051 data\n"); in __read_8051_data()
256 *result = read_csr(dd, DC_DC8051_CFG_RAM_ACCESS_RD_DATA); in __read_8051_data()
265 int read_8051_data(struct hfi1_devdata *dd, u32 addr, u32 len, u64 *result) in read_8051_data() argument
271 spin_lock_irqsave(&dd->dc8051_memlock, flags); in read_8051_data()
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H A Dinit.c85 static int hfi1_create_kctxt(struct hfi1_devdata *dd, in hfi1_create_kctxt() argument
94 ret = hfi1_create_ctxtdata(ppd, dd->node, &rcd); in hfi1_create_kctxt()
96 dd_dev_err(dd, "Kernel receive context allocation failed\n"); in hfi1_create_kctxt()
119 rcd->sc = sc_alloc(dd, SC_ACK, rcd->rcvhdrqentsize, dd->node); in hfi1_create_kctxt()
121 dd_dev_err(dd, "Kernel send context allocation failed\n"); in hfi1_create_kctxt()
132 int hfi1_create_kctxts(struct hfi1_devdata *dd) in hfi1_create_kctxts() argument
137 dd->rcd = kcalloc_node(dd->num_rcv_contexts, sizeof(*dd->rcd), in hfi1_create_kctxts()
138 GFP_KERNEL, dd->node); in hfi1_create_kctxts()
139 if (!dd->rcd) in hfi1_create_kctxts()
142 for (i = 0; i < dd->first_dyn_alloc_ctxt; ++i) { in hfi1_create_kctxts()
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H A Dchip.c101 #define emulator_rev(dd) ((dd)->irev >> 8) argument
103 #define is_emulator_p(dd) ((((dd)->irev) & 0xf) == 3) argument
104 #define is_emulator_s(dd) ((((dd)->irev) & 0xf) == 4) argument
1003 static u32 chip_to_opa_lstate(struct hfi1_devdata *dd, u32 chip_lstate);
1004 static int set_physical_link_state(struct hfi1_devdata *dd, u64 state);
1005 static void read_vc_remote_phy(struct hfi1_devdata *dd, u8 *power_management,
1007 static void read_vc_remote_fabric(struct hfi1_devdata *dd, u8 *vau, u8 *z,
1009 static void read_vc_remote_link_width(struct hfi1_devdata *dd,
1011 static void read_vc_local_link_mode(struct hfi1_devdata *dd, u8 *misc_bits,
1013 static void read_remote_device_id(struct hfi1_devdata *dd, u16 *device_id,
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H A Dmsix.c16 int msix_initialize(struct hfi1_devdata *dd) in msix_initialize() argument
30 total = 1 + dd->num_sdma + dd->n_krcv_queues + dd->num_netdev_contexts; in msix_initialize()
35 ret = pci_alloc_irq_vectors(dd->pcidev, total, total, PCI_IRQ_MSIX); in msix_initialize()
37 dd_dev_err(dd, "pci_alloc_irq_vectors() failed: %d\n", ret); in msix_initialize()
41 entries = kcalloc(total, sizeof(*dd->msix_info.msix_entries), in msix_initialize()
44 pci_free_irq_vectors(dd->pcidev); in msix_initialize()
48 dd->msix_info.msix_entries = entries; in msix_initialize()
49 spin_lock_init(&dd->msix_info.msix_lock); in msix_initialize()
50 bitmap_zero(dd->msix_info.in_use_msix, total); in msix_initialize()
51 dd->msix_info.max_requested = total; in msix_initialize()
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H A Daspm.c23 static bool aspm_hw_l1_supported(struct hfi1_devdata *dd) in aspm_hw_l1_supported() argument
25 struct pci_dev *parent = dd->pcidev->bus->self; in aspm_hw_l1_supported()
35 pcie_capability_read_dword(dd->pcidev, PCI_EXP_LNKCAP, &dn); in aspm_hw_l1_supported()
42 return (!!dn || is_ax(dd)) && !!up; in aspm_hw_l1_supported()
46 static void aspm_hw_set_l1_ent_latency(struct hfi1_devdata *dd) in aspm_hw_set_l1_ent_latency() argument
51 pci_read_config_dword(dd->pcidev, PCIE_CFG_REG_PL3, &reg32); in aspm_hw_set_l1_ent_latency()
54 pci_write_config_dword(dd->pcidev, PCIE_CFG_REG_PL3, reg32); in aspm_hw_set_l1_ent_latency()
57 static void aspm_hw_enable_l1(struct hfi1_devdata *dd) in aspm_hw_enable_l1() argument
59 struct pci_dev *parent = dd->pcidev->bus->self; in aspm_hw_enable_l1()
72 pcie_capability_clear_and_set_word(dd->pcidev, PCI_EXP_LNKCTL, in aspm_hw_enable_l1()
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H A Dpio.c21 void __cm_reset(struct hfi1_devdata *dd, u64 sendctrl) in __cm_reset() argument
23 write_csr(dd, SEND_CTRL, sendctrl | SEND_CTRL_CM_RESET_SMASK); in __cm_reset()
26 sendctrl = read_csr(dd, SEND_CTRL); in __cm_reset()
33 void pio_send_control(struct hfi1_devdata *dd, int op) in pio_send_control() argument
41 spin_lock_irqsave(&dd->sendctrl_lock, flags); in pio_send_control()
43 reg = read_csr(dd, SEND_CTRL); in pio_send_control()
50 for (i = 0; i < ARRAY_SIZE(dd->vld); i++) in pio_send_control()
51 if (!dd->vld[i].mtu) in pio_send_control()
68 __cm_reset(dd, reg); in pio_send_control()
76 dd_dev_err(dd, "%s: invalid control %d\n", __func__, op); in pio_send_control()
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/openbmc/linux/drivers/infiniband/hw/qib/
H A Dqib_twsi.c67 static void i2c_wait_for_writes(struct qib_devdata *dd) in i2c_wait_for_writes() argument
74 dd->f_gpio_mod(dd, 0, 0, 0); in i2c_wait_for_writes()
89 static void scl_out(struct qib_devdata *dd, u8 bit) in scl_out() argument
95 mask = 1UL << dd->gpio_scl_num; in scl_out()
98 dd->f_gpio_mod(dd, 0, bit ? 0 : mask, mask); in scl_out()
110 if (mask & dd->f_gpio_mod(dd, 0, 0, 0)) in scl_out()
115 qib_dev_err(dd, "SCL interface stuck low > %d uSec\n", in scl_out()
118 i2c_wait_for_writes(dd); in scl_out()
121 static void sda_out(struct qib_devdata *dd, u8 bit) in sda_out() argument
125 mask = 1UL << dd->gpio_sda_num; in sda_out()
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H A Dqib_iba6120.c306 static inline u32 qib_read_ureg32(const struct qib_devdata *dd, in qib_read_ureg32() argument
309 if (!dd->kregbase || !(dd->flags & QIB_PRESENT)) in qib_read_ureg32()
312 if (dd->userbase) in qib_read_ureg32()
314 ((char __iomem *)dd->userbase + in qib_read_ureg32()
315 dd->ureg_align * ctxt)); in qib_read_ureg32()
318 (dd->uregbase + in qib_read_ureg32()
319 (char __iomem *)dd->kregbase + in qib_read_ureg32()
320 dd->ureg_align * ctxt)); in qib_read_ureg32()
332 static inline void qib_write_ureg(const struct qib_devdata *dd, in qib_write_ureg() argument
337 if (dd->userbase) in qib_write_ureg()
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H A Dqib_init.c102 void qib_set_ctxtcnt(struct qib_devdata *dd) in qib_set_ctxtcnt() argument
105 dd->cfgctxts = dd->first_user_ctxt + num_online_cpus(); in qib_set_ctxtcnt()
106 if (dd->cfgctxts > dd->ctxtcnt) in qib_set_ctxtcnt()
107 dd->cfgctxts = dd->ctxtcnt; in qib_set_ctxtcnt()
108 } else if (qib_cfgctxts < dd->num_pports) in qib_set_ctxtcnt()
109 dd->cfgctxts = dd->ctxtcnt; in qib_set_ctxtcnt()
110 else if (qib_cfgctxts <= dd->ctxtcnt) in qib_set_ctxtcnt()
111 dd->cfgctxts = qib_cfgctxts; in qib_set_ctxtcnt()
113 dd->cfgctxts = dd->ctxtcnt; in qib_set_ctxtcnt()
114 dd->freectxts = (dd->first_user_ctxt > dd->cfgctxts) ? 0 : in qib_set_ctxtcnt()
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H A Dqib_tx.c61 void qib_disarm_piobufs(struct qib_devdata *dd, unsigned first, unsigned cnt) in qib_disarm_piobufs() argument
68 spin_lock_irqsave(&dd->pioavail_lock, flags); in qib_disarm_piobufs()
70 __clear_bit(i, dd->pio_need_disarm); in qib_disarm_piobufs()
71 dd->f_sendctrl(dd->pport, QIB_SENDCTRL_DISARM_BUF(i)); in qib_disarm_piobufs()
73 spin_unlock_irqrestore(&dd->pioavail_lock, flags); in qib_disarm_piobufs()
82 struct qib_devdata *dd = rcd->dd; in qib_disarm_piobufs_ifneeded() local
102 spin_lock_irq(&dd->pioavail_lock); in qib_disarm_piobufs_ifneeded()
104 if (__test_and_clear_bit(i, dd->pio_need_disarm)) in qib_disarm_piobufs_ifneeded()
105 dd->f_sendctrl(rcd->ppd, QIB_SENDCTRL_DISARM_BUF(i)); in qib_disarm_piobufs_ifneeded()
107 spin_unlock_irq(&dd->pioavail_lock); in qib_disarm_piobufs_ifneeded()
[all …]
H A Dqib_iba7220.c230 static inline u32 qib_read_ureg32(const struct qib_devdata *dd, in qib_read_ureg32() argument
233 if (!dd->kregbase || !(dd->flags & QIB_PRESENT)) in qib_read_ureg32()
236 if (dd->userbase) in qib_read_ureg32()
238 ((char __iomem *)dd->userbase + in qib_read_ureg32()
239 dd->ureg_align * ctxt)); in qib_read_ureg32()
242 (dd->uregbase + in qib_read_ureg32()
243 (char __iomem *)dd->kregbase + in qib_read_ureg32()
244 dd->ureg_align * ctxt)); in qib_read_ureg32()
256 static inline void qib_write_ureg(const struct qib_devdata *dd, in qib_write_ureg() argument
261 if (dd->userbase) in qib_write_ureg()
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H A Dqib_pcie.c121 int qib_pcie_ddinit(struct qib_devdata *dd, struct pci_dev *pdev, in qib_pcie_ddinit() argument
127 dd->pcidev = pdev; in qib_pcie_ddinit()
128 pci_set_drvdata(pdev, dd); in qib_pcie_ddinit()
133 dd->kregbase = ioremap(addr, len); in qib_pcie_ddinit()
134 if (!dd->kregbase) in qib_pcie_ddinit()
137 dd->kregend = (u64 __iomem *)((void __iomem *) dd->kregbase + len); in qib_pcie_ddinit()
138 dd->physaddr = addr; /* used for io_remap, etc. */ in qib_pcie_ddinit()
144 dd->pcibar0 = addr; in qib_pcie_ddinit()
145 dd->pcibar1 = addr >> 32; in qib_pcie_ddinit()
146 dd->deviceid = ent->device; /* save for later use */ in qib_pcie_ddinit()
[all …]
H A Dqib_sd7220.c98 static int qib_sd7220_reg_mod(struct qib_devdata *dd, int sdnum, u32 loc,
100 static int ibsd_mod_allchnls(struct qib_devdata *dd, int loc, int val,
102 static int qib_sd_trimdone_poll(struct qib_devdata *dd);
103 static void qib_sd_trimdone_monitor(struct qib_devdata *dd, const char *where);
104 static int qib_sd_setvals(struct qib_devdata *dd);
105 static int qib_sd_early(struct qib_devdata *dd);
106 static int qib_sd_dactrim(struct qib_devdata *dd);
107 static int qib_internal_presets(struct qib_devdata *dd);
109 static int qib_sd_trimself(struct qib_devdata *dd, int val);
110 static int epb_access(struct qib_devdata *dd, int sdnum, int claim);
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H A Dqib_iba7322.c162 #define IS_QMH(dd) (SYM_FIELD((dd)->revision, Revision, BoardID) == \ argument
164 #define IS_QME(dd) (SYM_FIELD((dd)->revision, Revision, BoardID) == \ argument
758 static inline void qib_write_kreg(const struct qib_devdata *dd,
767 static void qib_setup_dca(struct qib_devdata *dd);
768 static void setup_dca_notifier(struct qib_devdata *dd, int msixnum);
769 static void reset_dca_notifier(struct qib_devdata *dd, int msixnum);
782 static inline u32 qib_read_ureg32(const struct qib_devdata *dd, in qib_read_ureg32() argument
785 if (!dd->kregbase || !(dd->flags & QIB_PRESENT)) in qib_read_ureg32()
788 (dd->ureg_align * ctxt) + (dd->userbase ? in qib_read_ureg32()
789 (char __iomem *)dd->userbase : in qib_read_ureg32()
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H A Dqib_diag.c69 struct qib_devdata *dd; member
78 static struct qib_diag_client *get_client(struct qib_devdata *dd) in get_client() argument
92 dc->dd = dd; in get_client()
104 struct qib_devdata *dd = dc->dd; in return_client() local
108 if (dc == dd->diag_client) { in return_client()
109 dd->diag_client = dc->next; in return_client()
112 tdc = dc->dd->diag_client; in return_client()
124 rdc->dd = NULL; in return_client()
160 int qib_diag_add(struct qib_devdata *dd) in qib_diag_add() argument
173 snprintf(name, sizeof(name), "ipath_diag%d", dd->unit); in qib_diag_add()
[all …]
/openbmc/linux/drivers/clk/ti/
H A Ddpll3xxx.c49 const struct dpll_data *dd; in _omap3_dpll_write_clken() local
52 dd = clk->dpll_data; in _omap3_dpll_write_clken()
54 v = ti_clk_ll_ops->clk_readl(&dd->control_reg); in _omap3_dpll_write_clken()
55 v &= ~dd->enable_mask; in _omap3_dpll_write_clken()
56 v |= clken_bits << __ffs(dd->enable_mask); in _omap3_dpll_write_clken()
57 ti_clk_ll_ops->clk_writel(v, &dd->control_reg); in _omap3_dpll_write_clken()
63 const struct dpll_data *dd; in _omap3_wait_dpll_status() local
68 dd = clk->dpll_data; in _omap3_wait_dpll_status()
71 state <<= __ffs(dd->idlest_mask); in _omap3_wait_dpll_status()
73 while (((ti_clk_ll_ops->clk_readl(&dd->idlest_reg) & dd->idlest_mask) in _omap3_wait_dpll_status()
[all …]
/openbmc/linux/drivers/block/mtip32xx/
H A Dmtip32xx.c108 static int mtip_block_initialize(struct driver_data *dd);
133 static bool mtip_check_surprise_removal(struct driver_data *dd) in mtip_check_surprise_removal() argument
137 if (dd->sr) in mtip_check_surprise_removal()
141 pci_read_config_word(dd->pdev, 0x00, &vendor_id); in mtip_check_surprise_removal()
143 dd->sr = true; in mtip_check_surprise_removal()
144 if (dd->disk) in mtip_check_surprise_removal()
145 blk_mark_disk_dead(dd->disk); in mtip_check_surprise_removal()
152 static struct mtip_cmd *mtip_cmd_from_tag(struct driver_data *dd, in mtip_cmd_from_tag() argument
155 return blk_mq_rq_to_pdu(blk_mq_tag_to_rq(dd->tags.tags[0], tag)); in mtip_cmd_from_tag()
167 static int mtip_hba_reset(struct driver_data *dd) in mtip_hba_reset() argument
[all …]
/openbmc/linux/drivers/md/
H A Ddm-dust.c78 static int dust_remove_block(struct dust_device *dd, unsigned long long block) in dust_remove_block() argument
83 spin_lock_irqsave(&dd->dust_lock, flags); in dust_remove_block()
84 bblock = dust_rb_search(&dd->badblocklist, block); in dust_remove_block()
87 if (!dd->quiet_mode) { in dust_remove_block()
91 spin_unlock_irqrestore(&dd->dust_lock, flags); in dust_remove_block()
95 rb_erase(&bblock->node, &dd->badblocklist); in dust_remove_block()
96 dd->badblock_count--; in dust_remove_block()
97 if (!dd->quiet_mode) in dust_remove_block()
100 spin_unlock_irqrestore(&dd->dust_lock, flags); in dust_remove_block()
105 static int dust_add_block(struct dust_device *dd, unsigned long long block, in dust_add_block() argument
[all …]

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