Lines Matching refs:dd
230 static inline u32 qib_read_ureg32(const struct qib_devdata *dd, in qib_read_ureg32() argument
233 if (!dd->kregbase || !(dd->flags & QIB_PRESENT)) in qib_read_ureg32()
236 if (dd->userbase) in qib_read_ureg32()
238 ((char __iomem *)dd->userbase + in qib_read_ureg32()
239 dd->ureg_align * ctxt)); in qib_read_ureg32()
242 (dd->uregbase + in qib_read_ureg32()
243 (char __iomem *)dd->kregbase + in qib_read_ureg32()
244 dd->ureg_align * ctxt)); in qib_read_ureg32()
256 static inline void qib_write_ureg(const struct qib_devdata *dd, in qib_write_ureg() argument
261 if (dd->userbase) in qib_write_ureg()
263 ((char __iomem *) dd->userbase + in qib_write_ureg()
264 dd->ureg_align * ctxt); in qib_write_ureg()
267 (dd->uregbase + in qib_write_ureg()
268 (char __iomem *) dd->kregbase + in qib_write_ureg()
269 dd->ureg_align * ctxt); in qib_write_ureg()
271 if (dd->kregbase && (dd->flags & QIB_PRESENT)) in qib_write_ureg()
282 static inline void qib_write_kreg_ctxt(const struct qib_devdata *dd, in qib_write_kreg_ctxt() argument
286 qib_write_kreg(dd, regno + ctxt, value); in qib_write_kreg_ctxt()
289 static inline void write_7220_creg(const struct qib_devdata *dd, in write_7220_creg() argument
292 if (dd->cspec->cregbase && (dd->flags & QIB_PRESENT)) in write_7220_creg()
293 writeq(value, &dd->cspec->cregbase[regno]); in write_7220_creg()
296 static inline u64 read_7220_creg(const struct qib_devdata *dd, u16 regno) in read_7220_creg() argument
298 if (!dd->cspec->cregbase || !(dd->flags & QIB_PRESENT)) in read_7220_creg()
300 return readq(&dd->cspec->cregbase[regno]); in read_7220_creg()
303 static inline u32 read_7220_creg32(const struct qib_devdata *dd, u16 regno) in read_7220_creg32() argument
305 if (!dd->cspec->cregbase || !(dd->flags & QIB_PRESENT)) in read_7220_creg32()
307 return readl(&dd->cspec->cregbase[regno]); in read_7220_creg32()
754 struct qib_devdata *dd = ppd->dd; in qib_disarm_7220_senderrbufs() local
761 sbuf[0] = qib_read_kreg64(dd, kr_sendbuffererror); in qib_disarm_7220_senderrbufs()
762 sbuf[1] = qib_read_kreg64(dd, kr_sendbuffererror + 1); in qib_disarm_7220_senderrbufs()
763 sbuf[2] = qib_read_kreg64(dd, kr_sendbuffererror + 2); in qib_disarm_7220_senderrbufs()
766 qib_disarm_piobufs_set(dd, sbuf, in qib_disarm_7220_senderrbufs()
767 dd->piobcnt2k + dd->piobcnt4k); in qib_disarm_7220_senderrbufs()
770 static void qib_7220_txe_recover(struct qib_devdata *dd) in qib_7220_txe_recover() argument
772 qib_devinfo(dd->pcidev, "Recovering from TXE PIO parity error\n"); in qib_7220_txe_recover()
773 qib_disarm_7220_senderrbufs(dd->pport); in qib_7220_txe_recover()
781 struct qib_devdata *dd = ppd->dd; in qib_7220_sdma_sendctrl() local
800 spin_lock(&dd->sendctrl_lock); in qib_7220_sdma_sendctrl()
802 dd->sendctrl |= set_sendctrl; in qib_7220_sdma_sendctrl()
803 dd->sendctrl &= ~clr_sendctrl; in qib_7220_sdma_sendctrl()
805 qib_write_kreg(dd, kr_sendctrl, dd->sendctrl); in qib_7220_sdma_sendctrl()
806 qib_write_kreg(dd, kr_scratch, 0); in qib_7220_sdma_sendctrl()
808 spin_unlock(&dd->sendctrl_lock); in qib_7220_sdma_sendctrl()
862 ppd->dd->upd_pio_shadow = 1; /* update our idea of what's busy */ in qib_7220_sdma_hw_clean_up()
872 qib_write_kreg(ppd->dd, kr_senddmalengen, ppd->sdma_descq_cnt); in qib_sdma_7220_setlengen()
873 qib_write_kreg(ppd->dd, kr_senddmalengen, in qib_sdma_7220_setlengen()
900 struct qib_devdata *dd = ppd->dd; in sdma_7220_errors() local
905 msg = dd->cspec->sdmamsgbuf; in sdma_7220_errors()
907 sizeof(dd->cspec->sdmamsgbuf)); in sdma_7220_errors()
913 sbuf[0] = qib_read_kreg64(dd, kr_sendbuffererror); in sdma_7220_errors()
914 sbuf[1] = qib_read_kreg64(dd, kr_sendbuffererror + 1); in sdma_7220_errors()
915 sbuf[2] = qib_read_kreg64(dd, kr_sendbuffererror + 2); in sdma_7220_errors()
917 qib_dev_err(ppd->dd, in sdma_7220_errors()
919 ppd->dd->unit, ppd->port, sbuf[2], sbuf[1], in sdma_7220_errors()
924 qib_dev_err(dd, "IB%u:%u SDmaUnexpData\n", ppd->dd->unit, in sdma_7220_errors()
970 static int qib_decode_7220_err(struct qib_devdata *dd, char *buf, size_t blen, in qib_decode_7220_err() argument
1038 qib_decode_7220_sdma_errs(dd->pport, err, buf, blen); in qib_decode_7220_err()
1094 static void handle_7220_errors(struct qib_devdata *dd, u64 errs) in handle_7220_errors() argument
1099 struct qib_pportdata *ppd = dd->pport; in handle_7220_errors()
1103 errs &= dd->cspec->errormask; in handle_7220_errors()
1104 msg = dd->cspec->emsgbuf; in handle_7220_errors()
1108 qib_7220_handle_hwerrors(dd, msg, sizeof(dd->cspec->emsgbuf)); in handle_7220_errors()
1114 qib_dev_err(dd, in handle_7220_errors()
1143 qib_write_kreg(dd, kr_errclear, errs); in handle_7220_errors()
1158 qib_decode_7220_err(dd, msg, sizeof(dd->cspec->emsgbuf), errs & ~mask); in handle_7220_errors()
1170 ibcs = qib_read_kreg64(dd, kr_ibcstatus); in handle_7220_errors()
1195 qib_dev_err(dd, in handle_7220_errors()
1197 dd->flags &= ~QIB_INITTED; /* needs re-init */ in handle_7220_errors()
1199 *dd->devstatusp |= QIB_STATUS_HWERROR; in handle_7220_errors()
1200 *dd->pport->statusp &= ~QIB_STATUS_IB_CONF; in handle_7220_errors()
1204 qib_dev_porterr(dd, ppd->port, "%s error\n", msg); in handle_7220_errors()
1217 qib_handle_urcv(dd, ~0U); in handle_7220_errors()
1228 static void qib_7220_set_intr_state(struct qib_devdata *dd, u32 enable) in qib_7220_set_intr_state() argument
1231 if (dd->flags & QIB_BADINTR) in qib_7220_set_intr_state()
1233 qib_write_kreg(dd, kr_intmask, ~0ULL); in qib_7220_set_intr_state()
1235 qib_write_kreg(dd, kr_intclear, 0ULL); in qib_7220_set_intr_state()
1237 qib_write_kreg(dd, kr_intmask, 0ULL); in qib_7220_set_intr_state()
1255 static void qib_7220_clear_freeze(struct qib_devdata *dd) in qib_7220_clear_freeze() argument
1258 qib_write_kreg(dd, kr_errmask, 0ULL); in qib_7220_clear_freeze()
1261 qib_7220_set_intr_state(dd, 0); in qib_7220_clear_freeze()
1263 qib_cancel_sends(dd->pport); in qib_7220_clear_freeze()
1266 qib_write_kreg(dd, kr_control, dd->control); in qib_7220_clear_freeze()
1267 qib_read_kreg32(dd, kr_scratch); in qib_7220_clear_freeze()
1270 qib_force_pio_avail_update(dd); in qib_7220_clear_freeze()
1278 qib_write_kreg(dd, kr_hwerrclear, 0ULL); in qib_7220_clear_freeze()
1279 qib_write_kreg(dd, kr_errclear, E_SPKT_ERRS_IGNORE); in qib_7220_clear_freeze()
1280 qib_write_kreg(dd, kr_errmask, dd->cspec->errormask); in qib_7220_clear_freeze()
1281 qib_7220_set_intr_state(dd, 1); in qib_7220_clear_freeze()
1295 static void qib_7220_handle_hwerrors(struct qib_devdata *dd, char *msg, in qib_7220_handle_hwerrors() argument
1303 hwerrs = qib_read_kreg64(dd, kr_hwerrstatus); in qib_7220_handle_hwerrors()
1307 qib_dev_err(dd, in qib_7220_handle_hwerrors()
1320 qib_write_kreg(dd, kr_hwerrclear, in qib_7220_handle_hwerrors()
1323 hwerrs &= dd->cspec->hwerrmask; in qib_7220_handle_hwerrors()
1327 qib_devinfo(dd->pcidev, in qib_7220_handle_hwerrors()
1332 qib_dev_err(dd, in qib_7220_handle_hwerrors()
1337 qib_sd7220_clr_ibpar(dd); in qib_7220_handle_hwerrors()
1339 ctrl = qib_read_kreg32(dd, kr_control); in qib_7220_handle_hwerrors()
1340 if ((ctrl & QLOGIC_IB_C_FREEZEMODE) && !dd->diag_client) { in qib_7220_handle_hwerrors()
1347 qib_7220_txe_recover(dd); in qib_7220_handle_hwerrors()
1354 qib_7220_clear_freeze(dd); in qib_7220_handle_hwerrors()
1365 dd->cspec->hwerrmask &= ~HWE_MASK(PowerOnBISTFailed); in qib_7220_handle_hwerrors()
1366 qib_write_kreg(dd, kr_hwerrmask, dd->cspec->hwerrmask); in qib_7220_handle_hwerrors()
1372 bitsmsg = dd->cspec->bitsmsgbuf; in qib_7220_handle_hwerrors()
1378 snprintf(bitsmsg, sizeof(dd->cspec->bitsmsgbuf), in qib_7220_handle_hwerrors()
1388 snprintf(bitsmsg, sizeof(dd->cspec->bitsmsgbuf), in qib_7220_handle_hwerrors()
1393 dd->cspec->hwerrmask &= ~(hwerrs & _QIB_PLL_FAIL); in qib_7220_handle_hwerrors()
1394 qib_write_kreg(dd, kr_hwerrmask, dd->cspec->hwerrmask); in qib_7220_handle_hwerrors()
1402 dd->cspec->hwerrmask &= ~QLOGIC_IB_HWE_SERDESPLLFAILED; in qib_7220_handle_hwerrors()
1403 qib_write_kreg(dd, kr_hwerrmask, dd->cspec->hwerrmask); in qib_7220_handle_hwerrors()
1406 qib_dev_err(dd, "%s hardware error\n", msg); in qib_7220_handle_hwerrors()
1408 if (isfatal && !dd->diag_client) { in qib_7220_handle_hwerrors()
1409 qib_dev_err(dd, in qib_7220_handle_hwerrors()
1411 dd->serial); in qib_7220_handle_hwerrors()
1416 if (dd->freezemsg) in qib_7220_handle_hwerrors()
1417 snprintf(dd->freezemsg, dd->freezelen, in qib_7220_handle_hwerrors()
1419 qib_disable_after_error(dd); in qib_7220_handle_hwerrors()
1434 static void qib_7220_init_hwerrors(struct qib_devdata *dd) in qib_7220_init_hwerrors() argument
1439 extsval = qib_read_kreg64(dd, kr_extstatus); in qib_7220_init_hwerrors()
1443 qib_dev_err(dd, "MemBIST did not complete!\n"); in qib_7220_init_hwerrors()
1445 qib_devinfo(dd->pcidev, "MemBIST is disabled.\n"); in qib_7220_init_hwerrors()
1450 dd->cspec->hwerrmask = val; in qib_7220_init_hwerrors()
1452 qib_write_kreg(dd, kr_hwerrclear, ~HWE_MASK(PowerOnBISTFailed)); in qib_7220_init_hwerrors()
1453 qib_write_kreg(dd, kr_hwerrmask, dd->cspec->hwerrmask); in qib_7220_init_hwerrors()
1456 qib_write_kreg(dd, kr_errclear, ~0ULL); in qib_7220_init_hwerrors()
1458 qib_write_kreg(dd, kr_errmask, ~0ULL); in qib_7220_init_hwerrors()
1459 dd->cspec->errormask = qib_read_kreg64(dd, kr_errmask); in qib_7220_init_hwerrors()
1461 qib_write_kreg(dd, kr_intclear, ~0ULL); in qib_7220_init_hwerrors()
1470 static void qib_set_7220_armlaunch(struct qib_devdata *dd, u32 enable) in qib_set_7220_armlaunch() argument
1473 qib_write_kreg(dd, kr_errclear, ERR_MASK(SendPioArmLaunchErr)); in qib_set_7220_armlaunch()
1474 dd->cspec->errormask |= ERR_MASK(SendPioArmLaunchErr); in qib_set_7220_armlaunch()
1476 dd->cspec->errormask &= ~ERR_MASK(SendPioArmLaunchErr); in qib_set_7220_armlaunch()
1477 qib_write_kreg(dd, kr_errmask, dd->cspec->errormask); in qib_set_7220_armlaunch()
1489 struct qib_devdata *dd = ppd->dd; in qib_set_ib_7220_lstate() local
1514 qib_write_kreg(dd, kr_ibcctrl, ppd->cpspec->ibcctrl | mod_wd); in qib_set_ib_7220_lstate()
1516 qib_write_kreg(dd, kr_scratch, 0); in qib_set_ib_7220_lstate()
1532 struct qib_devdata *dd = ppd->dd; in qib_7220_bringup_serdes() local
1537 dd->control &= ~QLOGIC_IB_C_LINKENABLE; in qib_7220_bringup_serdes()
1538 qib_write_kreg(dd, kr_control, 0ULL); in qib_7220_bringup_serdes()
1542 ppd->cpspec->ibsymsnap = read_7220_creg32(dd, cr_ibsymbolerr); in qib_7220_bringup_serdes()
1544 read_7220_creg32(dd, cr_iblinkerrrecov); in qib_7220_bringup_serdes()
1571 qib_write_kreg(dd, kr_ibcctrl, val); in qib_7220_bringup_serdes()
1575 ppd->cpspec->ibcddrctrl = qib_read_kreg64(dd, kr_ibcddrctrl); in qib_7220_bringup_serdes()
1604 qib_write_kreg(dd, kr_scratch, 0); in qib_7220_bringup_serdes()
1606 qib_write_kreg(dd, kr_ibcddrctrl, ppd->cpspec->ibcddrctrl); in qib_7220_bringup_serdes()
1607 qib_write_kreg(dd, kr_scratch, 0); in qib_7220_bringup_serdes()
1609 qib_write_kreg(dd, kr_ncmodectrl, 0Ull); in qib_7220_bringup_serdes()
1610 qib_write_kreg(dd, kr_scratch, 0); in qib_7220_bringup_serdes()
1612 ret = qib_sd7220_init(dd); in qib_7220_bringup_serdes()
1614 val = qib_read_kreg64(dd, kr_xgxs_cfg); in qib_7220_bringup_serdes()
1618 qib_write_kreg(dd, kr_xgxs_cfg, val); in qib_7220_bringup_serdes()
1619 qib_read_kreg32(dd, kr_scratch); in qib_7220_bringup_serdes()
1624 qib_write_kreg(dd, kr_xgxs_cfg, val); in qib_7220_bringup_serdes()
1628 ppd->guid = dd->base_guid; in qib_7220_bringup_serdes()
1631 qib_write_kreg(dd, kr_hrtbt_guid, guid); in qib_7220_bringup_serdes()
1633 dd->control |= QLOGIC_IB_C_LINKENABLE; in qib_7220_bringup_serdes()
1634 qib_write_kreg(dd, kr_control, dd->control); in qib_7220_bringup_serdes()
1637 qib_write_kreg(dd, kr_scratch, 0); in qib_7220_bringup_serdes()
1649 struct qib_devdata *dd = ppd->dd; in qib_7220_quiet_serdes() local
1653 dd->control &= ~QLOGIC_IB_C_LINKENABLE; in qib_7220_quiet_serdes()
1654 qib_write_kreg(dd, kr_control, in qib_7220_quiet_serdes()
1655 dd->control | QLOGIC_IB_C_FREEZEMODE); in qib_7220_quiet_serdes()
1666 diagc = qib_read_kreg64(dd, kr_hwdiagctrl); in qib_7220_quiet_serdes()
1667 qib_write_kreg(dd, kr_hwdiagctrl, in qib_7220_quiet_serdes()
1671 val = read_7220_creg32(dd, cr_ibsymbolerr); in qib_7220_quiet_serdes()
1675 write_7220_creg(dd, cr_ibsymbolerr, val); in qib_7220_quiet_serdes()
1678 val = read_7220_creg32(dd, cr_iblinkerrrecov); in qib_7220_quiet_serdes()
1682 write_7220_creg(dd, cr_iblinkerrrecov, val); in qib_7220_quiet_serdes()
1686 qib_write_kreg(dd, kr_hwdiagctrl, diagc); in qib_7220_quiet_serdes()
1696 shutdown_7220_relock_poll(ppd->dd); in qib_7220_quiet_serdes()
1697 val = qib_read_kreg64(ppd->dd, kr_xgxs_cfg); in qib_7220_quiet_serdes()
1699 qib_write_kreg(ppd->dd, kr_xgxs_cfg, val); in qib_7220_quiet_serdes()
1727 struct qib_devdata *dd = ppd->dd; in qib_setup_7220_setextled() local
1735 if (dd->diag_client) in qib_setup_7220_setextled()
1744 val = qib_read_kreg64(dd, kr_ibcstatus); in qib_setup_7220_setextled()
1752 spin_lock_irqsave(&dd->cspec->gpio_lock, flags); in qib_setup_7220_setextled()
1753 extctl = dd->cspec->extctrl & ~(SYM_MASK(EXTCtrl, LEDPriPortGreenOn) | in qib_setup_7220_setextled()
1767 dd->cspec->extctrl = extctl; in qib_setup_7220_setextled()
1768 qib_write_kreg(dd, kr_extctrl, extctl); in qib_setup_7220_setextled()
1769 spin_unlock_irqrestore(&dd->cspec->gpio_lock, flags); in qib_setup_7220_setextled()
1772 qib_write_kreg(dd, kr_rcvpktledcnt, ledblink); in qib_setup_7220_setextled()
1782 static void qib_setup_7220_cleanup(struct qib_devdata *dd) in qib_setup_7220_cleanup() argument
1784 qib_free_irq(dd); in qib_setup_7220_cleanup()
1785 kfree(dd->cspec->cntrs); in qib_setup_7220_cleanup()
1786 kfree(dd->cspec->portcntrs); in qib_setup_7220_cleanup()
1828 static void qib_wantpiobuf_7220_intr(struct qib_devdata *dd, u32 needint) in qib_wantpiobuf_7220_intr() argument
1832 spin_lock_irqsave(&dd->sendctrl_lock, flags); in qib_wantpiobuf_7220_intr()
1834 if (!(dd->sendctrl & SYM_MASK(SendCtrl, SendBufAvailUpd))) in qib_wantpiobuf_7220_intr()
1841 qib_write_kreg(dd, kr_sendctrl, dd->sendctrl & in qib_wantpiobuf_7220_intr()
1843 qib_write_kreg(dd, kr_scratch, 0ULL); in qib_wantpiobuf_7220_intr()
1844 dd->sendctrl |= SYM_MASK(SendCtrl, SendIntBufAvail); in qib_wantpiobuf_7220_intr()
1846 dd->sendctrl &= ~SYM_MASK(SendCtrl, SendIntBufAvail); in qib_wantpiobuf_7220_intr()
1847 qib_write_kreg(dd, kr_sendctrl, dd->sendctrl); in qib_wantpiobuf_7220_intr()
1848 qib_write_kreg(dd, kr_scratch, 0ULL); in qib_wantpiobuf_7220_intr()
1850 spin_unlock_irqrestore(&dd->sendctrl_lock, flags); in qib_wantpiobuf_7220_intr()
1857 static noinline void unlikely_7220_intr(struct qib_devdata *dd, u64 istat) in unlikely_7220_intr() argument
1860 qib_dev_err(dd, in unlikely_7220_intr()
1874 gpiostatus = qib_read_kreg32(dd, kr_gpio_status); in unlikely_7220_intr()
1882 qib_write_kreg(dd, kr_gpio_clear, gpiostatus); in unlikely_7220_intr()
1885 const u32 mask = qib_read_kreg32(dd, kr_gpio_mask); in unlikely_7220_intr()
1899 dd->cspec->gpio_mask &= ~gpio_irq; in unlikely_7220_intr()
1900 qib_write_kreg(dd, kr_gpio_mask, dd->cspec->gpio_mask); in unlikely_7220_intr()
1908 estat = qib_read_kreg64(dd, kr_errstatus); in unlikely_7220_intr()
1910 qib_devinfo(dd->pcidev, in unlikely_7220_intr()
1914 handle_7220_errors(dd, estat); in unlikely_7220_intr()
1920 struct qib_devdata *dd = data; in qib_7220intr() local
1927 if ((dd->flags & (QIB_PRESENT | QIB_BADINTR)) != QIB_PRESENT) { in qib_7220intr()
1938 istat = qib_read_kreg64(dd, kr_intstatus); in qib_7220intr()
1945 qib_bad_intrstatus(dd); in qib_7220intr()
1951 this_cpu_inc(*dd->int_counter); in qib_7220intr()
1954 unlikely_7220_intr(dd, istat); in qib_7220intr()
1962 qib_write_kreg(dd, kr_intclear, istat); in qib_7220intr()
1975 for (i = 0; i < dd->first_user_ctxt; i++) { in qib_7220intr()
1978 qib_kreceive(dd->rcd[i], NULL, NULL); in qib_7220intr()
1986 qib_handle_urcv(dd, ctxtrbits); in qib_7220intr()
1992 sdma_7220_intr(dd->pport, istat); in qib_7220intr()
1994 if ((istat & QLOGIC_IB_I_SPIOBUFAVAIL) && (dd->flags & QIB_INITTED)) in qib_7220intr()
1995 qib_ib_piobufavail(dd); in qib_7220intr()
2010 static void qib_setup_7220_interrupt(struct qib_devdata *dd) in qib_setup_7220_interrupt() argument
2014 ret = pci_request_irq(dd->pcidev, 0, qib_7220intr, NULL, dd, in qib_setup_7220_interrupt()
2017 qib_dev_err(dd, "Couldn't setup %s interrupt (irq=%d): %d\n", in qib_setup_7220_interrupt()
2018 dd->pcidev->msi_enabled ? "MSI" : "INTx", in qib_setup_7220_interrupt()
2019 pci_irq_vector(dd->pcidev, 0), ret); in qib_setup_7220_interrupt()
2028 static void qib_7220_boardname(struct qib_devdata *dd) in qib_7220_boardname() argument
2032 boardid = SYM_FIELD(dd->revision, Revision, in qib_7220_boardname()
2037 dd->boardname = "InfiniPath_QLE7240"; in qib_7220_boardname()
2040 dd->boardname = "InfiniPath_QLE7280"; in qib_7220_boardname()
2043 qib_dev_err(dd, "Unknown 7220 board with ID %u\n", boardid); in qib_7220_boardname()
2044 dd->boardname = "Unknown_InfiniPath_7220"; in qib_7220_boardname()
2048 if (dd->majrev != 5 || !dd->minrev || dd->minrev > 2) in qib_7220_boardname()
2049 qib_dev_err(dd, in qib_7220_boardname()
2051 dd->majrev, dd->minrev); in qib_7220_boardname()
2053 snprintf(dd->boardversion, sizeof(dd->boardversion), in qib_7220_boardname()
2055 QIB_CHIP_VERS_MAJ, QIB_CHIP_VERS_MIN, dd->boardname, in qib_7220_boardname()
2056 (unsigned int)SYM_FIELD(dd->revision, Revision_R, Arch), in qib_7220_boardname()
2057 dd->majrev, dd->minrev, in qib_7220_boardname()
2058 (unsigned int)SYM_FIELD(dd->revision, Revision_R, SW)); in qib_7220_boardname()
2065 static int qib_setup_7220_reset(struct qib_devdata *dd) in qib_setup_7220_reset() argument
2074 qib_pcie_getcmd(dd, &cmdval, &int_line, &clinesz); in qib_setup_7220_reset()
2077 qib_dev_err(dd, "Resetting InfiniPath unit %u\n", dd->unit); in qib_setup_7220_reset()
2080 qib_7220_set_intr_state(dd, 0); in qib_setup_7220_reset()
2082 dd->pport->cpspec->ibdeltainprog = 0; in qib_setup_7220_reset()
2083 dd->pport->cpspec->ibsymdelta = 0; in qib_setup_7220_reset()
2084 dd->pport->cpspec->iblnkerrdelta = 0; in qib_setup_7220_reset()
2091 dd->flags &= ~(QIB_INITTED | QIB_PRESENT); in qib_setup_7220_reset()
2093 dd->z_int_counter = qib_int_counter(dd); in qib_setup_7220_reset()
2094 val = dd->control | QLOGIC_IB_C_RESET; in qib_setup_7220_reset()
2095 writeq(val, &dd->kregbase[kr_control]); in qib_setup_7220_reset()
2106 qib_pcie_reenable(dd, cmdval, int_line, clinesz); in qib_setup_7220_reset()
2112 val = readq(&dd->kregbase[kr_revision]); in qib_setup_7220_reset()
2113 if (val == dd->revision) { in qib_setup_7220_reset()
2114 dd->flags |= QIB_PRESENT; /* it's back */ in qib_setup_7220_reset()
2115 ret = qib_reinit_intr(dd); in qib_setup_7220_reset()
2123 if (qib_pcie_params(dd, dd->lbus_width, NULL)) in qib_setup_7220_reset()
2124 qib_dev_err(dd, in qib_setup_7220_reset()
2128 qib_write_kreg(dd, kr_control, 0ULL); in qib_setup_7220_reset()
2131 qib_7220_init_hwerrors(dd); in qib_setup_7220_reset()
2134 if (dd->pport->cpspec->ibcddrctrl & IBA7220_IBC_IBTA_1_2_MASK) in qib_setup_7220_reset()
2135 dd->cspec->presets_needed = 1; in qib_setup_7220_reset()
2136 spin_lock_irqsave(&dd->pport->lflags_lock, flags); in qib_setup_7220_reset()
2137 dd->pport->lflags |= QIBL_IB_FORCE_NOTIFY; in qib_setup_7220_reset()
2138 dd->pport->lflags &= ~QIBL_IB_AUTONEG_FAILED; in qib_setup_7220_reset()
2139 spin_unlock_irqrestore(&dd->pport->lflags_lock, flags); in qib_setup_7220_reset()
2152 static void qib_7220_put_tid(struct qib_devdata *dd, u64 __iomem *tidptr, in qib_7220_put_tid() argument
2155 if (pa != dd->tidinvalid) { in qib_7220_put_tid()
2160 qib_dev_err(dd, "Physaddr %lx not 2KB aligned!\n", in qib_7220_put_tid()
2165 qib_dev_err(dd, in qib_7220_put_tid()
2172 chippa |= dd->tidtemplate; in qib_7220_put_tid()
2190 static void qib_7220_clear_tids(struct qib_devdata *dd, in qib_7220_clear_tids() argument
2198 if (!dd->kregbase || !rcd) in qib_7220_clear_tids()
2203 tidinv = dd->tidinvalid; in qib_7220_clear_tids()
2205 ((char __iomem *)(dd->kregbase) + in qib_7220_clear_tids()
2206 dd->rcvtidbase + in qib_7220_clear_tids()
2207 ctxt * dd->rcvtidcnt * sizeof(*tidbase)); in qib_7220_clear_tids()
2209 for (i = 0; i < dd->rcvtidcnt; i++) in qib_7220_clear_tids()
2210 qib_7220_put_tid(dd, &tidbase[i], RCVHQ_RCV_TYPE_EXPECTED, in qib_7220_clear_tids()
2214 ((char __iomem *)(dd->kregbase) + in qib_7220_clear_tids()
2215 dd->rcvegrbase + in qib_7220_clear_tids()
2219 qib_7220_put_tid(dd, &tidbase[i], RCVHQ_RCV_TYPE_EAGER, in qib_7220_clear_tids()
2229 static void qib_7220_tidtemplate(struct qib_devdata *dd) in qib_7220_tidtemplate() argument
2231 if (dd->rcvegrbufsize == 2048) in qib_7220_tidtemplate()
2232 dd->tidtemplate = IBA7220_TID_SZ_2K; in qib_7220_tidtemplate()
2233 else if (dd->rcvegrbufsize == 4096) in qib_7220_tidtemplate()
2234 dd->tidtemplate = IBA7220_TID_SZ_4K; in qib_7220_tidtemplate()
2235 dd->tidinvalid = 0; in qib_7220_tidtemplate()
2252 if (rcd->dd->flags & QIB_USE_SPCL_TRIG) in qib_7220_get_base_info()
2259 qib_7220_get_msgheader(struct qib_devdata *dd, __le32 *rhf_addr) in qib_7220_get_msgheader() argument
2264 (rhf_addr - dd->rhf_offset + offset); in qib_7220_get_msgheader()
2267 static void qib_7220_config_ctxts(struct qib_devdata *dd) in qib_7220_config_ctxts() argument
2272 nchipctxts = qib_read_kreg32(dd, kr_portcnt); in qib_7220_config_ctxts()
2273 dd->cspec->numctxts = nchipctxts; in qib_7220_config_ctxts()
2275 dd->qpn_mask = 0x3e; in qib_7220_config_ctxts()
2276 dd->first_user_ctxt = qib_n_krcv_queues * dd->num_pports; in qib_7220_config_ctxts()
2277 if (dd->first_user_ctxt > nchipctxts) in qib_7220_config_ctxts()
2278 dd->first_user_ctxt = nchipctxts; in qib_7220_config_ctxts()
2280 dd->first_user_ctxt = dd->num_pports; in qib_7220_config_ctxts()
2281 dd->n_krcv_queues = dd->first_user_ctxt; in qib_7220_config_ctxts()
2284 int nctxts = dd->first_user_ctxt + num_online_cpus(); in qib_7220_config_ctxts()
2287 dd->ctxtcnt = 5; in qib_7220_config_ctxts()
2289 dd->ctxtcnt = 9; in qib_7220_config_ctxts()
2291 dd->ctxtcnt = nchipctxts; in qib_7220_config_ctxts()
2293 dd->ctxtcnt = qib_cfgctxts; in qib_7220_config_ctxts()
2294 if (!dd->ctxtcnt) /* none of the above, set to max */ in qib_7220_config_ctxts()
2295 dd->ctxtcnt = nchipctxts; in qib_7220_config_ctxts()
2302 spin_lock_irqsave(&dd->cspec->rcvmod_lock, flags); in qib_7220_config_ctxts()
2303 if (dd->ctxtcnt > 9) in qib_7220_config_ctxts()
2304 dd->rcvctrl |= 2ULL << IBA7220_R_CTXTCFG_SHIFT; in qib_7220_config_ctxts()
2305 else if (dd->ctxtcnt > 5) in qib_7220_config_ctxts()
2306 dd->rcvctrl |= 1ULL << IBA7220_R_CTXTCFG_SHIFT; in qib_7220_config_ctxts()
2308 if (dd->qpn_mask) in qib_7220_config_ctxts()
2309 dd->rcvctrl |= 1ULL << QIB_7220_RcvCtrl_RcvQPMapEnable_LSB; in qib_7220_config_ctxts()
2310 qib_write_kreg(dd, kr_rcvctrl, dd->rcvctrl); in qib_7220_config_ctxts()
2311 spin_unlock_irqrestore(&dd->cspec->rcvmod_lock, flags); in qib_7220_config_ctxts()
2314 dd->cspec->rcvegrcnt = qib_read_kreg32(dd, kr_rcvegrcnt); in qib_7220_config_ctxts()
2315 dd->rcvhdrcnt = max(dd->cspec->rcvegrcnt, IBA7220_KRCVEGRCNT); in qib_7220_config_ctxts()
2351 ret = qib_read_kreg64(ppd->dd, kr_ibcddrstatus) in qib_7220_get_ib_cfg()
2408 struct qib_devdata *dd = ppd->dd; in qib_7220_set_ib_cfg() local
2462 dd->cspec->presets_needed = 1; in qib_7220_set_ib_cfg()
2508 qib_write_kreg(dd, kr_ibcctrl, ppd->cpspec->ibcctrl); in qib_7220_set_ib_cfg()
2509 qib_write_kreg(dd, kr_scratch, 0); in qib_7220_set_ib_cfg()
2521 qib_write_kreg(dd, kr_ibcctrl, ppd->cpspec->ibcctrl); in qib_7220_set_ib_cfg()
2522 qib_write_kreg(dd, kr_scratch, 0); in qib_7220_set_ib_cfg()
2530 qib_write_kreg(dd, kr_partitionkey, maskr); in qib_7220_set_ib_cfg()
2541 qib_write_kreg(dd, kr_ibcctrl, ppd->cpspec->ibcctrl); in qib_7220_set_ib_cfg()
2542 qib_write_kreg(dd, kr_scratch, 0); in qib_7220_set_ib_cfg()
2556 qib_write_kreg(dd, kr_ibcctrl, ppd->cpspec->ibcctrl); in qib_7220_set_ib_cfg()
2557 qib_write_kreg(dd, kr_scratch, 0); in qib_7220_set_ib_cfg()
2568 read_7220_creg32(dd, cr_ibsymbolerr); in qib_7220_set_ib_cfg()
2570 read_7220_creg32(dd, cr_iblinkerrrecov); in qib_7220_set_ib_cfg()
2584 qib_dev_err(dd, "bad linkcmd req 0x%x\n", val >> 16); in qib_7220_set_ib_cfg()
2615 qib_dev_err(dd, "bad linkinitcmd req 0x%x\n", in qib_7220_set_ib_cfg()
2635 qib_write_kreg(dd, kr_ibcddrctrl, in qib_7220_set_ib_cfg()
2637 qib_write_kreg(dd, kr_scratch, 0); in qib_7220_set_ib_cfg()
2659 qib_write_kreg(dd, kr_ibcddrctrl, ppd->cpspec->ibcddrctrl); in qib_7220_set_ib_cfg()
2660 qib_write_kreg(dd, kr_scratch, 0); in qib_7220_set_ib_cfg()
2678 qib_devinfo(ppd->dd->pcidev, "Enabling IB%u:%u IBC loopback\n", in qib_7220_set_loopback()
2679 ppd->dd->unit, ppd->port); in qib_7220_set_loopback()
2684 qib_devinfo(ppd->dd->pcidev, in qib_7220_set_loopback()
2686 ppd->dd->unit, ppd->port); in qib_7220_set_loopback()
2690 qib_write_kreg(ppd->dd, kr_ibcctrl, ppd->cpspec->ibcctrl); in qib_7220_set_loopback()
2694 qib_write_kreg(ppd->dd, kr_ibcddrctrl, in qib_7220_set_loopback()
2696 qib_write_kreg(ppd->dd, kr_scratch, 0); in qib_7220_set_loopback()
2705 qib_write_ureg(rcd->dd, ur_rcvegrindexhead, egrhd, rcd->ctxt); in qib_update_7220_usrhead()
2706 qib_write_ureg(rcd->dd, ur_rcvhdrhead, hd, rcd->ctxt); in qib_update_7220_usrhead()
2713 head = qib_read_ureg32(rcd->dd, ur_rcvhdrhead, rcd->ctxt); in qib_7220_hdrqempty()
2717 tail = qib_read_ureg32(rcd->dd, ur_rcvhdrtail, rcd->ctxt); in qib_7220_hdrqempty()
2731 struct qib_devdata *dd = ppd->dd; in rcvctrl_7220_mod() local
2735 spin_lock_irqsave(&dd->cspec->rcvmod_lock, flags); in rcvctrl_7220_mod()
2737 dd->rcvctrl |= (1ULL << IBA7220_R_TAILUPD_SHIFT); in rcvctrl_7220_mod()
2739 dd->rcvctrl &= ~(1ULL << IBA7220_R_TAILUPD_SHIFT); in rcvctrl_7220_mod()
2741 dd->rcvctrl &= ~(1ULL << IBA7220_R_PKEY_DIS_SHIFT); in rcvctrl_7220_mod()
2743 dd->rcvctrl |= (1ULL << IBA7220_R_PKEY_DIS_SHIFT); in rcvctrl_7220_mod()
2745 mask = (1ULL << dd->ctxtcnt) - 1; in rcvctrl_7220_mod()
2750 dd->rcvctrl |= (mask << SYM_LSB(RcvCtrl, PortEnable)); in rcvctrl_7220_mod()
2751 if (!(dd->flags & QIB_NODMA_RTAIL)) in rcvctrl_7220_mod()
2752 dd->rcvctrl |= 1ULL << IBA7220_R_TAILUPD_SHIFT; in rcvctrl_7220_mod()
2754 qib_write_kreg_ctxt(dd, kr_rcvhdrtailaddr, ctxt, in rcvctrl_7220_mod()
2755 dd->rcd[ctxt]->rcvhdrqtailaddr_phys); in rcvctrl_7220_mod()
2756 qib_write_kreg_ctxt(dd, kr_rcvhdraddr, ctxt, in rcvctrl_7220_mod()
2757 dd->rcd[ctxt]->rcvhdrq_phys); in rcvctrl_7220_mod()
2758 dd->rcd[ctxt]->seq_cnt = 1; in rcvctrl_7220_mod()
2761 dd->rcvctrl &= ~(mask << SYM_LSB(RcvCtrl, PortEnable)); in rcvctrl_7220_mod()
2763 dd->rcvctrl |= (mask << IBA7220_R_INTRAVAIL_SHIFT); in rcvctrl_7220_mod()
2765 dd->rcvctrl &= ~(mask << IBA7220_R_INTRAVAIL_SHIFT); in rcvctrl_7220_mod()
2766 qib_write_kreg(dd, kr_rcvctrl, dd->rcvctrl); in rcvctrl_7220_mod()
2767 if ((op & QIB_RCVCTRL_INTRAVAIL_ENB) && dd->rhdrhead_intr_off) { in rcvctrl_7220_mod()
2769 val = qib_read_ureg32(dd, ur_rcvhdrhead, ctxt) | in rcvctrl_7220_mod()
2770 dd->rhdrhead_intr_off; in rcvctrl_7220_mod()
2771 qib_write_ureg(dd, ur_rcvhdrhead, val, ctxt); in rcvctrl_7220_mod()
2780 val = qib_read_ureg32(dd, ur_rcvegrindextail, ctxt); in rcvctrl_7220_mod()
2781 qib_write_ureg(dd, ur_rcvegrindexhead, val, ctxt); in rcvctrl_7220_mod()
2783 val = qib_read_ureg32(dd, ur_rcvhdrtail, ctxt); in rcvctrl_7220_mod()
2784 dd->rcd[ctxt]->head = val; in rcvctrl_7220_mod()
2786 if (ctxt < dd->first_user_ctxt) in rcvctrl_7220_mod()
2787 val |= dd->rhdrhead_intr_off; in rcvctrl_7220_mod()
2788 qib_write_ureg(dd, ur_rcvhdrhead, val, ctxt); in rcvctrl_7220_mod()
2792 qib_write_kreg_ctxt(dd, kr_rcvhdrtailaddr, ctxt, 0); in rcvctrl_7220_mod()
2793 qib_write_kreg_ctxt(dd, kr_rcvhdraddr, ctxt, 0); in rcvctrl_7220_mod()
2797 for (i = 0; i < dd->cfgctxts; i++) { in rcvctrl_7220_mod()
2798 qib_write_kreg_ctxt(dd, kr_rcvhdrtailaddr, in rcvctrl_7220_mod()
2800 qib_write_kreg_ctxt(dd, kr_rcvhdraddr, i, 0); in rcvctrl_7220_mod()
2804 spin_unlock_irqrestore(&dd->cspec->rcvmod_lock, flags); in rcvctrl_7220_mod()
2817 struct qib_devdata *dd = ppd->dd; in sendctrl_7220_mod() local
2821 spin_lock_irqsave(&dd->sendctrl_lock, flags); in sendctrl_7220_mod()
2825 dd->sendctrl = 0; in sendctrl_7220_mod()
2827 dd->sendctrl &= ~SYM_MASK(SendCtrl, SPioEnable); in sendctrl_7220_mod()
2829 dd->sendctrl |= SYM_MASK(SendCtrl, SPioEnable); in sendctrl_7220_mod()
2830 if (dd->flags & QIB_USE_SPCL_TRIG) in sendctrl_7220_mod()
2831 dd->sendctrl |= SYM_MASK(SendCtrl, in sendctrl_7220_mod()
2835 dd->sendctrl &= ~SYM_MASK(SendCtrl, SendBufAvailUpd); in sendctrl_7220_mod()
2837 dd->sendctrl |= SYM_MASK(SendCtrl, SendBufAvailUpd); in sendctrl_7220_mod()
2842 tmp_dd_sendctrl = dd->sendctrl; in sendctrl_7220_mod()
2847 last = dd->piobcnt2k + dd->piobcnt4k; in sendctrl_7220_mod()
2852 qib_write_kreg(dd, kr_sendctrl, in sendctrl_7220_mod()
2855 qib_write_kreg(dd, kr_scratch, 0); in sendctrl_7220_mod()
2859 tmp_dd_sendctrl = dd->sendctrl; in sendctrl_7220_mod()
2868 (dd->sendctrl & SYM_MASK(SendCtrl, SendBufAvailUpd))) in sendctrl_7220_mod()
2871 qib_write_kreg(dd, kr_sendctrl, tmp_dd_sendctrl); in sendctrl_7220_mod()
2872 qib_write_kreg(dd, kr_scratch, 0); in sendctrl_7220_mod()
2875 qib_write_kreg(dd, kr_sendctrl, dd->sendctrl); in sendctrl_7220_mod()
2876 qib_write_kreg(dd, kr_scratch, 0); in sendctrl_7220_mod()
2879 spin_unlock_irqrestore(&dd->sendctrl_lock, flags); in sendctrl_7220_mod()
2889 v = qib_read_kreg32(dd, kr_scratch); in sendctrl_7220_mod()
2890 qib_write_kreg(dd, kr_scratch, v); in sendctrl_7220_mod()
2891 v = qib_read_kreg32(dd, kr_scratch); in sendctrl_7220_mod()
2892 qib_write_kreg(dd, kr_scratch, v); in sendctrl_7220_mod()
2893 qib_read_kreg32(dd, kr_scratch); in sendctrl_7220_mod()
2905 struct qib_devdata *dd = ppd->dd; in qib_portcntr_7220() local
2946 qib_devinfo(ppd->dd->pcidev, in qib_portcntr_7220()
2956 for (i = 0; i < dd->first_user_ctxt; i++) in qib_portcntr_7220()
2957 ret += read_7220_creg32(dd, cr_portovfl + i); in qib_portcntr_7220()
2968 ret = read_7220_creg(dd, creg); in qib_portcntr_7220()
2970 ret = read_7220_creg32(dd, creg); in qib_portcntr_7220()
2972 if (dd->pport->cpspec->ibdeltainprog) in qib_portcntr_7220()
2974 ret -= dd->pport->cpspec->ibsymdelta; in qib_portcntr_7220()
2976 if (dd->pport->cpspec->ibdeltainprog) in qib_portcntr_7220()
2978 ret -= dd->pport->cpspec->iblnkerrdelta; in qib_portcntr_7220()
3127 static void init_7220_cntrnames(struct qib_devdata *dd) in init_7220_cntrnames() argument
3132 for (i = 0, s = (char *)cntr7220names; s && j <= dd->cfgctxts; in init_7220_cntrnames()
3141 dd->cspec->ncntrs = i; in init_7220_cntrnames()
3144 dd->cspec->cntrnamelen = sizeof(cntr7220names) - 1; in init_7220_cntrnames()
3146 dd->cspec->cntrnamelen = 1 + s - cntr7220names; in init_7220_cntrnames()
3147 dd->cspec->cntrs = kmalloc_array(dd->cspec->ncntrs, sizeof(u64), in init_7220_cntrnames()
3152 dd->cspec->nportcntrs = i - 1; in init_7220_cntrnames()
3153 dd->cspec->portcntrnamelen = sizeof(portcntr7220names) - 1; in init_7220_cntrnames()
3154 dd->cspec->portcntrs = kmalloc_array(dd->cspec->nportcntrs, in init_7220_cntrnames()
3159 static u32 qib_read_7220cntrs(struct qib_devdata *dd, loff_t pos, char **namep, in qib_read_7220cntrs() argument
3164 if (!dd->cspec->cntrs) { in qib_read_7220cntrs()
3171 ret = dd->cspec->cntrnamelen; in qib_read_7220cntrs()
3175 u64 *cntr = dd->cspec->cntrs; in qib_read_7220cntrs()
3178 ret = dd->cspec->ncntrs * sizeof(u64); in qib_read_7220cntrs()
3186 for (i = 0; i < dd->cspec->ncntrs; i++) in qib_read_7220cntrs()
3187 *cntr++ = read_7220_creg32(dd, cntr7220indices[i]); in qib_read_7220cntrs()
3193 static u32 qib_read_7220portcntrs(struct qib_devdata *dd, loff_t pos, u32 port, in qib_read_7220portcntrs() argument
3198 if (!dd->cspec->portcntrs) { in qib_read_7220portcntrs()
3204 ret = dd->cspec->portcntrnamelen; in qib_read_7220portcntrs()
3208 u64 *cntr = dd->cspec->portcntrs; in qib_read_7220portcntrs()
3209 struct qib_pportdata *ppd = &dd->pport[port]; in qib_read_7220portcntrs()
3212 ret = dd->cspec->nportcntrs * sizeof(u64); in qib_read_7220portcntrs()
3219 for (i = 0; i < dd->cspec->nportcntrs; i++) { in qib_read_7220portcntrs()
3225 *cntr++ = read_7220_creg32(dd, in qib_read_7220portcntrs()
3243 struct qib_devdata *dd = from_timer(dd, t, stats_timer); in qib_get_7220_faststats() local
3244 struct qib_pportdata *ppd = dd->pport; in qib_get_7220_faststats()
3252 if (!(dd->flags & QIB_INITTED) || dd->diag_client) in qib_get_7220_faststats()
3263 spin_lock_irqsave(&dd->eep_st_lock, flags); in qib_get_7220_faststats()
3264 traffic_wds -= dd->traffic_wds; in qib_get_7220_faststats()
3265 dd->traffic_wds += traffic_wds; in qib_get_7220_faststats()
3266 spin_unlock_irqrestore(&dd->eep_st_lock, flags); in qib_get_7220_faststats()
3268 mod_timer(&dd->stats_timer, jiffies + HZ * ACTIVITY_TIMER); in qib_get_7220_faststats()
3274 static int qib_7220_intr_fallback(struct qib_devdata *dd) in qib_7220_intr_fallback() argument
3276 if (!dd->msi_lo) in qib_7220_intr_fallback()
3279 qib_devinfo(dd->pcidev, in qib_7220_intr_fallback()
3282 qib_free_irq(dd); in qib_7220_intr_fallback()
3283 dd->msi_lo = 0; in qib_7220_intr_fallback()
3284 if (pci_alloc_irq_vectors(dd->pcidev, 1, 1, PCI_IRQ_LEGACY) < 0) in qib_7220_intr_fallback()
3285 qib_dev_err(dd, "Failed to enable INTx\n"); in qib_7220_intr_fallback()
3286 qib_setup_7220_interrupt(dd); in qib_7220_intr_fallback()
3299 struct qib_devdata *dd = ppd->dd; in qib_7220_xgxs_reset() local
3301 prev_val = qib_read_kreg64(dd, kr_xgxs_cfg); in qib_7220_xgxs_reset()
3304 qib_write_kreg(dd, kr_control, in qib_7220_xgxs_reset()
3305 dd->control & ~QLOGIC_IB_C_LINKENABLE); in qib_7220_xgxs_reset()
3306 qib_write_kreg(dd, kr_xgxs_cfg, val); in qib_7220_xgxs_reset()
3307 qib_read_kreg32(dd, kr_scratch); in qib_7220_xgxs_reset()
3308 qib_write_kreg(dd, kr_xgxs_cfg, prev_val); in qib_7220_xgxs_reset()
3309 qib_write_kreg(dd, kr_control, dd->control); in qib_7220_xgxs_reset()
3330 u32 lbuf = ppd->dd->cspec->lastbuf_for_pio; in get_7220_link_buf()
3338 sendctrl_7220_mod(ppd->dd->pport, QIB_SENDCTRL_AVAIL_BLIP); in get_7220_link_buf()
3339 qib_read_kreg64(ppd->dd, kr_scratch); /* extra chip flush */ in get_7220_link_buf()
3340 buf = qib_getsendbuf_range(ppd->dd, bnum, lbuf, lbuf); in get_7220_link_buf()
3356 qib_read_kreg64(ppd->dd, kr_scratch); /* extra chip flush */ in get_7220_link_buf()
3357 buf = qib_getsendbuf_range(ppd->dd, bnum, lbuf, lbuf); in get_7220_link_buf()
3378 struct qib_devdata *dd = ppd->dd; in autoneg_7220_sendpkt() local
3388 sendctrl_7220_mod(dd->pport, QIB_SENDCTRL_DISARM_BUF(pnum)); in autoneg_7220_sendpkt()
3393 if (dd->flags & QIB_USE_SPCL_TRIG) { in autoneg_7220_sendpkt()
3394 u32 spcl_off = (pnum >= dd->piobcnt2k) ? 2047 : 1023; in autoneg_7220_sendpkt()
3400 qib_sendbuf_done(dd, pnum); in autoneg_7220_sendpkt()
3408 struct qib_devdata *dd = ppd->dd; in autoneg_7220_send() local
3443 qib_read_kreg64(dd, kr_scratch); in autoneg_7220_send()
3446 qib_read_kreg64(dd, kr_scratch); in autoneg_7220_send()
3476 qib_write_kreg(ppd->dd, kr_ibcddrctrl, ppd->cpspec->ibcddrctrl); in set_7220_ibspeed_fast()
3477 qib_write_kreg(ppd->dd, kr_scratch, 0); in set_7220_ibspeed_fast()
3495 qib_write_kreg(ppd->dd, kr_ncmodectrl, 0x3b9dc07); in try_7220_autoneg()
3503 toggle_7220_rclkrls(ppd->dd); in try_7220_autoneg()
3516 struct qib_devdata *dd; in autoneg_7220_work() local
3522 dd = ppd->dd; in autoneg_7220_work()
3546 toggle_7220_rclkrls(dd); in autoneg_7220_work()
3555 toggle_7220_rclkrls(dd); in autoneg_7220_work()
3568 if (dd->cspec->autoneg_tries == AUTONEG_TRIES) { in autoneg_7220_work()
3570 dd->cspec->autoneg_tries = 0; in autoneg_7220_work()
3611 struct qib_devdata *dd = ppd->dd; in qib_7220_ib_updown() local
3628 qib_sd7220_presets(dd); in qib_7220_ib_updown()
3637 set_7220_relock_poll(dd, ibup); in qib_7220_ib_updown()
3645 dd->cspec->autoneg_tries < AUTONEG_TRIES) { in qib_7220_ib_updown()
3647 ++dd->cspec->autoneg_tries; in qib_7220_ib_updown()
3650 ppd->cpspec->ibsymsnap = read_7220_creg32(dd, in qib_7220_ib_updown()
3652 ppd->cpspec->iblnkerrsnap = read_7220_creg32(dd, in qib_7220_ib_updown()
3662 toggle_7220_rclkrls(dd); in qib_7220_ib_updown()
3672 dd->cspec->autoneg_tries = 0; in qib_7220_ib_updown()
3691 qib_write_kreg(dd, kr_ncmodectrl, 0); in qib_7220_ib_updown()
3704 set_7220_relock_poll(dd, ibup); in qib_7220_ib_updown()
3722 ppd->cpspec->ibsymdelta += read_7220_creg32(ppd->dd, in qib_7220_ib_updown()
3724 ppd->cpspec->iblnkerrdelta += read_7220_creg32(ppd->dd, in qib_7220_ib_updown()
3731 ppd->cpspec->ibsymsnap = read_7220_creg32(ppd->dd, in qib_7220_ib_updown()
3733 ppd->cpspec->iblnkerrsnap = read_7220_creg32(ppd->dd, in qib_7220_ib_updown()
3749 static int gpio_7220_mod(struct qib_devdata *dd, u32 out, u32 dir, u32 mask) in gpio_7220_mod() argument
3758 spin_lock_irqsave(&dd->cspec->gpio_lock, flags); in gpio_7220_mod()
3759 dd->cspec->extctrl &= ~((u64)mask << SYM_LSB(EXTCtrl, GPIOOe)); in gpio_7220_mod()
3760 dd->cspec->extctrl |= ((u64) dir << SYM_LSB(EXTCtrl, GPIOOe)); in gpio_7220_mod()
3761 new_out = (dd->cspec->gpio_out & ~mask) | out; in gpio_7220_mod()
3763 qib_write_kreg(dd, kr_extctrl, dd->cspec->extctrl); in gpio_7220_mod()
3764 qib_write_kreg(dd, kr_gpio_out, new_out); in gpio_7220_mod()
3765 dd->cspec->gpio_out = new_out; in gpio_7220_mod()
3766 spin_unlock_irqrestore(&dd->cspec->gpio_lock, flags); in gpio_7220_mod()
3776 read_val = qib_read_kreg64(dd, kr_extstatus); in gpio_7220_mod()
3785 static void get_7220_chip_params(struct qib_devdata *dd) in get_7220_chip_params() argument
3791 dd->uregbase = qib_read_kreg32(dd, kr_userregbase); in get_7220_chip_params()
3793 dd->rcvtidcnt = qib_read_kreg32(dd, kr_rcvtidcnt); in get_7220_chip_params()
3794 dd->rcvtidbase = qib_read_kreg32(dd, kr_rcvtidbase); in get_7220_chip_params()
3795 dd->rcvegrbase = qib_read_kreg32(dd, kr_rcvegrbase); in get_7220_chip_params()
3796 dd->palign = qib_read_kreg32(dd, kr_palign); in get_7220_chip_params()
3797 dd->piobufbase = qib_read_kreg64(dd, kr_sendpiobufbase); in get_7220_chip_params()
3798 dd->pio2k_bufbase = dd->piobufbase & 0xffffffff; in get_7220_chip_params()
3800 val = qib_read_kreg64(dd, kr_sendpiosize); in get_7220_chip_params()
3801 dd->piosize2k = val & ~0U; in get_7220_chip_params()
3802 dd->piosize4k = val >> 32; in get_7220_chip_params()
3807 dd->pport->ibmtu = (u32)mtu; in get_7220_chip_params()
3809 val = qib_read_kreg64(dd, kr_sendpiobufcnt); in get_7220_chip_params()
3810 dd->piobcnt2k = val & ~0U; in get_7220_chip_params()
3811 dd->piobcnt4k = val >> 32; in get_7220_chip_params()
3813 dd->pio2kbase = (u32 __iomem *) in get_7220_chip_params()
3814 ((char __iomem *) dd->kregbase + dd->pio2k_bufbase); in get_7220_chip_params()
3815 if (dd->piobcnt4k) { in get_7220_chip_params()
3816 dd->pio4kbase = (u32 __iomem *) in get_7220_chip_params()
3817 ((char __iomem *) dd->kregbase + in get_7220_chip_params()
3818 (dd->piobufbase >> 32)); in get_7220_chip_params()
3824 dd->align4k = ALIGN(dd->piosize4k, dd->palign); in get_7220_chip_params()
3827 piobufs = dd->piobcnt4k + dd->piobcnt2k; in get_7220_chip_params()
3829 dd->pioavregs = ALIGN(piobufs, sizeof(u64) * BITS_PER_BYTE / 2) / in get_7220_chip_params()
3838 static void set_7220_baseaddrs(struct qib_devdata *dd) in set_7220_baseaddrs() argument
3842 cregbase = qib_read_kreg32(dd, kr_counterregbase); in set_7220_baseaddrs()
3843 dd->cspec->cregbase = (u64 __iomem *) in set_7220_baseaddrs()
3844 ((char __iomem *) dd->kregbase + cregbase); in set_7220_baseaddrs()
3846 dd->egrtidbase = (u64 __iomem *) in set_7220_baseaddrs()
3847 ((char __iomem *) dd->kregbase + dd->rcvegrbase); in set_7220_baseaddrs()
3861 static int sendctrl_hook(struct qib_devdata *dd, in sendctrl_hook() argument
3870 qib_dev_err(dd, "SendCtrl Hook called with offs %X, %s-bit\n", in sendctrl_hook()
3878 spin_lock_irqsave(&dd->sendctrl_lock, flags); in sendctrl_hook()
3888 local_data = (u64)qib_read_kreg32(dd, idx); in sendctrl_hook()
3890 local_data = qib_read_kreg64(dd, idx); in sendctrl_hook()
3891 qib_dev_err(dd, "Sendctrl -> %X, Shad -> %X\n", in sendctrl_hook()
3892 (u32)local_data, (u32)dd->sendctrl); in sendctrl_hook()
3894 (dd->sendctrl & SENDCTRL_SHADOWED)) in sendctrl_hook()
3895 qib_dev_err(dd, "Sendctrl read: %X shadow is %X\n", in sendctrl_hook()
3896 (u32)local_data, (u32) dd->sendctrl); in sendctrl_hook()
3910 sval = (dd->sendctrl & ~mask); in sendctrl_hook()
3912 dd->sendctrl = sval; in sendctrl_hook()
3914 qib_dev_err(dd, "Sendctrl <- %X, Shad <- %X\n", in sendctrl_hook()
3916 qib_write_kreg(dd, kr_sendctrl, tval); in sendctrl_hook()
3917 qib_write_kreg(dd, kr_scratch, 0Ull); in sendctrl_hook()
3919 spin_unlock_irqrestore(&dd->sendctrl_lock, flags); in sendctrl_hook()
3934 static int qib_late_7220_initreg(struct qib_devdata *dd) in qib_late_7220_initreg() argument
3939 qib_write_kreg(dd, kr_rcvhdrentsize, dd->rcvhdrentsize); in qib_late_7220_initreg()
3940 qib_write_kreg(dd, kr_rcvhdrsize, dd->rcvhdrsize); in qib_late_7220_initreg()
3941 qib_write_kreg(dd, kr_rcvhdrcnt, dd->rcvhdrcnt); in qib_late_7220_initreg()
3942 qib_write_kreg(dd, kr_sendpioavailaddr, dd->pioavailregs_phys); in qib_late_7220_initreg()
3943 val = qib_read_kreg64(dd, kr_sendpioavailaddr); in qib_late_7220_initreg()
3944 if (val != dd->pioavailregs_phys) { in qib_late_7220_initreg()
3945 qib_dev_err(dd, in qib_late_7220_initreg()
3947 (unsigned long) dd->pioavailregs_phys, in qib_late_7220_initreg()
3951 qib_register_observer(dd, &sendctrl_observer); in qib_late_7220_initreg()
3955 static int qib_init_7220_variables(struct qib_devdata *dd) in qib_init_7220_variables() argument
3962 cpspec = (struct qib_chippport_specific *)(dd + 1); in qib_init_7220_variables()
3964 dd->pport = ppd; in qib_init_7220_variables()
3965 dd->num_pports = 1; in qib_init_7220_variables()
3967 dd->cspec = (struct qib_chip_specific *)(cpspec + dd->num_pports); in qib_init_7220_variables()
3968 dd->cspec->dd = dd; in qib_init_7220_variables()
3971 spin_lock_init(&dd->cspec->sdepb_lock); in qib_init_7220_variables()
3972 spin_lock_init(&dd->cspec->rcvmod_lock); in qib_init_7220_variables()
3973 spin_lock_init(&dd->cspec->gpio_lock); in qib_init_7220_variables()
3976 dd->revision = readq(&dd->kregbase[kr_revision]); in qib_init_7220_variables()
3978 if ((dd->revision & 0xffffffffU) == 0xffffffffU) { in qib_init_7220_variables()
3979 qib_dev_err(dd, in qib_init_7220_variables()
3984 dd->flags |= QIB_PRESENT; /* now register routines work */ in qib_init_7220_variables()
3986 dd->majrev = (u8) SYM_FIELD(dd->revision, Revision_R, in qib_init_7220_variables()
3988 dd->minrev = (u8) SYM_FIELD(dd->revision, Revision_R, in qib_init_7220_variables()
3991 get_7220_chip_params(dd); in qib_init_7220_variables()
3992 qib_7220_boardname(dd); in qib_init_7220_variables()
3998 dd->gpio_sda_num = _QIB_GPIO_SDA_NUM; in qib_init_7220_variables()
3999 dd->gpio_scl_num = _QIB_GPIO_SCL_NUM; in qib_init_7220_variables()
4000 dd->twsi_eeprom_dev = QIB_TWSI_EEPROM_DEV; in qib_init_7220_variables()
4002 dd->flags |= QIB_HAS_INTX | QIB_HAS_LINK_LATENCY | in qib_init_7220_variables()
4004 dd->flags |= qib_special_trigger ? in qib_init_7220_variables()
4010 ret = qib_init_pportdata(ppd, dd, 0, 1); in qib_init_7220_variables()
4029 qib_write_kreg(dd, kr_rcvbthqp, QIB_KD_QP); in qib_init_7220_variables()
4035 dd->rcvhdrentsize = QIB_RCVHDR_ENTSIZE; in qib_init_7220_variables()
4036 dd->rcvhdrsize = QIB_DFLT_RCVHDRSIZE; in qib_init_7220_variables()
4037 dd->rhf_offset = in qib_init_7220_variables()
4038 dd->rcvhdrentsize - sizeof(u64) / sizeof(u32); in qib_init_7220_variables()
4042 dd->rcvegrbufsize = ret != -1 ? max(ret, 2048) : QIB_DEFAULT_MTU; in qib_init_7220_variables()
4043 dd->rcvegrbufsize_shift = ilog2(dd->rcvegrbufsize); in qib_init_7220_variables()
4045 qib_7220_tidtemplate(dd); in qib_init_7220_variables()
4052 dd->rhdrhead_intr_off = 1ULL << 32; in qib_init_7220_variables()
4055 timer_setup(&dd->stats_timer, qib_get_7220_faststats, 0); in qib_init_7220_variables()
4056 dd->stats_timer.expires = jiffies + ACTIVITY_TIMER * HZ; in qib_init_7220_variables()
4064 dd->control |= 1 << 4; in qib_init_7220_variables()
4066 dd->ureg_align = 0x10000; /* 64KB alignment */ in qib_init_7220_variables()
4068 dd->piosize2kmax_dwords = (dd->piosize2k >> 2)-1; in qib_init_7220_variables()
4069 qib_7220_config_ctxts(dd); in qib_init_7220_variables()
4070 qib_set_ctxtcnt(dd); /* needed for PAT setup */ in qib_init_7220_variables()
4072 ret = init_chip_wc_pat(dd, 0); in qib_init_7220_variables()
4075 set_7220_baseaddrs(dd); /* set chip access pointers now */ in qib_init_7220_variables()
4081 ret = qib_create_ctxts(dd); in qib_init_7220_variables()
4082 init_7220_cntrnames(dd); in qib_init_7220_variables()
4095 if (dd->flags & QIB_HAS_SEND_DMA) { in qib_init_7220_variables()
4096 dd->cspec->sdmabufcnt = dd->piobcnt4k; in qib_init_7220_variables()
4099 dd->cspec->sdmabufcnt = 0; in qib_init_7220_variables()
4100 sbufs = dd->piobcnt4k; in qib_init_7220_variables()
4103 dd->cspec->lastbuf_for_pio = dd->piobcnt2k + dd->piobcnt4k - in qib_init_7220_variables()
4104 dd->cspec->sdmabufcnt; in qib_init_7220_variables()
4105 dd->lastctxt_piobuf = dd->cspec->lastbuf_for_pio - sbufs; in qib_init_7220_variables()
4106 dd->cspec->lastbuf_for_pio--; /* range is <= , not < */ in qib_init_7220_variables()
4107 dd->last_pio = dd->cspec->lastbuf_for_pio; in qib_init_7220_variables()
4108 dd->pbufsctxt = dd->lastctxt_piobuf / in qib_init_7220_variables()
4109 (dd->cfgctxts - dd->first_user_ctxt); in qib_init_7220_variables()
4117 if ((dd->pbufsctxt - 2) < updthresh) in qib_init_7220_variables()
4118 updthresh = dd->pbufsctxt - 2; in qib_init_7220_variables()
4120 dd->cspec->updthresh_dflt = updthresh; in qib_init_7220_variables()
4121 dd->cspec->updthresh = updthresh; in qib_init_7220_variables()
4124 dd->sendctrl |= (updthresh & SYM_RMASK(SendCtrl, AvailUpdThld)) in qib_init_7220_variables()
4127 dd->psxmitwait_supported = 1; in qib_init_7220_variables()
4128 dd->psxmitwait_check_rate = QIB_7220_PSXMITWAIT_CHECK_RATE; in qib_init_7220_variables()
4137 struct qib_devdata *dd = ppd->dd; in qib_7220_getsendbuf() local
4144 if ((plen + 1) > dd->piosize2kmax_dwords) in qib_7220_getsendbuf()
4145 first = dd->piobcnt2k; in qib_7220_getsendbuf()
4149 last = dd->cspec->lastbuf_for_pio; in qib_7220_getsendbuf()
4150 buf = qib_getsendbuf_range(dd, pbufnum, first, last); in qib_7220_getsendbuf()
4159 write_7220_creg(ppd->dd, cr_psinterval, intv); in qib_set_cntr_7220_sample()
4160 write_7220_creg(ppd->dd, cr_psstart, start); in qib_set_cntr_7220_sample()
4175 qib_write_kreg(ppd->dd, kr_senddmatail, tail); in qib_sdma_update_7220_tail()
4229 struct qib_devdata *dd = ppd->dd; in init_sdma_7220_regs() local
4234 qib_write_kreg(dd, kr_senddmabase, ppd->sdma_descq_phys); in init_sdma_7220_regs()
4238 qib_write_kreg(dd, kr_senddmaheadaddr, ppd->sdma_head_phys); in init_sdma_7220_regs()
4244 n = dd->piobcnt2k + dd->piobcnt4k; in init_sdma_7220_regs()
4245 i = n - dd->cspec->sdmabufcnt; in init_sdma_7220_regs()
4253 qib_write_kreg(dd, kr_senddmabufmask0, senddmabufmask[0]); in init_sdma_7220_regs()
4254 qib_write_kreg(dd, kr_senddmabufmask1, senddmabufmask[1]); in init_sdma_7220_regs()
4255 qib_write_kreg(dd, kr_senddmabufmask2, senddmabufmask[2]); in init_sdma_7220_regs()
4266 struct qib_devdata *dd = ppd->dd; in qib_sdma_7220_gethead() local
4275 (dd->flags & QIB_HAS_SDMA_TIMEOUT); in qib_sdma_7220_gethead()
4279 (u16)qib_read_kreg32(dd, kr_senddmahead); in qib_sdma_7220_gethead()
4312 u64 hwstatus = qib_read_kreg64(ppd->dd, kr_senddmastatus); in qib_sdma_7220_busy()
4344 static void qib_7220_initvl15_bufs(struct qib_devdata *dd) in qib_7220_initvl15_bufs() argument
4354 rcd->rcvegrcnt = rcd->dd->cspec->rcvegrcnt; in qib_7220_init_ctxt()
4360 static void qib_7220_txchk_change(struct qib_devdata *dd, u32 start, in qib_7220_txchk_change() argument
4369 spin_lock_irqsave(&dd->uctxt_lock, flags); in qib_7220_txchk_change()
4370 for (i = dd->first_user_ctxt; in qib_7220_txchk_change()
4371 dd->cspec->updthresh != dd->cspec->updthresh_dflt in qib_7220_txchk_change()
4372 && i < dd->cfgctxts; i++) in qib_7220_txchk_change()
4373 if (dd->rcd[i] && dd->rcd[i]->subctxt_cnt && in qib_7220_txchk_change()
4374 ((dd->rcd[i]->piocnt / dd->rcd[i]->subctxt_cnt) - 1) in qib_7220_txchk_change()
4375 < dd->cspec->updthresh_dflt) in qib_7220_txchk_change()
4377 spin_unlock_irqrestore(&dd->uctxt_lock, flags); in qib_7220_txchk_change()
4378 if (i == dd->cfgctxts) { in qib_7220_txchk_change()
4379 spin_lock_irqsave(&dd->sendctrl_lock, flags); in qib_7220_txchk_change()
4380 dd->cspec->updthresh = dd->cspec->updthresh_dflt; in qib_7220_txchk_change()
4381 dd->sendctrl &= ~SYM_MASK(SendCtrl, AvailUpdThld); in qib_7220_txchk_change()
4382 dd->sendctrl |= (dd->cspec->updthresh & in qib_7220_txchk_change()
4385 spin_unlock_irqrestore(&dd->sendctrl_lock, flags); in qib_7220_txchk_change()
4386 sendctrl_7220_mod(dd->pport, QIB_SENDCTRL_AVAIL_BLIP); in qib_7220_txchk_change()
4390 spin_lock_irqsave(&dd->sendctrl_lock, flags); in qib_7220_txchk_change()
4392 / rcd->subctxt_cnt) - 1) < dd->cspec->updthresh) { in qib_7220_txchk_change()
4393 dd->cspec->updthresh = (rcd->piocnt / in qib_7220_txchk_change()
4395 dd->sendctrl &= ~SYM_MASK(SendCtrl, AvailUpdThld); in qib_7220_txchk_change()
4396 dd->sendctrl |= (dd->cspec->updthresh & in qib_7220_txchk_change()
4399 spin_unlock_irqrestore(&dd->sendctrl_lock, flags); in qib_7220_txchk_change()
4400 sendctrl_7220_mod(dd->pport, QIB_SENDCTRL_AVAIL_BLIP); in qib_7220_txchk_change()
4402 spin_unlock_irqrestore(&dd->sendctrl_lock, flags); in qib_7220_txchk_change()
4407 static void writescratch(struct qib_devdata *dd, u32 val) in writescratch() argument
4409 qib_write_kreg(dd, kr_scratch, val); in writescratch()
4420 static int qib_7220_tempsense_rd(struct qib_devdata *dd, int regnum) in qib_7220_tempsense_rd() argument
4436 ret = mutex_lock_interruptible(&dd->eep_lock); in qib_7220_tempsense_rd()
4440 ret = qib_twsi_blk_rd(dd, QIB_TWSI_TEMP_DEV, regnum, &rdata, 1); in qib_7220_tempsense_rd()
4444 mutex_unlock(&dd->eep_lock); in qib_7220_tempsense_rd()
4457 static int qib_7220_notify_dca(struct qib_devdata *dd, unsigned long event) in qib_7220_notify_dca() argument
4464 static int qib_7220_eeprom_wen(struct qib_devdata *dd, int wen) in qib_7220_eeprom_wen() argument
4480 struct qib_devdata *dd; in qib_init_iba7220_funcs() local
4484 dd = qib_alloc_devdata(pdev, sizeof(struct qib_chip_specific) + in qib_init_iba7220_funcs()
4486 if (IS_ERR(dd)) in qib_init_iba7220_funcs()
4489 dd->f_bringup_serdes = qib_7220_bringup_serdes; in qib_init_iba7220_funcs()
4490 dd->f_cleanup = qib_setup_7220_cleanup; in qib_init_iba7220_funcs()
4491 dd->f_clear_tids = qib_7220_clear_tids; in qib_init_iba7220_funcs()
4492 dd->f_free_irq = qib_free_irq; in qib_init_iba7220_funcs()
4493 dd->f_get_base_info = qib_7220_get_base_info; in qib_init_iba7220_funcs()
4494 dd->f_get_msgheader = qib_7220_get_msgheader; in qib_init_iba7220_funcs()
4495 dd->f_getsendbuf = qib_7220_getsendbuf; in qib_init_iba7220_funcs()
4496 dd->f_gpio_mod = gpio_7220_mod; in qib_init_iba7220_funcs()
4497 dd->f_eeprom_wen = qib_7220_eeprom_wen; in qib_init_iba7220_funcs()
4498 dd->f_hdrqempty = qib_7220_hdrqempty; in qib_init_iba7220_funcs()
4499 dd->f_ib_updown = qib_7220_ib_updown; in qib_init_iba7220_funcs()
4500 dd->f_init_ctxt = qib_7220_init_ctxt; in qib_init_iba7220_funcs()
4501 dd->f_initvl15_bufs = qib_7220_initvl15_bufs; in qib_init_iba7220_funcs()
4502 dd->f_intr_fallback = qib_7220_intr_fallback; in qib_init_iba7220_funcs()
4503 dd->f_late_initreg = qib_late_7220_initreg; in qib_init_iba7220_funcs()
4504 dd->f_setpbc_control = qib_7220_setpbc_control; in qib_init_iba7220_funcs()
4505 dd->f_portcntr = qib_portcntr_7220; in qib_init_iba7220_funcs()
4506 dd->f_put_tid = qib_7220_put_tid; in qib_init_iba7220_funcs()
4507 dd->f_quiet_serdes = qib_7220_quiet_serdes; in qib_init_iba7220_funcs()
4508 dd->f_rcvctrl = rcvctrl_7220_mod; in qib_init_iba7220_funcs()
4509 dd->f_read_cntrs = qib_read_7220cntrs; in qib_init_iba7220_funcs()
4510 dd->f_read_portcntrs = qib_read_7220portcntrs; in qib_init_iba7220_funcs()
4511 dd->f_reset = qib_setup_7220_reset; in qib_init_iba7220_funcs()
4512 dd->f_init_sdma_regs = init_sdma_7220_regs; in qib_init_iba7220_funcs()
4513 dd->f_sdma_busy = qib_sdma_7220_busy; in qib_init_iba7220_funcs()
4514 dd->f_sdma_gethead = qib_sdma_7220_gethead; in qib_init_iba7220_funcs()
4515 dd->f_sdma_sendctrl = qib_7220_sdma_sendctrl; in qib_init_iba7220_funcs()
4516 dd->f_sdma_set_desc_cnt = qib_sdma_set_7220_desc_cnt; in qib_init_iba7220_funcs()
4517 dd->f_sdma_update_tail = qib_sdma_update_7220_tail; in qib_init_iba7220_funcs()
4518 dd->f_sdma_hw_clean_up = qib_7220_sdma_hw_clean_up; in qib_init_iba7220_funcs()
4519 dd->f_sdma_hw_start_up = qib_7220_sdma_hw_start_up; in qib_init_iba7220_funcs()
4520 dd->f_sdma_init_early = qib_7220_sdma_init_early; in qib_init_iba7220_funcs()
4521 dd->f_sendctrl = sendctrl_7220_mod; in qib_init_iba7220_funcs()
4522 dd->f_set_armlaunch = qib_set_7220_armlaunch; in qib_init_iba7220_funcs()
4523 dd->f_set_cntr_sample = qib_set_cntr_7220_sample; in qib_init_iba7220_funcs()
4524 dd->f_iblink_state = qib_7220_iblink_state; in qib_init_iba7220_funcs()
4525 dd->f_ibphys_portstate = qib_7220_phys_portstate; in qib_init_iba7220_funcs()
4526 dd->f_get_ib_cfg = qib_7220_get_ib_cfg; in qib_init_iba7220_funcs()
4527 dd->f_set_ib_cfg = qib_7220_set_ib_cfg; in qib_init_iba7220_funcs()
4528 dd->f_set_ib_loopback = qib_7220_set_loopback; in qib_init_iba7220_funcs()
4529 dd->f_set_intr_state = qib_7220_set_intr_state; in qib_init_iba7220_funcs()
4530 dd->f_setextled = qib_setup_7220_setextled; in qib_init_iba7220_funcs()
4531 dd->f_txchk_change = qib_7220_txchk_change; in qib_init_iba7220_funcs()
4532 dd->f_update_usrhead = qib_update_7220_usrhead; in qib_init_iba7220_funcs()
4533 dd->f_wantpiobuf_intr = qib_wantpiobuf_7220_intr; in qib_init_iba7220_funcs()
4534 dd->f_xgxs_reset = qib_7220_xgxs_reset; in qib_init_iba7220_funcs()
4535 dd->f_writescratch = writescratch; in qib_init_iba7220_funcs()
4536 dd->f_tempsense_rd = qib_7220_tempsense_rd; in qib_init_iba7220_funcs()
4538 dd->f_notify_dca = qib_7220_notify_dca; in qib_init_iba7220_funcs()
4546 ret = qib_pcie_ddinit(dd, pdev, ent); in qib_init_iba7220_funcs()
4551 ret = qib_init_7220_variables(dd); in qib_init_iba7220_funcs()
4558 boardid = SYM_FIELD(dd->revision, Revision, in qib_init_iba7220_funcs()
4571 if (qib_pcie_params(dd, minwidth, NULL)) in qib_init_iba7220_funcs()
4572 qib_dev_err(dd, in qib_init_iba7220_funcs()
4575 if (qib_read_kreg64(dd, kr_hwerrstatus) & in qib_init_iba7220_funcs()
4577 qib_write_kreg(dd, kr_hwerrclear, in qib_init_iba7220_funcs()
4581 qib_setup_7220_interrupt(dd); in qib_init_iba7220_funcs()
4582 qib_7220_init_hwerrors(dd); in qib_init_iba7220_funcs()
4585 qib_write_kreg(dd, kr_hwdiagctrl, 0); in qib_init_iba7220_funcs()
4590 qib_pcie_ddcleanup(dd); in qib_init_iba7220_funcs()
4592 qib_free_devdata(dd); in qib_init_iba7220_funcs()
4593 dd = ERR_PTR(ret); in qib_init_iba7220_funcs()
4595 return dd; in qib_init_iba7220_funcs()