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Searched refs:cu_info (Results 1 – 25 of 25) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_mqd_manager.c102 struct amdgpu_cu_info *cu_info = &mm->dev->adev->gfx.cu_info; in mqd_symmetrically_map_cu_mask() local
112 cu_active_per_node = cu_info->number / mm->dev->kfd->num_nodes; in mqd_symmetrically_map_cu_mask()
150 cu_info->bitmap[xcc_inst][se % 4][sh + (se / 4) * in mqd_symmetrically_map_cu_mask()
H A Dkfd_crat.c2041 struct amdgpu_cu_info *cu_info = &kdev->adev->gfx.cu_info; in kfd_create_vcrat_image_gpu() local
2089 cu->num_simd_per_cu = cu_info->simd_per_cu; in kfd_create_vcrat_image_gpu()
2090 cu->num_simd_cores = cu_info->simd_per_cu * in kfd_create_vcrat_image_gpu()
2091 (cu_info->number / kdev->kfd->num_nodes); in kfd_create_vcrat_image_gpu()
2092 cu->max_waves_simd = cu_info->max_waves_per_simd; in kfd_create_vcrat_image_gpu()
2094 cu->wave_front_size = cu_info->wave_front_size; in kfd_create_vcrat_image_gpu()
2100 cu->max_slots_scatch_cu = cu_info->max_scratch_slots_per_cu; in kfd_create_vcrat_image_gpu()
2102 cu->lds_size_in_kb = cu_info->lds_size; in kfd_create_vcrat_image_gpu()
H A Dkfd_topology.c1601 struct amdgpu_cu_info *cu_info, in fill_in_l2_l3_pcache() argument
1613 cu_sibling_map_mask = cu_info->bitmap[start][0][0]; in fill_in_l2_l3_pcache()
1657 cu_sibling_map_mask = cu_info->bitmap[xcc][i % 4][j + i / 4]; in fill_in_l2_l3_pcache()
1682 struct amdgpu_cu_info *cu_info = &kdev->adev->gfx.cu_info; in kfd_fill_cache_non_crat_info() local
1721 cu_info->bitmap[xcc][i % 4][j + i / 4], ct, in kfd_fill_cache_non_crat_info()
1744 cu_info, gfx_info, ct, cu_processor_id, kdev); in kfd_fill_cache_non_crat_info()
1927 struct amdgpu_cu_info *cu_info = &gpu->adev->gfx.cu_info; in kfd_topology_add_device() local
2054 cu_info->simd_per_cu * cu_info->number; in kfd_topology_add_device()
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_atomfirmware.c803 adev->gfx.cu_info.wave_front_size = le16_to_cpu(gfx_info->v24.gc_wave_size); in amdgpu_atomfirmware_get_gfx_info()
804 adev->gfx.cu_info.max_waves_per_simd = le16_to_cpu(gfx_info->v24.gc_max_waves_per_simd); in amdgpu_atomfirmware_get_gfx_info()
805 adev->gfx.cu_info.max_scratch_slots_per_cu = gfx_info->v24.gc_max_scratch_slots_per_cu; in amdgpu_atomfirmware_get_gfx_info()
806 adev->gfx.cu_info.lds_size = le16_to_cpu(gfx_info->v24.gc_lds_size); in amdgpu_atomfirmware_get_gfx_info()
819 adev->gfx.cu_info.wave_front_size = le16_to_cpu(gfx_info->v27.gc_wave_size); in amdgpu_atomfirmware_get_gfx_info()
820 adev->gfx.cu_info.max_waves_per_simd = le16_to_cpu(gfx_info->v27.gc_max_waves_per_simd); in amdgpu_atomfirmware_get_gfx_info()
821 adev->gfx.cu_info.max_scratch_slots_per_cu = gfx_info->v27.gc_max_scratch_slots_per_cu; in amdgpu_atomfirmware_get_gfx_info()
822 adev->gfx.cu_info.lds_size = le16_to_cpu(gfx_info->v27.gc_lds_size); in amdgpu_atomfirmware_get_gfx_info()
H A Dgfx_v9_4_2.c522 adev->gfx.cu_info.number, in gfx_v9_4_2_do_sgprs_init()
532 adev->gfx.cu_info.number * SIMD_ID_MAX * 2, in gfx_v9_4_2_do_sgprs_init()
547 adev->gfx.cu_info.number * 2, in gfx_v9_4_2_do_sgprs_init()
556 pattern[1], adev->gfx.cu_info.number * SIMD_ID_MAX * 6, in gfx_v9_4_2_do_sgprs_init()
587 adev->gfx.cu_info.number, in gfx_v9_4_2_do_sgprs_init()
597 adev->gfx.cu_info.number * SIMD_ID_MAX * 4, in gfx_v9_4_2_do_sgprs_init()
665 adev->gfx.cu_info.number, in gfx_v9_4_2_do_vgprs_init()
682 adev->gfx.cu_info.number * SIMD_ID_MAX, in gfx_v9_4_2_do_vgprs_init()
1819 struct amdgpu_cu_info *cu_info = &adev->gfx.cu_info; in gfx_v9_4_2_log_cu_timeout_status() local
1831 simd = i / cu_info->max_waves_per_simd; in gfx_v9_4_2_log_cu_timeout_status()
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H A Dgfx_v7_0.c3787 WREG32(mmRLC_PG_ALWAYS_ON_CU_MASK, adev->gfx.cu_info.ao_cu_mask); in gfx_v7_0_init_ao_cu_mask()
3791 tmp |= (adev->gfx.cu_info.number << RLC_MAX_PG_CU__MAX_POWERED_UP_CU__SHIFT); in gfx_v7_0_init_ao_cu_mask()
5098 struct amdgpu_cu_info *cu_info = &adev->gfx.cu_info; in gfx_v7_0_get_cu_info() local
5107 memset(cu_info, 0, sizeof(*cu_info)); in gfx_v7_0_get_cu_info()
5122 cu_info->bitmap[0][i][j] = bitmap; in gfx_v7_0_get_cu_info()
5135 cu_info->ao_cu_bitmap[i][j] = ao_bitmap; in gfx_v7_0_get_cu_info()
5141 cu_info->number = active_cu_number; in gfx_v7_0_get_cu_info()
5142 cu_info->ao_cu_mask = ao_cu_mask; in gfx_v7_0_get_cu_info()
5143 cu_info->simd_per_cu = NUM_SIMD_PER_CU; in gfx_v7_0_get_cu_info()
5144 cu_info->max_waves_per_simd = 10; in gfx_v7_0_get_cu_info()
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H A Damdgpu_discovery.c1447 adev->gfx.cu_info.wave_front_size = le32_to_cpu(gc_info->v1.gc_wave_size); in amdgpu_discovery_get_gfx_info()
1448 adev->gfx.cu_info.max_waves_per_simd = le32_to_cpu(gc_info->v1.gc_max_waves_per_simd); in amdgpu_discovery_get_gfx_info()
1449 adev->gfx.cu_info.max_scratch_slots_per_cu = le32_to_cpu(gc_info->v1.gc_max_scratch_slots_per_cu); in amdgpu_discovery_get_gfx_info()
1450 adev->gfx.cu_info.lds_size = le32_to_cpu(gc_info->v1.gc_lds_size); in amdgpu_discovery_get_gfx_info()
1481 adev->gfx.cu_info.wave_front_size = le32_to_cpu(gc_info->v2.gc_wave_size); in amdgpu_discovery_get_gfx_info()
1482 adev->gfx.cu_info.max_waves_per_simd = le32_to_cpu(gc_info->v2.gc_max_waves_per_simd); in amdgpu_discovery_get_gfx_info()
1483 adev->gfx.cu_info.max_scratch_slots_per_cu = le32_to_cpu(gc_info->v2.gc_max_scratch_slots_per_cu); in amdgpu_discovery_get_gfx_info()
1484 adev->gfx.cu_info.lds_size = le32_to_cpu(gc_info->v2.gc_lds_size); in amdgpu_discovery_get_gfx_info()
H A Damdgpu_kms.c855 dev_info->cu_active_number = adev->gfx.cu_info.number; in amdgpu_info_ioctl()
856 dev_info->cu_ao_mask = adev->gfx.cu_info.ao_cu_mask; in amdgpu_info_ioctl()
858 memcpy(&dev_info->cu_ao_bitmap[0], &adev->gfx.cu_info.ao_cu_bitmap[0], in amdgpu_info_ioctl()
859 sizeof(adev->gfx.cu_info.ao_cu_bitmap)); in amdgpu_info_ioctl()
860 memcpy(&dev_info->cu_bitmap[0], &adev->gfx.cu_info.bitmap[0], in amdgpu_info_ioctl()
867 dev_info->wave_front_size = adev->gfx.cu_info.wave_front_size; in amdgpu_info_ioctl()
H A Dgfx_v9_4_3.c58 struct amdgpu_cu_info *cu_info);
1017 gfx_v9_4_3_get_cu_info(adev, &adev->gfx.cu_info); in gfx_v9_4_3_constants_init()
3906 struct amdgpu_cu_info *cu_info = &adev->gfx.cu_info; in gfx_v9_4_3_log_cu_timeout_status() local
3918 simd = i / cu_info->max_waves_per_simd; in gfx_v9_4_3_log_cu_timeout_status()
3919 wave = i % cu_info->max_waves_per_simd; in gfx_v9_4_3_log_cu_timeout_status()
4291 struct amdgpu_cu_info *cu_info) in gfx_v9_4_3_get_cu_info() argument
4298 if (!adev || !cu_info) in gfx_v9_4_3_get_cu_info()
4327 cu_info->bitmap[xcc_id][i][j] = bitmap; in gfx_v9_4_3_get_cu_info()
4340 cu_info->ao_cu_bitmap[i][j] = ao_bitmap; in gfx_v9_4_3_get_cu_info()
4357 cu_info->number = active_cu_number; in gfx_v9_4_3_get_cu_info()
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H A Dgfx_v6_0.c2747 WREG32(mmRLC_PG_ALWAYS_ON_CU_MASK, adev->gfx.cu_info.ao_cu_mask); in gfx_v6_0_init_ao_cu_mask()
2751 tmp |= (adev->gfx.cu_info.number << RLC_MAX_PG_CU__MAX_POWERED_UP_CU__SHIFT); in gfx_v6_0_init_ao_cu_mask()
3556 struct amdgpu_cu_info *cu_info = &adev->gfx.cu_info; in gfx_v6_0_get_cu_info() local
3565 memset(cu_info, 0, sizeof(*cu_info)); in gfx_v6_0_get_cu_info()
3580 cu_info->bitmap[0][i][j] = bitmap; in gfx_v6_0_get_cu_info()
3593 cu_info->ao_cu_bitmap[i][j] = ao_bitmap; in gfx_v6_0_get_cu_info()
3600 cu_info->number = active_cu_number; in gfx_v6_0_get_cu_info()
3601 cu_info->ao_cu_mask = ao_cu_mask; in gfx_v6_0_get_cu_info()
H A Dgfx_v8_0.c4039 WREG32(mmRLC_PG_ALWAYS_ON_CU_MASK, adev->gfx.cu_info.ao_cu_mask); in gfx_v8_0_init_pg()
7100 struct amdgpu_cu_info *cu_info = &adev->gfx.cu_info; in gfx_v8_0_get_cu_info() local
7104 memset(cu_info, 0, sizeof(*cu_info)); in gfx_v8_0_get_cu_info()
7124 cu_info->bitmap[0][i][j] = bitmap; in gfx_v8_0_get_cu_info()
7137 cu_info->ao_cu_bitmap[i][j] = ao_bitmap; in gfx_v8_0_get_cu_info()
7143 cu_info->number = active_cu_number; in gfx_v8_0_get_cu_info()
7144 cu_info->ao_cu_mask = ao_cu_mask; in gfx_v8_0_get_cu_info()
7145 cu_info->simd_per_cu = NUM_SIMD_PER_CU; in gfx_v8_0_get_cu_info()
7146 cu_info->max_waves_per_simd = 10; in gfx_v8_0_get_cu_info()
7147 cu_info->max_scratch_slots_per_cu = 32; in gfx_v8_0_get_cu_info()
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H A Dgfx_v9_0.c756 struct amdgpu_cu_info *cu_info);
1484 struct amdgpu_cu_info *cu_info = &adev->gfx.cu_info; in gfx_v9_0_init_always_on_cu_mask() local
1506 if (cu_info->bitmap[0][i][j] & mask) { in gfx_v9_0_init_always_on_cu_mask()
1519 cu_info->ao_cu_bitmap[i][j] = cu_bitmap; in gfx_v9_0_init_always_on_cu_mask()
2393 gfx_v9_0_get_cu_info(adev, &adev->gfx.cu_info); in gfx_v9_0_constants_init()
7205 struct amdgpu_cu_info *cu_info) in gfx_v9_0_get_cu_info() argument
7211 if (!adev || !cu_info) in gfx_v9_0_get_cu_info()
7248 cu_info->bitmap[0][i % 4][j + i / 4] = bitmap; in gfx_v9_0_get_cu_info()
7261 cu_info->ao_cu_bitmap[i % 4][j + i / 4] = ao_bitmap; in gfx_v9_0_get_cu_info()
7267 cu_info->number = active_cu_number; in gfx_v9_0_get_cu_info()
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H A Damdgpu_amdkfd_gfx_v9.c1098 *max_waves_per_cu = adev->gfx.cu_info.simd_per_cu * in kgd_gfx_v9_get_cu_occupancy()
1099 adev->gfx.cu_info.max_waves_per_simd; in kgd_gfx_v9_get_cu_occupancy()
H A Damdgpu_gfx.h408 struct amdgpu_cu_info cu_info; member
H A Damdgpu_device.c1966 adev->gfx.cu_info.wave_front_size = le32_to_cpu(gpu_info_fw->gc_wave_size); in amdgpu_device_parse_gpu_info_fw()
1967 adev->gfx.cu_info.max_waves_per_simd = in amdgpu_device_parse_gpu_info_fw()
1969 adev->gfx.cu_info.max_scratch_slots_per_cu = in amdgpu_device_parse_gpu_info_fw()
1971 adev->gfx.cu_info.lds_size = le32_to_cpu(gpu_info_fw->gc_lds_size); in amdgpu_device_parse_gpu_info_fw()
3816 adev->gfx.cu_info.number); in amdgpu_device_init()
H A Dgfx_v11_0.c116 struct amdgpu_cu_info *cu_info);
1711 gfx_v11_0_get_cu_info(adev, &adev->gfx.cu_info); in gfx_v11_0_constants_init()
6336 struct amdgpu_cu_info *cu_info) in gfx_v11_0_get_cu_info() argument
6342 if (!adev || !cu_info) in gfx_v11_0_get_cu_info()
6376 cu_info->bitmap[0][i % 4][j + (i / 4) * 2] = bitmap; in gfx_v11_0_get_cu_info()
6390 cu_info->number = active_cu_number; in gfx_v11_0_get_cu_info()
6391 cu_info->simd_per_cu = NUM_SIMD_PER_CU; in gfx_v11_0_get_cu_info()
H A Dgfx_v10_0.c3474 struct amdgpu_cu_info *cu_info);
4979 gfx_v10_0_get_cu_info(adev, &adev->gfx.cu_info); in gfx_v10_0_constants_init()
9412 struct amdgpu_cu_info *cu_info) in gfx_v10_0_get_cu_info() argument
9418 if (!adev || !cu_info) in gfx_v10_0_get_cu_info()
9441 cu_info->bitmap[0][i][j] = bitmap; in gfx_v10_0_get_cu_info()
9454 cu_info->ao_cu_bitmap[i][j] = ao_bitmap; in gfx_v10_0_get_cu_info()
9460 cu_info->number = active_cu_number; in gfx_v10_0_get_cu_info()
9461 cu_info->ao_cu_mask = ao_cu_mask; in gfx_v10_0_get_cu_info()
9462 cu_info->simd_per_cu = NUM_SIMD_PER_CU; in gfx_v10_0_get_cu_info()
/openbmc/linux/drivers/net/ethernet/marvell/prestera/
H A Dprestera_main.c1105 struct netdev_notifier_changeupper_info *cu_info; in prestera_netdev_port_event() local
1111 cu_info = container_of(info, in prestera_netdev_port_event()
1117 upper = cu_info->upper_dev; in prestera_netdev_port_event()
1124 if (!cu_info->linking) in prestera_netdev_port_event()
1133 !prestera_lag_master_check(upper, cu_info->upper_info, extack)) in prestera_netdev_port_event()
1149 upper = cu_info->upper_dev; in prestera_netdev_port_event()
1151 if (cu_info->linking) in prestera_netdev_port_event()
1157 if (cu_info->linking) in prestera_netdev_port_event()
/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dsmu7_clockpowergating.c431 adev->gfx.cu_info.number, in smu7_powergate_gfx()
H A Dvega12_hwmgr.c440 data->total_active_cus = adev->gfx.cu_info.number; in vega12_hwmgr_backend_init()
H A Dvega20_hwmgr.c483 data->total_active_cus = adev->gfx.cu_info.number; in vega20_hwmgr_backend_init()
H A Dvega10_hwmgr.c925 data->total_active_cus = adev->gfx.cu_info.number; in vega10_hwmgr_backend_init()
/openbmc/linux/drivers/net/ethernet/mellanox/mlxsw/
H A Dspectrum.c5245 struct netdev_notifier_changeupper_info *cu_info; in mlxsw_sp_netdevice_vxlan_event() local
5254 cu_info = container_of(info, in mlxsw_sp_netdevice_vxlan_event()
5257 upper_dev = cu_info->upper_dev; in mlxsw_sp_netdevice_vxlan_event()
5264 if (cu_info->linking) { in mlxsw_sp_netdevice_vxlan_event()
/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dvangogh_ppt.c2266 uint32_t req_active_wgps = adev->gfx.cu_info.number/2; in vangogh_post_smu_init()
2284 if (total_cu == adev->gfx.cu_info.number) in vangogh_post_smu_init()
/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dvegam_smumgr.c1911 adev->gfx.cu_info.number, in vegam_enable_reconfig_cus()