Searched refs:ctrl_config (Results 1 – 6 of 6) sorted by relevance
280 dev->ctrl_config &= ~NVME_CC_SHN_MASK; in nvme_enable_ctrl()281 dev->ctrl_config |= NVME_CC_ENABLE; in nvme_enable_ctrl()282 writel(cpu_to_le32(dev->ctrl_config), &dev->bar->cc); in nvme_enable_ctrl()289 dev->ctrl_config &= ~NVME_CC_SHN_MASK; in nvme_disable_ctrl()290 dev->ctrl_config &= ~NVME_CC_ENABLE; in nvme_disable_ctrl()291 writel(cpu_to_le32(dev->ctrl_config), &dev->bar->cc); in nvme_disable_ctrl()369 dev->ctrl_config = NVME_CC_CSS_NVM; in nvme_configure_admin_queue()370 dev->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT; in nvme_configure_admin_queue()371 dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE; in nvme_configure_admin_queue()372 dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES; in nvme_configure_admin_queue()
616 u32 ctrl_config; member
2206 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK; in nvme_disable_ctrl()2208 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL; in nvme_disable_ctrl()2210 ctrl->ctrl_config &= ~NVME_CC_ENABLE; in nvme_disable_ctrl()2212 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config); in nvme_disable_ctrl()2249 ctrl->ctrl_config = NVME_CC_CSS_CSI; in nvme_enable_ctrl()2251 ctrl->ctrl_config = NVME_CC_CSS_NVM; in nvme_enable_ctrl()2259 ctrl->ctrl_config &= ~NVME_CC_CRIME; in nvme_enable_ctrl()2261 ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT; in nvme_enable_ctrl()2262 ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE; in nvme_enable_ctrl()2263 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES; in nvme_enable_ctrl()[all …]
316 u32 ctrl_config; member1150 return (ctrl->ctrl_config & NVME_CC_CSS_MASK) == NVME_CC_CSS_CSI; in nvme_multi_css()
1007 if (anv->ctrl.ctrl_config & NVME_CC_ENABLE) in apple_nvme_reset_work()
2718 bool was_suspend = !!(dev->ctrl.ctrl_config & NVME_CC_SHN_NORMAL); in nvme_reset_work()2732 if (dev->ctrl.ctrl_config & NVME_CC_ENABLE) in nvme_reset_work()