/openbmc/linux/drivers/crypto/intel/qat/qat_common/ |
H A D | adf_gen4_hw_data.c | 86 void adf_gen4_init_hw_csr_ops(struct adf_hw_csr_ops *csr_ops) in adf_gen4_init_hw_csr_ops() argument 88 csr_ops->build_csr_ring_base_addr = build_csr_ring_base_addr; in adf_gen4_init_hw_csr_ops() 89 csr_ops->read_csr_ring_head = read_csr_ring_head; in adf_gen4_init_hw_csr_ops() 90 csr_ops->write_csr_ring_head = write_csr_ring_head; in adf_gen4_init_hw_csr_ops() 91 csr_ops->read_csr_ring_tail = read_csr_ring_tail; in adf_gen4_init_hw_csr_ops() 92 csr_ops->write_csr_ring_tail = write_csr_ring_tail; in adf_gen4_init_hw_csr_ops() 93 csr_ops->read_csr_e_stat = read_csr_e_stat; in adf_gen4_init_hw_csr_ops() 94 csr_ops->write_csr_ring_config = write_csr_ring_config; in adf_gen4_init_hw_csr_ops() 95 csr_ops->write_csr_ring_base = write_csr_ring_base; in adf_gen4_init_hw_csr_ops() 96 csr_ops->write_csr_int_flag = write_csr_int_flag; in adf_gen4_init_hw_csr_ops() [all …]
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H A D | adf_transport.c | 61 struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(bank->accel_dev); in adf_enable_ring_irq() local 66 csr_ops->write_csr_int_col_en(bank->csr_addr, bank->bank_number, in adf_enable_ring_irq() 68 csr_ops->write_csr_int_col_ctl(bank->csr_addr, bank->bank_number, in adf_enable_ring_irq() 74 struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(bank->accel_dev); in adf_disable_ring_irq() local 79 csr_ops->write_csr_int_col_en(bank->csr_addr, bank->bank_number, in adf_disable_ring_irq() 90 struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(ring->bank->accel_dev); in adf_send_message() local 104 csr_ops->write_csr_ring_tail(ring->bank->csr_addr, in adf_send_message() 114 struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(ring->bank->accel_dev); in adf_handle_response() local 129 csr_ops->write_csr_ring_head(ring->bank->csr_addr, in adf_handle_response() 138 struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(ring->bank->accel_dev); in adf_configure_tx_ring() local [all …]
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H A D | adf_gen2_hw_data.c | 192 void adf_gen2_init_hw_csr_ops(struct adf_hw_csr_ops *csr_ops) in adf_gen2_init_hw_csr_ops() argument 194 csr_ops->build_csr_ring_base_addr = build_csr_ring_base_addr; in adf_gen2_init_hw_csr_ops() 195 csr_ops->read_csr_ring_head = read_csr_ring_head; in adf_gen2_init_hw_csr_ops() 196 csr_ops->write_csr_ring_head = write_csr_ring_head; in adf_gen2_init_hw_csr_ops() 197 csr_ops->read_csr_ring_tail = read_csr_ring_tail; in adf_gen2_init_hw_csr_ops() 198 csr_ops->write_csr_ring_tail = write_csr_ring_tail; in adf_gen2_init_hw_csr_ops() 199 csr_ops->read_csr_e_stat = read_csr_e_stat; in adf_gen2_init_hw_csr_ops() 200 csr_ops->write_csr_ring_config = write_csr_ring_config; in adf_gen2_init_hw_csr_ops() 201 csr_ops->write_csr_ring_base = write_csr_ring_base; in adf_gen2_init_hw_csr_ops() 202 csr_ops->write_csr_int_flag = write_csr_int_flag; in adf_gen2_init_hw_csr_ops() [all …]
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H A D | adf_transport_debug.c | 45 struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(bank->accel_dev); in adf_ring_show() local 51 head = csr_ops->read_csr_ring_head(csr, bank->bank_number, in adf_ring_show() 53 tail = csr_ops->read_csr_ring_tail(csr, bank->bank_number, in adf_ring_show() 55 empty = csr_ops->read_csr_e_stat(csr, bank->bank_number); in adf_ring_show() 148 struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(bank->accel_dev); in adf_bank_show() local 162 head = csr_ops->read_csr_ring_head(csr, bank->bank_number, in adf_bank_show() 164 tail = csr_ops->read_csr_ring_tail(csr, bank->bank_number, in adf_bank_show() 166 empty = csr_ops->read_csr_e_stat(csr, bank->bank_number); in adf_bank_show()
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H A D | adf_hw_arbiter.c | 52 struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(accel_dev); in adf_update_ring_arb() local 69 csr_ops->write_csr_ring_srv_arb_en(ring->bank->csr_addr, in adf_update_ring_arb() 76 struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(accel_dev); in adf_exit_arb() local 99 csr_ops->write_csr_ring_srv_arb_en(csr, i, 0); in adf_exit_arb()
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H A D | adf_vf_isr.c | 134 struct adf_hw_csr_ops *csr_ops = &hw_data->csr_ops; in adf_isr() local 169 csr_ops->write_csr_int_flag_and_col(bank->csr_addr, in adf_isr()
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H A D | adf_isr.c | 50 struct adf_hw_csr_ops *csr_ops = GET_CSR_OPS(bank->accel_dev); in adf_msix_isr_bundle() local 52 csr_ops->write_csr_int_flag_and_col(bank->csr_addr, bank->bank_number, in adf_msix_isr_bundle()
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H A D | adf_accel_devices.h | 216 struct adf_hw_csr_ops csr_ops; member 267 #define GET_CSR_OPS(accel_dev) (&(accel_dev)->hw_device->csr_ops)
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H A D | adf_gen4_hw_data.h | 143 void adf_gen4_init_hw_csr_ops(struct adf_hw_csr_ops *csr_ops);
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H A D | adf_gen2_hw_data.h | 161 void adf_gen2_init_hw_csr_ops(struct adf_hw_csr_ops *csr_ops);
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/openbmc/qemu/target/riscv/ |
H A D | th_csr.c | 33 riscv_csr_operations csr_ops; member 66 .csr_ops = { "th.sxstatus", smode, read_th_sxstatus } 74 riscv_csr_operations *csr_ops = &th_csr_list[i].csr_ops; in th_register_custom_csrs() local 76 riscv_set_csr_ops(csrno, csr_ops); in th_register_custom_csrs()
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H A D | gdbstub.c | 264 if (env->priv_ver < csr_ops[i].min_priv_ver) { in riscv_gen_dynamic_csr_feature() 267 predicate = csr_ops[i].predicate; in riscv_gen_dynamic_csr_feature() 269 name = csr_ops[i].name; in riscv_gen_dynamic_csr_feature()
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H A D | csr.c | 36 *ops = csr_ops[csrno & (CSR_TABLE_SIZE - 1)]; in riscv_get_csr_ops() 41 csr_ops[csrno & (CSR_TABLE_SIZE - 1)] = *ops; in riscv_set_csr_ops() 4712 int csr_min_priv = csr_ops[csrno].min_priv_ver; in riscv_csrrw_check() 4720 if (!csr_ops[csrno].predicate) { in riscv_csrrw_check() 4741 RISCVException ret = csr_ops[csrno].predicate(env, csrno); in riscv_csrrw_check() 4778 if (csr_ops[csrno].op) { in riscv_csrrw_do64() 4779 return csr_ops[csrno].op(env, csrno, ret_value, new_value, write_mask); in riscv_csrrw_do64() 4788 if (!csr_ops[csrno].read) { in riscv_csrrw_do64() 4792 ret = csr_ops[csrno].read(env, csrno, &old_value); in riscv_csrrw_do64() 4801 if (csr_ops[csrno].write) { in riscv_csrrw_do64() [all …]
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H A D | cpu.h | 884 extern riscv_csr_operations csr_ops[CSR_TABLE_SIZE];
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H A D | cpu.c | 816 csr_ops[csrno].name, val); in riscv_cpu_dump_state() 834 csr_ops[CSR_FCSR].name, val); in riscv_cpu_dump_state() 865 csr_ops[csrno].name, val); in riscv_cpu_dump_state()
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/openbmc/linux/drivers/crypto/intel/qat/qat_c3xxxvf/ |
H A D | adf_c3xxxvf_hw_data.c | 94 adf_gen2_init_hw_csr_ops(&hw_data->csr_ops); in adf_init_hw_data_c3xxxiov()
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/openbmc/linux/drivers/crypto/intel/qat/qat_dh895xccvf/ |
H A D | adf_dh895xccvf_hw_data.c | 94 adf_gen2_init_hw_csr_ops(&hw_data->csr_ops); in adf_init_hw_data_dh895xcciov()
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/openbmc/linux/drivers/crypto/intel/qat/qat_c62xvf/ |
H A D | adf_c62xvf_hw_data.c | 94 adf_gen2_init_hw_csr_ops(&hw_data->csr_ops); in adf_init_hw_data_c62xiov()
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/openbmc/linux/drivers/crypto/intel/qat/qat_c3xxx/ |
H A D | adf_c3xxx_hw_data.c | 160 adf_gen2_init_hw_csr_ops(&hw_data->csr_ops); in adf_init_hw_data_c3xxx()
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/openbmc/linux/drivers/crypto/intel/qat/qat_c62x/ |
H A D | adf_c62x_hw_data.c | 162 adf_gen2_init_hw_csr_ops(&hw_data->csr_ops); in adf_init_hw_data_c62x()
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/openbmc/linux/drivers/crypto/intel/qat/qat_dh895xcc/ |
H A D | adf_dh895xcc_hw_data.c | 262 adf_gen2_init_hw_csr_ops(&hw_data->csr_ops); in adf_init_hw_data_dh895xcc()
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/openbmc/linux/drivers/crypto/intel/qat/qat_4xxx/ |
H A D | adf_4xxx_hw_data.c | 571 adf_gen4_init_hw_csr_ops(&hw_data->csr_ops); in adf_init_hw_data_4xxx()
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/openbmc/linux/drivers/net/ethernet/renesas/ |
H A D | ravb_main.c | 71 u32 csr_ops = 1U << (opmode & CCC_OPC); in ravb_set_opmode() local 85 error = ravb_wait(ndev, CSR, CSR_OPS, csr_ops); in ravb_set_opmode()
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