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Searched refs:cr4 (Results 1 – 25 of 93) sorted by relevance

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/openbmc/linux/tools/testing/selftests/kvm/x86_64/
H A Dset_sregs_test.c47 uint64_t cr4; in calc_supported_cr4_feature_bits() local
49 cr4 = X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE | in calc_supported_cr4_feature_bits()
53 cr4 |= X86_CR4_UMIP; in calc_supported_cr4_feature_bits()
55 cr4 |= X86_CR4_LA57; in calc_supported_cr4_feature_bits()
57 cr4 |= X86_CR4_VMXE; in calc_supported_cr4_feature_bits()
59 cr4 |= X86_CR4_SMXE; in calc_supported_cr4_feature_bits()
61 cr4 |= X86_CR4_FSGSBASE; in calc_supported_cr4_feature_bits()
63 cr4 |= X86_CR4_PCIDE; in calc_supported_cr4_feature_bits()
65 cr4 |= X86_CR4_OSXSAVE; in calc_supported_cr4_feature_bits()
67 cr4 |= X86_CR4_SMEP; in calc_supported_cr4_feature_bits()
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H A Dcr4_cpuid_sync_test.c24 uint64_t cr4 = get_cr4(); in cr4_cpuid_is_sync() local
26 return (this_cpu_has(X86_FEATURE_OSXSAVE) == !!(cr4 & X86_CR4_OSXSAVE)); in cr4_cpuid_is_sync()
31 uint64_t cr4; in guest_code() local
34 cr4 = get_cr4(); in guest_code()
35 cr4 |= X86_CR4_OSXSAVE; in guest_code()
36 set_cr4(cr4); in guest_code()
69 sregs.cr4 &= ~X86_CR4_OSXSAVE; in main()
H A Dsync_regs_test.c137 __u64 *cr4 = &run->s.regs.sregs.cr4; in race_sregs_cr4() local
138 __u64 pae_enabled = *cr4; in race_sregs_cr4()
139 __u64 pae_disabled = *cr4 & ~X86_CR4_PAE; in race_sregs_cr4()
143 WRITE_ONCE(*cr4, pae_enabled); in race_sregs_cr4()
147 WRITE_ONCE(*cr4, pae_disabled); in race_sregs_cr4()
180 TEST_ASSERT((run->s.regs.sregs.cr4 & X86_CR4_PAE) && in race_sync_regs()
183 !!(run->s.regs.sregs.cr4 & X86_CR4_PAE), in race_sync_regs()
H A Damx_test.c129 uint64_t cr4, xcr0; in init_regs() local
134 cr4 = get_cr4(); in init_regs()
135 cr4 |= X86_CR4_OSXSAVE; in init_regs()
136 set_cr4(cr4); in init_regs()
/openbmc/linux/drivers/misc/lkdtm/
H A Dbugs.c501 unsigned long cr4; in lkdtm_UNSET_SMEP() local
504 cr4 = native_read_cr4(); in lkdtm_UNSET_SMEP()
506 if ((cr4 & X86_CR4_SMEP) != X86_CR4_SMEP) { in lkdtm_UNSET_SMEP()
510 cr4 &= ~(X86_CR4_SMEP); in lkdtm_UNSET_SMEP()
513 native_write_cr4(cr4); in lkdtm_UNSET_SMEP()
514 if (cr4 == native_read_cr4()) { in lkdtm_UNSET_SMEP()
516 cr4 |= X86_CR4_SMEP; in lkdtm_UNSET_SMEP()
518 native_write_cr4(cr4); in lkdtm_UNSET_SMEP()
548 direct_write_cr4(cr4); in lkdtm_UNSET_SMEP()
553 cr4 |= X86_CR4_SMEP; in lkdtm_UNSET_SMEP()
[all …]
/openbmc/linux/arch/x86/kvm/
H A Dsmm.c30 CHECK_SMRAM32_OFFSET(cr4, 0xFF14); in check_smram_offsets()
96 CHECK_SMRAM64_OFFSET(cr4, 0xFF48); in check_smram_offsets()
222 smram->cr4 = kvm_read_cr4(vcpu); in enter_smm_save_state_32()
251 smram->cr4 = kvm_read_cr4(vcpu); in enter_smm_save_state_64()
423 u64 cr0, u64 cr3, u64 cr4) in rsm_enter_protected_mode() argument
430 if (cr4 & X86_CR4_PCIDE) { in rsm_enter_protected_mode()
444 bad = kvm_set_cr4(vcpu, cr4 & ~X86_CR4_PCIDE); in rsm_enter_protected_mode()
452 if (cr4 & X86_CR4_PCIDE) { in rsm_enter_protected_mode()
453 bad = kvm_set_cr4(vcpu, cr4); in rsm_enter_protected_mode()
507 smstate->cr3, smstate->cr4); in rsm_load_state_32()
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H A Dsmm.h31 u32 cr4; member
127 u64 cr4; member
/openbmc/linux/arch/x86/power/
H A Dhibernate_asm_32.S55 jecxz 1f # cr4 Pentium and higher, skip if zero
57 movl %ecx, %cr4; # turn off PGE
89 jecxz 1f # cr4 Pentium and higher, skip if zero
90 movl %ecx, %cr4; # turn PGE back on
H A Dhibernate_asm_64.S36 movq %rdx, %cr4; # turn off PGE
39 movq %rax, %cr4; # turn PGE back on
127 movq %rcx, %cr4; # turn off PGE
130 movq %rbx, %cr4; # turn PGE back on
H A Dcpu.c126 ctxt->cr4 = __read_cr4(); in __save_processor_state()
206 if (ctxt->cr4) in __restore_processor_state()
207 __write_cr4(ctxt->cr4); in __restore_processor_state()
211 __write_cr4(ctxt->cr4); in __restore_processor_state()
/openbmc/linux/arch/x86/kernel/
H A Dsev_verify_cbit.S35 movq %cr4, %rsi
40 movq %rdx, %cr4
71 movq %rsi, %cr4
H A Drelocate_kernel_64.S72 movq %cr4, %rax
127 movq %cr4, %rax
129 movq %rax, %cr4
155 movq %rax, %cr4
239 movq %rax, %cr4
H A Dprocess_32.c62 unsigned long cr0 = 0L, cr2 = 0L, cr3 = 0L, cr4 = 0L; in __show_regs() local
83 cr4 = __read_cr4(); in __show_regs()
85 log_lvl, cr0, cr2, cr3, cr4); in __show_regs()
H A Dhead_64.S177 movq %cr4, %rcx
191 movq %rcx, %cr4
219 movq %cr4, %rcx
222 movq %rcx, %cr4
223 movq %rax, %cr4
/openbmc/linux/arch/x86/platform/pvh/
H A Dhead.S74 mov %cr4, %eax
76 mov %eax, %cr4
133 mov %cr4, %eax
135 mov %eax, %cr4
/openbmc/linux/arch/x86/kernel/cpu/mtrr/
H A Dcyrix.c135 static u32 cr4, ccr3; variable
143 cr4 = __read_cr4(); in prepare_set()
144 __write_cr4(cr4 & ~X86_CR4_PGE); in prepare_set()
176 __write_cr4(cr4); in post_set()
/openbmc/linux/arch/x86/include/asm/
H A Dtlbflush.h129 unsigned long cr4; member
180 this_cpu_write(cpu_tlbstate.cr4, __read_cr4()); in cr4_init_shadow()
423 static inline void __native_tlb_flush_global(unsigned long cr4) in __native_tlb_flush_global() argument
425 native_write_cr4(cr4 ^ X86_CR4_PGE); in __native_tlb_flush_global()
426 native_write_cr4(cr4); in __native_tlb_flush_global()
/openbmc/u-boot/drivers/spi/
H A Dsh_spi.c78 sh_spi_clear_bit(SH_SPI_SSS0 | SH_SPI_SSS1, &ss->regs->cr4); in sh_spi_set_cs()
79 sh_spi_set_bit(val, &ss->regs->cr4); in sh_spi_set_cs()
146 !(sh_spi_read(&ss->regs->cr4) & SH_SPI_WPABRT) && in sh_spi_send()
153 if (sh_spi_read(&ss->regs->cr4) & SH_SPI_WPABRT) { in sh_spi_send()
156 sh_spi_set_bit(SH_SPI_WPABRT, &ss->regs->cr4); in sh_spi_send()
/openbmc/linux/arch/x86/mm/
H A Dmem_encrypt_boot.S102 mov %cr4, %rdx
104 mov %rdx, %cr4
106 mov %rdx, %cr4
/openbmc/linux/arch/x86/boot/compressed/
H A Dhead_64.S169 movl %cr4, %eax
171 movl %eax, %cr4
402 movq %cr4, %rax
404 movq %rax, %cr4
558 movl %cr4, %eax
560 movl %eax, %cr4
/openbmc/linux/include/xen/interface/hvm/
H A Dhvm_vcpu.h25 uint32_t cr4; member
88 uint64_t cr4; member
/openbmc/linux/tools/testing/selftests/kvm/lib/x86_64/
H A Dvmx.c121 unsigned long cr4; in prepare_for_vmx_operation() local
133 __asm__ __volatile__("mov %%cr4, %0" : "=r"(cr4) : : "memory"); in prepare_for_vmx_operation()
134 cr4 &= rdmsr(MSR_IA32_VMX_CR4_FIXED1); in prepare_for_vmx_operation()
135 cr4 |= rdmsr(MSR_IA32_VMX_CR4_FIXED0); in prepare_for_vmx_operation()
137 cr4 |= X86_CR4_VMXE; in prepare_for_vmx_operation()
138 __asm__ __volatile__("mov %0, %%cr4" : : "r"(cr4) : "memory"); in prepare_for_vmx_operation()
/openbmc/qemu/target/i386/hvf/
H A Dvmx.h164 static inline void macvm_set_cr4(hv_vcpuid_t vcpu, uint64_t cr4) in macvm_set_cr4() argument
166 uint64_t guest_cr4 = cr4 | CR4_VMXE_MASK; in macvm_set_cr4()
169 wvmcs(vcpu, VMCS_CR4_SHADOW, cr4); in macvm_set_cr4()
/openbmc/linux/arch/x86/kernel/cpu/
H A Dcommon.c433 asm volatile("mov %0,%%cr4": "+r" (val) : : "memory"); in native_write_cr4()
452 unsigned long newval, cr4 = this_cpu_read(cpu_tlbstate.cr4); in cr4_update_irqsoff() local
456 newval = (cr4 & ~clear) | set; in cr4_update_irqsoff()
457 if (newval != cr4) { in cr4_update_irqsoff()
458 this_cpu_write(cpu_tlbstate.cr4, newval); in cr4_update_irqsoff()
467 return this_cpu_read(cpu_tlbstate.cr4); in cr4_read_shadow()
473 unsigned long cr4 = __read_cr4(); in cr4_init() local
476 cr4 |= X86_CR4_PCIDE; in cr4_init()
478 cr4 in cr4_init()
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/openbmc/linux/arch/x86/platform/olpc/
H A Dxo1-wakeup.S30 movl %eax, %cr4
64 movl %cr4, %edx

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