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Searched refs:cpu_gpr_hi (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/target/mips/tcg/
H A Dtx79_translate.c138 gen_logic_i64(cpu_gpr_hi[a->rd], ax, bx); in trans_parallel_arith()
268 tcg_gen_deposit_i64(cpu_gpr_hi[a->rd], cpu_gpr_hi[a->rd], t2, wlen * i, wlen); in trans_parallel_compare()
437 tcg_gen_deposit_i64(cpu_gpr_hi[a->rd], a0, t0, 32, 32); in trans_PPACW()
474 tcg_gen_deposit_i64(cpu_gpr_hi[a->rd], in trans_PEXTLx()
475 cpu_gpr_hi[a->rd], bx, 2 * wlen * i, wlen); in trans_PEXTLx()
476 tcg_gen_deposit_i64(cpu_gpr_hi[a->rd], in trans_PEXTLx()
477 cpu_gpr_hi[a->rd], ax, 2 * wlen * i + wlen, wlen); in trans_PEXTLx()
511 gen_pextw(cpu_gpr[a->rd], cpu_gpr_hi[a->rd], ax, bx); in trans_PEXTLW()
530 gen_pextw(cpu_gpr[a->rd], cpu_gpr_hi[a->rd], ax, bx); in trans_PEXTUW()
565 tcg_gen_movi_i64(cpu_gpr_hi[a->rd], 0); in trans_PCPYH()
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H A Dtranslate.h187 extern TCGv_i64 cpu_gpr_hi[32];
H A Dtranslate.c1173 TCGv_i64 cpu_gpr_hi[32]; variable
1212 assert(reg >= 0 && reg <= ARRAY_SIZE(cpu_gpr_hi)); in gen_load_gpr_hi()
1216 tcg_gen_mov_i64(t, cpu_gpr_hi[reg]); in gen_load_gpr_hi()
1222 assert(reg >= 0 && reg <= ARRAY_SIZE(cpu_gpr_hi)); in gen_store_gpr_hi()
1224 tcg_gen_mov_i64(cpu_gpr_hi[reg], t); in gen_store_gpr_hi()
15251 cpu_gpr_hi[0] = NULL; in mips_tcg_init()
15256 cpu_gpr_hi[i] = tcg_global_mem_new_i64(tcg_env, in mips_tcg_init()