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/openbmc/linux/Documentation/devicetree/bindings/arm/marvell/
H A Dcoherency-fabric.txt9 * "marvell,coherency-fabric", to be used for the coherency fabric of
12 * "marvell,armada-375-coherency-fabric", for the Armada 375 coherency
15 * "marvell,armada-380-coherency-fabric", for the Armada 38x coherency
18 - reg: Should contain coherency fabric registers location and
21 * For "marvell,coherency-fabric", the first pair for the coherency
24 * For "marvell,armada-375-coherency-fabric", only one pair is needed
27 * For "marvell,armada-380-coherency-fabric", only one pair is needed
37 coherency-fabric@d0020200 {
38 compatible = "marvell,coherency-fabric";
44 coherency-fabric@21810 {
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/openbmc/linux/Documentation/devicetree/bindings/powerpc/fsl/
H A Dccf.txt5 The CoreNet coherency fabric is a fabric-oriented, connectivity infrastructure
11 fsl,corenet1-cf - CoreNet coherency fabric version 1.
14 fsl,corenet2-cf - CoreNet coherency fabric version 2.
/openbmc/linux/Documentation/filesystems/caching/
H A Dnetfs-api.rst18 (4) Cookies have coherency data that allows a cache to determine if the
35 (7) Data file coherency
72 for the cookie in the background, to check its coherency and, if necessary, to
104 and notes the coherency data.
116 The specified coherency data is stored in the cookie and will be matched
117 against coherency data stored on disk. The data pointer may be NULL if no data
118 is provided. If the coherency data doesn't match, the entire cache volume will
136 coherency data will be set to the value supplied. The amount of coherency data
163 The caller should also pass in a piece of coherency data in aux_data. A buffer
164 of size aux_data_len will be allocated and the coherency data copied in. It is
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H A Dbackend-api.rst147 u8 coherency[];
165 * ``coherency`` - A piece of coherency data that should be checked when the
168 * ``coherency_len`` - The amount of data in the coherency buffer.
203 * FSCACHE_COOKIE_NEEDS_UPDATE - The coherency data and/or object size has
227 * ``aux_len`` - The length of the coherency data buffer.
237 Each cookie also has a buffer for coherency data. This may also be inline or
/openbmc/linux/Documentation/arch/arm/
H A Dcluster-pm-race-avoidance.rst6 cluster setup and teardown operations and to manage hardware coherency
33 mechanisms like Linux spinlocks may rely on coherency mechanisms which
73 enabling coherency.
83 coherency exit.
160 A CPU cannot start participating in hardware coherency until the
178 start participating in local coherency.
201 While in this state, the CPU exits coherency, including any
318 enabling of hardware coherency at the cluster level and any
323 setup to enable other CPUs in the cluster to enter coherency
329 cluster-level setup and hardware coherency complete
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/openbmc/linux/Documentation/ABI/removed/
H A Dnet_dma7 coherency issues of the cpu potentially touching the buffers
/openbmc/linux/Documentation/filesystems/
H A Docfs2.rst106 coherency=full (*) Disallow concurrent O_DIRECT writes, cluster inode
108 therefore full cluster coherency is guaranteed even
110 coherency=buffered Allow concurrent O_DIRECT writes without EX lock among
/openbmc/linux/arch/arm/mach-mvebu/
H A DMakefile7 obj-y += cpu-reset.o board-v7.o coherency.o coherency_ll.o pmsu.o pmsu_ll.o
/openbmc/linux/fs/fscache/
H A Dvolume.c233 volume = kzalloc(struct_size(volume, coherency, coherency_len), in fscache_alloc_volume()
241 memcpy(volume->coherency, coherency_data, coherency_len); in fscache_alloc_volume()
450 memcpy(volume->coherency, coherency_data, volume->coherency_len); in __fscache_relinquish_volume()
/openbmc/linux/arch/arm/boot/dts/broadcom/
H A Dbcm-nsp-ax.dtsi5 * lack of DMA coherency.
/openbmc/linux/drivers/gpu/drm/i915/selftests/
H A Di915_live_selftests.h36 selftest(coherency, i915_gem_coherency_live_selftests)
/openbmc/linux/fs/cachefiles/
H A Dxattr.c209 const void *p = volume->vcookie->coherency; in cachefiles_set_volume_xattr()
258 const void *p = volume->vcookie->coherency; in cachefiles_check_volume_xattr()
/openbmc/u-boot/arch/arc/
H A DKconfig130 bool "Enable IO coherency unit"
134 Enable IO coherency unit to debug problems with caches and
/openbmc/linux/Documentation/devicetree/bindings/watchdog/
H A Dmarvel.txt29 "nbclk" (L2/coherency fabric clock),
/openbmc/linux/Documentation/devicetree/bindings/timer/
H A Dmarvell,armada-370-xp-timer.txt22 "nbclk" (L2/coherency fabric clock),
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Darmada-370-xp.dtsi176 coherencyfab: coherency-fabric@20200 {
177 compatible = "marvell,coherency-fabric";
H A Darmada-370-seagate-personal-cloud.dtsi34 coherency-fabric@20200 {
/openbmc/linux/Documentation/devicetree/bindings/pci/
H A Dlayerscape-pcie-gen4.txt20 - dma-coherent: Indicates that the hardware IP block can ensure the coherency
H A Dlayerscape-pci.txt46 - dma-coherent: Indicates that the hardware IP block can ensure the coherency
/openbmc/u-boot/arch/arm/cpu/armv8/
H A DKconfig18 bool "Enable data coherency with other cores in cluster"
23 For A53, it enables data coherency with other cores in the
/openbmc/u-boot/arch/arm/dts/
H A Darmada-370-xp.dtsi238 coherency-fabric@20200 {
239 compatible = "marvell,coherency-fabric";
/openbmc/qemu/target/mips/
H A Dcpu-defs.c.inc23 /* Have config1, uncached coherency */
82 no virtual icache, uncached coherency. */
376 no virtual icache, uncached coherency. */
553 /* No L2 cache, icache size 8k, dcache size 8k, uncached coherency. */
575 /* No L2 cache, icache size 8k, dcache size 8k, uncached coherency. */
/openbmc/u-boot/doc/
H A DREADME.arm-caches34 happens with the DMA buffer while DMA is going on we have a coherency problem.
/openbmc/linux/arch/powerpc/boot/dts/
H A Damigaone.dts13 coherency-off;
/openbmc/linux/drivers/block/drbd/
H A DKconfig35 cache coherency.

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