Searched refs:clock_set_pll3 (Results 1 – 7 of 7) sorted by relevance
289 clock_set_pll3(297000000); /* Fix the video pll at 297 MHz */ in lcdc_pll_set()296 clock_set_pll3(best_n * step * 1000); in lcdc_pll_set()
346 clock_set_pll3(297000000); in sunxi_dw_hdmi_probe()
98 clock_set_pll3(300000000); in sunxi_hdmi_hpd_detect()144 clock_set_pll3(0); in sunxi_hdmi_shutdown()
182 void clock_set_pll3(unsigned int clk) in clock_set_pll3() function
148 void clock_set_pll3(unsigned int clk) in clock_set_pll3() function
356 void clock_set_pll3(unsigned int hz);
522 void clock_set_pll3(unsigned int hz);