Home
last modified time | relevance | path

Searched refs:cfg_val (Results 1 – 20 of 20) sorted by relevance

/openbmc/u-boot/drivers/gpio/
H A Dmvmfp.c32 u32 cfg_val, val; in mfp_config() local
35 cfg_val = *mfp_cfgs++; in mfp_config()
37 if (cfg_val == MFP_EOC) in mfp_config()
41 + MFP_REG_GET_OFFSET(cfg_val)); in mfp_config()
45 if (cfg_val & MFP_VALUE_MASK) in mfp_config()
46 val |= cfg_val & MFP_VALUE_MASK; in mfp_config()
/openbmc/u-boot/arch/arm/mach-imx/
H A Dinit.c104 void boot_mode_apply(unsigned cfg_val) in boot_mode_apply() argument
108 writel(cfg_val, &psrc->gpr9); in boot_mode_apply()
110 if (cfg_val) in boot_mode_apply()
H A Dcmd_bmode.c74 boot_mode_apply(p->cfg_val); in do_boot_mode()
75 if (reset_requested && p->cfg_val) in do_boot_mode()
/openbmc/qemu/target/riscv/
H A Dpmp.c470 uint8_t cfg_val; in pmpcfg_csr_write() local
477 cfg_val = (val >> 8 * i) & 0xff; in pmpcfg_csr_write()
478 modified |= pmp_write_cfg(env, (reg_index * 4) + i, cfg_val); in pmpcfg_csr_write()
495 target_ulong cfg_val = 0; in pmpcfg_csr_read() local
501 cfg_val |= (val << (i * 8)); in pmpcfg_csr_read()
503 trace_pmpcfg_csr_read(env->mhartid, reg_index, cfg_val); in pmpcfg_csr_read()
505 return cfg_val; in pmpcfg_csr_read()
H A Dcsr.c1049 uint64_t cfg_val = 0; in riscv_pmu_ctr_get_fixed_counters_val() local
1052 cfg_val = upper_half ? ((uint64_t)env->mcyclecfgh << 32) : in riscv_pmu_ctr_get_fixed_counters_val()
1055 cfg_val = upper_half ? ((uint64_t)env->minstretcfgh << 32) : in riscv_pmu_ctr_get_fixed_counters_val()
1058 cfg_val = upper_half ? in riscv_pmu_ctr_get_fixed_counters_val()
1061 cfg_val &= MHPMEVENT_FILTER_MASK; in riscv_pmu_ctr_get_fixed_counters_val()
1064 if (!cfg_val) { in riscv_pmu_ctr_get_fixed_counters_val()
1077 if (!(cfg_val & MCYCLECFG_BIT_MINH)) { in riscv_pmu_ctr_get_fixed_counters_val()
1081 if (!(cfg_val & MCYCLECFG_BIT_SINH)) { in riscv_pmu_ctr_get_fixed_counters_val()
1085 if (!(cfg_val & MCYCLECFG_BIT_UINH)) { in riscv_pmu_ctr_get_fixed_counters_val()
1089 if (!(cfg_val & MCYCLECFG_BIT_VSINH)) { in riscv_pmu_ctr_get_fixed_counters_val()
[all …]
/openbmc/u-boot/arch/arm/include/asm/mach-imx/
H A Dboot_mode.h45 unsigned cfg_val; member
49 void boot_mode_apply(unsigned cfg_val);
/openbmc/u-boot/arch/arm/mach-imx/mx5/
H A Dsoc.c88 void boot_mode_apply(unsigned cfg_val) in boot_mode_apply() argument
90 writel(cfg_val, &((struct srtc_regs *)SRTC_BASE_ADDR)->lpgr); in boot_mode_apply()
/openbmc/linux/sound/x86/
H A Dintel_hdmi_audio.c353 union aud_cfg cfg_val = {.regval = 0}; in had_init_audio_ctrl() local
365 cfg_val.regx.num_ch = channels - 2; in had_init_audio_ctrl()
367 cfg_val.regx.layout = LAYOUT0; in had_init_audio_ctrl()
369 cfg_val.regx.layout = LAYOUT1; in had_init_audio_ctrl()
372 cfg_val.regx.packet_mode = 1; in had_init_audio_ctrl()
375 cfg_val.regx.left_align = 1; in had_init_audio_ctrl()
377 cfg_val.regx.val_bit = 1; in had_init_audio_ctrl()
381 cfg_val.regx.dp_modei = 1; in had_init_audio_ctrl()
382 cfg_val.regx.set = 1; in had_init_audio_ctrl()
385 had_write_register(intelhaddata, AUD_CONFIG, cfg_val.regval); in had_init_audio_ctrl()
[all …]
/openbmc/linux/drivers/pinctrl/bcm/
H A Dpinctrl-bcm281xx.c1331 u32 cfg_val, cfg_mask; in bcm281xx_pinctrl_pin_config_set() local
1334 cfg_val = 0; in bcm281xx_pinctrl_pin_config_set()
1342 num_configs, &cfg_val, &cfg_mask); in bcm281xx_pinctrl_pin_config_set()
1347 num_configs, &cfg_val, &cfg_mask); in bcm281xx_pinctrl_pin_config_set()
1352 num_configs, &cfg_val, &cfg_mask); in bcm281xx_pinctrl_pin_config_set()
1367 __func__, pdata->pins[pin].name, pin, cfg_val, cfg_mask); in bcm281xx_pinctrl_pin_config_set()
1369 rc = regmap_update_bits(pdata->regmap, offset, cfg_mask, cfg_val); in bcm281xx_pinctrl_pin_config_set()
/openbmc/linux/drivers/clk/xilinx/
H A Dxlnx_vcu.c290 u32 cfg_val; in xvcu_pll_set_div() local
301 cfg_val = FIELD_PREP(VCU_PLL_CFG_RES, cfg->res) | in xvcu_pll_set_div()
306 xvcu_write(base, VCU_PLL_CFG, cfg_val); in xvcu_pll_set_div()
/openbmc/linux/include/linux/
H A Dresctrl.h216 u32 closid, enum resctrl_conf_type t, u32 cfg_val);
/openbmc/u-boot/drivers/spi/
H A Dfsl_dspi.c146 static void fsl_dspi_init_mcr(struct fsl_dspi_priv *priv, uint cfg_val) in fsl_dspi_init_mcr() argument
151 dspi_write32(priv->flags, &priv->regs->mcr, cfg_val); in fsl_dspi_init_mcr()
156 priv->mcr_val = cfg_val; in fsl_dspi_init_mcr()
/openbmc/linux/drivers/media/i2c/
H A Dtc358746.c464 static u32 tc358746_cfg_to_cnt(unsigned int cfg_val, in tc358746_cfg_to_cnt() argument
468 return DIV_ROUND_UP(cfg_val * clk_mhz, time_base); in tc358746_cfg_to_cnt()
471 static u32 tc358746_ps_to_cnt(unsigned int cfg_val, in tc358746_ps_to_cnt() argument
474 return tc358746_cfg_to_cnt(cfg_val, clk_mhz, USEC_PER_SEC); in tc358746_ps_to_cnt()
477 static u32 tc358746_us_to_cnt(unsigned int cfg_val, in tc358746_us_to_cnt() argument
480 return tc358746_cfg_to_cnt(cfg_val, clk_mhz, 1); in tc358746_us_to_cnt()
/openbmc/linux/arch/x86/kernel/cpu/resctrl/
H A Dctrlmondata.c290 u32 closid, enum resctrl_conf_type t, u32 cfg_val) in resctrl_arch_update_one() argument
300 hw_dom->ctrl_val[idx] = cfg_val; in resctrl_arch_update_one()
/openbmc/linux/drivers/parisc/
H A Dsba_iommu.c1652 unsigned long cfg_val; in sba_hw_init() local
1655 cfg_val = READ_REG(rope_cfg); in sba_hw_init()
1656 cfg_val &= ~IOC_ROPE_AO; in sba_hw_init()
1657 WRITE_REG(cfg_val, rope_cfg); in sba_hw_init()
/openbmc/linux/arch/loongarch/kernel/
H A Dptrace.c234 u32 cfg_val; in cfg_get() local
238 cfg_val = read_cpucfg(i++); in cfg_get()
239 r = membuf_write(&to, &cfg_val, sizeof(u32)); in cfg_get()
/openbmc/linux/drivers/misc/cardreader/
H A Drtsx_pcr.c1348 u16 cfg_val; in rtsx_pci_init_chip() local
1418 pcie_capability_read_word(pcr->pci, PCI_EXP_LNKCTL, &cfg_val); in rtsx_pci_init_chip()
1419 if (cfg_val & PCI_EXP_LNKCTL_ASPM_L1) in rtsx_pci_init_chip()
1456 pcie_capability_read_word(pcr->pci, PCI_EXP_DEVCTL2, &cfg_val); in rtsx_pci_init_chip()
1457 if (cfg_val & PCI_EXP_DEVCTL2_LTR_EN) { in rtsx_pci_init_chip()
/openbmc/qemu/hw/intc/
H A Dpnv_xive.c77 uint64_t cfg_val = xive->regs[PC_TCTXT_CFG >> 3]; in pnv_xive_block_id() local
79 if (cfg_val & PC_TCTXT_CHIPID_OVERRIDE) { in pnv_xive_block_id()
80 blk = GETFIELD(PC_TCTXT_CHIPID, cfg_val); in pnv_xive_block_id()
H A Dpnv_xive2.c95 uint64_t cfg_val = xive->cq_regs[CQ_XIVE_CFG >> 3]; in pnv_xive2_block_id() local
97 if (cfg_val & CQ_XIVE_CFG_HYP_HARD_BLKID_OVERRIDE) { in pnv_xive2_block_id()
98 blk = GETFIELD(CQ_XIVE_CFG_HYP_HARD_BLOCK_ID, cfg_val); in pnv_xive2_block_id()
/openbmc/linux/drivers/net/ethernet/broadcom/
H A Dtg3.c9194 u32 cfg_val; in tg3_chip_reset() local
9200 pci_read_config_dword(tp->pdev, 0xc4, &cfg_val); in tg3_chip_reset()
9202 cfg_val | (1 << 15)); in tg3_chip_reset()