| /openbmc/qemu/tests/unit/ |
| H A D | test-throttle.c | 739 ThrottleConfig cfg1, cfg2; in test_groups() local
774 throttle_config_init(&cfg1); in test_groups()
775 cfg1.buckets[THROTTLE_BPS_READ].avg = 500000; in test_groups()
776 cfg1.buckets[THROTTLE_BPS_WRITE].avg = 285000; in test_groups()
777 cfg1.buckets[THROTTLE_OPS_READ].avg = 20000; in test_groups()
778 cfg1.buckets[THROTTLE_OPS_WRITE].avg = 12000; in test_groups()
779 throttle_group_config(tgm1, &cfg1); in test_groups()
781 throttle_group_get_config(tgm1, &cfg1); in test_groups()
783 g_assert(!memcmp(&cfg1, &cfg2, sizeof(cfg1))); in test_groups()
789 throttle_group_config(tgm3, &cfg1); in test_groups()
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| /openbmc/linux/arch/loongarch/mm/ |
| H A D | cache.c | 96 unsigned int cfg1; \
98 cfg1 = read_cpucfg(LOONGARCH_CPUCFG17 + leaf); \
109 cdesc->ways = ((cfg1 & CPUCFG_CACHE_WAYS_M) >> CPUCFG_CACHE_WAYS) + 1; \
110 cdesc->sets = 1 << ((cfg1 & CPUCFG_CACHE_SETS_M) >> CPUCFG_CACHE_SETS); \
111 cdesc->linesz = 1 << ((cfg1 & CPUCFG_CACHE_LSIZE_M) >> CPUCFG_CACHE_LSIZE); \
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| /openbmc/linux/drivers/comedi/drivers/ |
| H A D | ni_at_ao.c | 106 unsigned short cfg1; member
118 devpriv->cfg1 |= ATAO_CFG1_GRP2WR; in atao_select_reg_group()
120 devpriv->cfg1 &= ~ATAO_CFG1_GRP2WR; in atao_select_reg_group()
121 outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG); in atao_select_reg_group()
269 devpriv->cfg1 = 0; in atao_reset()
270 outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG); in atao_reset()
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| /openbmc/linux/drivers/gpu/drm/exynos/ |
| H A D | exynos_drm_fimc.c | 419 u32 cfg1, cfg2; in fimc_src_set_transf() local
423 cfg1 = fimc_read(ctx, EXYNOS_MSCTRL); in fimc_src_set_transf()
424 cfg1 &= ~(EXYNOS_MSCTRL_FLIP_X_MIRROR | in fimc_src_set_transf()
433 cfg1 |= EXYNOS_MSCTRL_FLIP_X_MIRROR; in fimc_src_set_transf()
435 cfg1 |= EXYNOS_MSCTRL_FLIP_Y_MIRROR; in fimc_src_set_transf()
440 cfg1 |= EXYNOS_MSCTRL_FLIP_X_MIRROR; in fimc_src_set_transf()
442 cfg1 |= EXYNOS_MSCTRL_FLIP_Y_MIRROR; in fimc_src_set_transf()
445 cfg1 |= (EXYNOS_MSCTRL_FLIP_X_MIRROR | in fimc_src_set_transf()
448 cfg1 &= ~EXYNOS_MSCTRL_FLIP_X_MIRROR; in fimc_src_set_transf()
450 cfg1 &= ~EXYNOS_MSCTRL_FLIP_Y_MIRROR; in fimc_src_set_transf()
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| /openbmc/u-boot/arch/arm/include/asm/mach-imx/ |
| H A D | boot_mode.h | 8 #define MAKE_CFGVAL(cfg1, cfg2, cfg3, cfg4) \ argument
9 ((cfg4) << 24) | ((cfg3) << 16) | ((cfg2) << 8) | (cfg1)
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| /openbmc/linux/drivers/gpu/drm/nouveau/dispnv04/ |
| H A D | arb.c | 202 uint32_t cfg1 = nvif_rd32(device, NV04_PFB_CFG1); in nv04_update_arb() local
225 sim_data.mem_latency = cfg1 & 0xf; in nv04_update_arb()
226 sim_data.mem_page_miss = ((cfg1 >> 4) & 0xf) + ((cfg1 >> 31) & 0x1); in nv04_update_arb()
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| /openbmc/u-boot/drivers/net/ |
| H A D | pic32_eth.c | 75 writel(EMAC_SOFTRESET, &emac_p->cfg1.set); /* reset assert */ in pic32_mii_init()
77 writel(EMAC_SOFTRESET, &emac_p->cfg1.clr); /* reset deassert */ in pic32_mii_init()
172 writel(v, &emac_p->cfg1.raw); in pic32_mac_init()
219 writel(EMAC_SOFTRESET, &emac_p->cfg1.raw); in pic32_mac_reset()
223 writel(0, &emac_p->cfg1.raw); in pic32_mac_reset()
366 writel(EMAC_SOFTRESET, &emac_p->cfg1.raw); in pic32_eth_stop()
369 writel(0, &emac_p->cfg1.raw); in pic32_eth_stop()
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| /openbmc/linux/drivers/media/platform/atmel/ |
| H A D | atmel-isi.c | 360 u32 ctrl, cfg1; in start_dma() local
362 cfg1 = isi_readl(isi, ISI_CFG1); in start_dma()
387 cfg1 &= ~ISI_CFG1_FRATE_DIV_MASK; in start_dma()
389 cfg1 |= isi->pdata.frate | ISI_CFG1_DISCR; in start_dma()
398 isi_writel(isi, ISI_CFG1, cfg1); in start_dma()
792 u32 cfg1 = 0; in isi_camera_set_bus_param() local
797 cfg1 |= ISI_CFG1_HSYNC_POL_ACTIVE_LOW; in isi_camera_set_bus_param()
799 cfg1 |= ISI_CFG1_VSYNC_POL_ACTIVE_LOW; in isi_camera_set_bus_param()
801 cfg1 |= ISI_CFG1_PIXCLK_POL_ACTIVE_FALLING; in isi_camera_set_bus_param()
803 cfg1 |= ISI_CFG1_EMB_SYNC; in isi_camera_set_bus_param()
[all …]
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| /openbmc/qemu/hw/misc/ |
| H A D | mps2-scc.c | 157 r = s->cfg1; in mps2_scc_read()
261 s->cfg1 = value; in mps2_scc_write()
367 s->cfg1 = 0; in mps2_scc_reset()
439 VMSTATE_UINT32(cfg1, MPS2SCC),
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| /openbmc/linux/drivers/net/wireless/mediatek/mt76/mt76x2/ |
| H A D | phy.c | 187 u32 cfg0, cfg1; in mt76x2_configure_tx_delay() local
191 cfg1 = 0x00011414; in mt76x2_configure_tx_delay()
194 cfg1 = 0x00021414; in mt76x2_configure_tx_delay()
197 mt76_wr(dev, MT_TX_SW_CFG1, cfg1); in mt76x2_configure_tx_delay()
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| /openbmc/linux/drivers/iio/adc/ |
| H A D | imx7d_adc.c | 236 u32 cfg1 = 0; in imx7d_adc_channel_set() local
243 cfg1 |= (IMX7D_REG_ADC_CH_CFG1_CHANNEL_EN | in imx7d_adc_channel_set()
253 cfg1 |= IMX7D_REG_ADC_CH_CFG1_CHANNEL_SEL(channel); in imx7d_adc_channel_set()
270 writel(cfg1, info->regs + IMX7D_EACH_CHANNEL_REG_OFFSET * channel); in imx7d_adc_channel_set()
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| /openbmc/linux/drivers/infiniband/hw/erdma/ |
| H A D | erdma_hw.h | 243 u32 cfg1; member
269 u32 cfg1; member
332 u32 cfg1; member
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| /openbmc/linux/drivers/phy/qualcomm/ |
| H A D | phy-qcom-edp.c | 457 u8 cfg1; in qcom_edp_phy_power_on() local
546 cfg1 = 0x1; in qcom_edp_phy_power_on()
552 cfg1 = 0x3; in qcom_edp_phy_power_on()
558 cfg1 = 0xf; in qcom_edp_phy_power_on()
565 writel(cfg1, edp->edp + DP_PHY_CFG_1); in qcom_edp_phy_power_on()
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| /openbmc/qemu/include/hw/misc/ |
| H A D | mps2-scc.h | 49 uint32_t cfg1; member
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| /openbmc/u-boot/board/freescale/m5208evbe/ |
| H A D | m5208evbe.c | 41 out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1); in dram_init()
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| /openbmc/u-boot/board/freescale/m5329evb/ |
| H A D | m5329evb.c | 38 out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1); in dram_init()
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| /openbmc/u-boot/board/freescale/m53017evb/ |
| H A D | m53017evb.c | 41 out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1); in dram_init()
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| /openbmc/u-boot/board/freescale/m5373evb/ |
| H A D | m5373evb.c | 38 out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1); in dram_init()
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| /openbmc/linux/drivers/perf/ |
| H A D | fsl_imx9_ddr_perf.c | 364 static void ddr_perf_monitor_config(struct ddr_pmu *pmu, int cfg, int cfg1, int cfg2) in ddr_perf_monitor_config() argument
395 pmcfg2 |= FIELD_PREP(PMCFG2_ID, cfg1); in ddr_perf_monitor_config()
468 int cfg1 = event->attr.config1; in ddr_perf_event_add() local
480 ddr_perf_monitor_config(pmu, cfg, cfg1, cfg2); in ddr_perf_event_add()
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| /openbmc/linux/drivers/video/fbdev/nvidia/ |
| H A D | nv_hw.c | 387 unsigned int MClk, NVClk, cfg1; in nv4UpdateArbitrationSettings() local
391 cfg1 = NV_RD32(par->PFB, 0x00000204); in nv4UpdateArbitrationSettings()
397 sim_data.mem_latency = (char)cfg1 & 0x0F; in nv4UpdateArbitrationSettings()
400 (char)(((cfg1 >> 4) & 0x0F) + ((cfg1 >> 31) & 0x01)); in nv4UpdateArbitrationSettings()
626 unsigned int MClk, NVClk, cfg1; in nv10UpdateArbitrationSettings() local
630 cfg1 = NV_RD32(par->PFB, 0x0204); in nv10UpdateArbitrationSettings()
637 sim_data.mem_latency = (char)cfg1 & 0x0F; in nv10UpdateArbitrationSettings()
640 (char)(((cfg1 >> 4) & 0x0F) + ((cfg1 >> 31) & 0x01)); in nv10UpdateArbitrationSettings()
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| /openbmc/u-boot/board/freescale/m547xevb/ |
| H A D | m547xevb.c | 55 out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1); in dram_init()
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| /openbmc/linux/arch/sparc/include/asm/ |
| H A D | sbi.h | 21 /* 0x0014 */ u32 cfg1; /* Slot1 config reg */ member
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| /openbmc/u-boot/board/freescale/m548xevb/ |
| H A D | m548xevb.c | 55 out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1); in dram_init()
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| /openbmc/linux/drivers/net/ethernet/agere/ |
| H A D | et131x.c | 819 ¯egs->cfg1); in et1310_config_mac_regs1()
861 writel(0, ¯egs->cfg1); in et1310_config_mac_regs1()
869 u32 cfg1; in et1310_config_mac_regs2() local
875 cfg1 = readl(&mac->cfg1); in et1310_config_mac_regs2()
889 cfg1 |= ET_MAC_CFG1_RX_ENABLE | ET_MAC_CFG1_TX_ENABLE | in et1310_config_mac_regs2()
892 cfg1 &= ~(ET_MAC_CFG1_LOOPBACK | ET_MAC_CFG1_RX_FLOW); in et1310_config_mac_regs2()
894 cfg1 |= ET_MAC_CFG1_RX_FLOW; in et1310_config_mac_regs2()
895 writel(cfg1, &mac->cfg1); in et1310_config_mac_regs2()
921 cfg1 = readl(&mac->cfg1); in et1310_config_mac_regs2()
922 } while ((cfg1 & ET_MAC_CFG1_WAIT) != ET_MAC_CFG1_WAIT && delay < 100); in et1310_config_mac_regs2()
[all …]
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| /openbmc/linux/drivers/soc/qcom/ |
| H A D | qcom-geni-se.c | 434 u32 cfg0, cfg1, cfg[NUM_PACKING_VECTORS] = {0}; in geni_se_config_packing() local
463 cfg1 = cfg[2] | (cfg[3] << PACKING_VECTOR_SHIFT); in geni_se_config_packing()
467 writel_relaxed(cfg1, se->base + SE_GENI_TX_PACKING_CFG1); in geni_se_config_packing()
471 writel_relaxed(cfg1, se->base + SE_GENI_RX_PACKING_CFG1); in geni_se_config_packing()
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