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/openbmc/qemu/hw/alpha/
H A Dtyphoon.c56 TyphoonCchip cchip; member
97 ret = s->cchip.misc | (cpu->cpu_index & 3); in cchip_read()
114 ret = s->cchip.dim[0]; in cchip_read()
118 ret = s->cchip.dim[1]; in cchip_read()
122 ret = s->cchip.dim[0] & s->cchip.drir; in cchip_read()
126 ret = s->cchip.dim[1] & s->cchip.drir; in cchip_read()
130 ret = s->cchip.drir; in cchip_read()
139 ret = s->cchip.iic[0]; in cchip_read()
143 ret = s->cchip.iic[1]; in cchip_read()
163 ret = s->cchip.dim[2]; in cchip_read()
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/openbmc/linux/arch/alpha/kernel/
H A Dsys_titan.c62 register titan_cchip *cchip = TITAN_cchip; in titan_update_irq_hw() local
83 dim0 = &cchip->dim0.csr; in titan_update_irq_hw()
84 dim1 = &cchip->dim1.csr; in titan_update_irq_hw()
85 dim2 = &cchip->dim2.csr; in titan_update_irq_hw()
86 dim3 = &cchip->dim3.csr; in titan_update_irq_hw()
103 dimB = &cchip->dim0.csr; in titan_update_irq_hw()
104 if (bcpu == 1) dimB = &cchip->dim1.csr; in titan_update_irq_hw()
105 else if (bcpu == 2) dimB = &cchip->dim2.csr; in titan_update_irq_hw()
106 else if (bcpu == 3) dimB = &cchip->dim3.csr; in titan_update_irq_hw()
H A Dsys_dp264.c49 register tsunami_cchip *cchip = TSUNAMI_cchip; in tsunami_update_irq_hw() local
68 dim0 = &cchip->dim0.csr; in tsunami_update_irq_hw()
69 dim1 = &cchip->dim1.csr; in tsunami_update_irq_hw()
70 dim2 = &cchip->dim2.csr; in tsunami_update_irq_hw()
71 dim3 = &cchip->dim3.csr; in tsunami_update_irq_hw()
88 if (bcpu == 0) dimB = &cchip->dim0.csr; in tsunami_update_irq_hw()
89 else if (bcpu == 1) dimB = &cchip->dim1.csr; in tsunami_update_irq_hw()
90 else if (bcpu == 2) dimB = &cchip->dim2.csr; in tsunami_update_irq_hw()
91 else dimB = &cchip->dim3.csr; in tsunami_update_irq_hw()
/openbmc/linux/Documentation/arch/sh/
H A Dnew-machine.rst54 `-- cchip-specific files