Home
last modified time | relevance | path

Searched refs:cachectrl (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/include/hw/arm/
H A Darmsse.h182 UnimplementedDeviceState cachectrl[SSE_MAX_CPUS]; member
/openbmc/qemu/hw/arm/
H A Darmsse.c814 object_initialize_child(obj, name, &s->cachectrl[i], in armsse_init()
1470 qdev_prop_set_string(DEVICE(&s->cachectrl[i]), "name", name); in armsse_realize()
1472 qdev_prop_set_uint64(DEVICE(&s->cachectrl[i]), "size", 0x1000); in armsse_realize()
1473 if (!sysbus_realize(SYS_BUS_DEVICE(&s->cachectrl[i]), errp)) { in armsse_realize()
1477 mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->cachectrl[i]), 0); in armsse_realize()