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Searched refs:bus_width (Results 1 – 25 of 211) sorted by relevance

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/openbmc/linux/drivers/media/platform/rockchip/rkisp1/
H A Drkisp1-common.c23 .bus_width = 10,
30 .bus_width = 10,
37 .bus_width = 10,
44 .bus_width = 10,
51 .bus_width = 12,
58 .bus_width = 12,
65 .bus_width = 12,
72 .bus_width = 12,
79 .bus_width = 8,
86 .bus_width = 8,
[all …]
/openbmc/linux/drivers/mtd/lpddr/
H A Dlpddr2_nvm.c76 int bus_width; member
94 static inline u_int build_mr_cfgmask(u_int bus_width) in build_mr_cfgmask() argument
98 if (bus_width == 0x0004) /* x32 device */ in build_mr_cfgmask()
107 static inline u_int build_sr_ok_datamask(u_int bus_width) in build_sr_ok_datamask() argument
111 if (bus_width == 0x0004) /* x32 device */ in build_sr_ok_datamask()
125 val = map->pfow_base + offset*pcm_data->bus_width; in ow_reg_add()
140 writel_relaxed(build_mr_cfgmask(pcm_data->bus_width) | 0x18, in ow_enable()
155 writel_relaxed(build_mr_cfgmask(pcm_data->bus_width) | 0x18, in ow_disable()
172 u_int sr_ok_datamask = build_sr_ok_datamask(pcm_data->bus_width); in lpddr2_nvm_do_op()
191 if (pcm_data->bus_width == 0x0004) { /* 2x16 devices stacked */ in lpddr2_nvm_do_op()
[all …]
/openbmc/u-boot/drivers/mmc/
H A Ds5p_sdhci.c97 if (host->bus_width == 8) in s5p_sdhci_core_init()
107 int s5p_sdhci_init(u32 regbase, int index, int bus_width) in s5p_sdhci_init() argument
116 host->bus_width = bus_width; in s5p_sdhci_init()
125 flag = host->bus_width == 8 ? PINMUX_FLAG_8BIT_MODE : PINMUX_FLAG_NONE; in do_sdhci_init()
156 int bus_width, dev_id; in sdhci_get_config() local
168 bus_width = fdtdec_get_int(blob, node, "samsung,bus-width", 0); in sdhci_get_config()
169 if (bus_width <= 0) { in sdhci_get_config()
173 host->bus_width = bus_width; in sdhci_get_config()
H A Darm_pl180_mmci.c317 if (dev->bus_width) { in host_set_ios()
320 switch (dev->bus_width) { in host_set_ios()
331 printf("Invalid bus width: %d\n", dev->bus_width); in host_set_ios()
424 u32 bus_width; in arm_pl180_mmc_probe() local
453 bus_width = dev_read_u32_default(dev, "bus-width", 1); in arm_pl180_mmc_probe()
454 switch (bus_width) { in arm_pl180_mmc_probe()
464 dev_err(dev, "Invalid bus-width value %u\n", bus_width); in arm_pl180_mmc_probe()
H A Dtegra_mmc.c418 debug("bus_width: %x, clock: %d\n", mmc->bus_width, mmc->clock); in tegra_mmc_set_ios()
433 if (mmc->bus_width == 8) in tegra_mmc_set_ios()
435 else if (mmc->bus_width == 4) in tegra_mmc_set_ios()
595 int bus_width, ret; in tegra_mmc_probe() local
599 bus_width = dev_read_u32_default(dev, "bus-width", 1); in tegra_mmc_probe()
603 if (bus_width == 8) in tegra_mmc_probe()
605 if (bus_width >= 4) in tegra_mmc_probe()
H A Dfsl_esdhc.c128 unsigned int bus_width; member
903 if (mmc->bus_width == 8) in fsl_esdhc_execute_tuning()
905 else if (mmc->bus_width == 4) in fsl_esdhc_execute_tuning()
997 if (mmc->bus_width == 4) in esdhc_set_ios_common()
999 else if (mmc->bus_width == 8) in esdhc_set_ios_common()
1237 if (priv->bus_width == 8) in fsl_esdhc_init()
1239 else if (priv->bus_width == 4) in fsl_esdhc_init()
1247 if (priv->bus_width > 0) { in fsl_esdhc_init()
1248 if (priv->bus_width < 8) in fsl_esdhc_init()
1250 if (priv->bus_width < 4) in fsl_esdhc_init()
[all …]
/openbmc/u-boot/drivers/ddr/marvell/a38x/
H A Dmv_ddr_topology.c75 iface_params->bus_width = mv_ddr_spd_dev_width_get(&tm->spd_data); in mv_ddr_topology_map_update()
174 unsigned int bus_width; in mv_ddr_if_bus_width_get() local
180 bus_width = 16; in mv_ddr_if_bus_width_get()
185 bus_width = 32; in mv_ddr_if_bus_width_get()
189 bus_width = 64; in mv_ddr_if_bus_width_get()
193 bus_width = 0; in mv_ddr_if_bus_width_get()
196 return bus_width; in mv_ddr_if_bus_width_get()
257 if (iface_params->bus_width == MV_DDR_DEV_WIDTH_8BIT) in mv_ddr_mem_sz_per_cs_get()
259 else if (iface_params->bus_width == MV_DDR_DEV_WIDTH_16BIT) in mv_ddr_mem_sz_per_cs_get()
/openbmc/linux/drivers/memory/
H A Dmvebu-devbus.c64 u32 bus_width; member
115 err = of_property_read_u32(node, "devbus,bus-width", &r->bus_width); in devbus_get_timing_params()
127 if (r->bus_width == 8) { in devbus_get_timing_params()
128 r->bus_width = 0; in devbus_get_timing_params()
129 } else if (r->bus_width == 16) { in devbus_get_timing_params()
130 r->bus_width = 1; in devbus_get_timing_params()
132 dev_err(devbus->dev, "invalid bus width %d\n", r->bus_width); in devbus_get_timing_params()
215 r->bus_width << ORION_DEV_WIDTH_SHIFT | in devbus_orion_set_timing_params()
236 value = r->bus_width << ARMADA_DEV_WIDTH_SHIFT | in devbus_armada_set_timing_params()
/openbmc/u-boot/drivers/video/
H A Dmxsfb.c53 uint32_t word_len = 0, bus_width = 0; in mxs_lcd_init() local
65 bus_width = LCDIF_CTRL_LCD_DATABUS_WIDTH_24BIT; in mxs_lcd_init()
70 bus_width = LCDIF_CTRL_LCD_DATABUS_WIDTH_18BIT; in mxs_lcd_init()
75 bus_width = LCDIF_CTRL_LCD_DATABUS_WIDTH_16BIT; in mxs_lcd_init()
80 bus_width = LCDIF_CTRL_LCD_DATABUS_WIDTH_8BIT; in mxs_lcd_init()
85 writel(bus_width | word_len | LCDIF_CTRL_DOTCLK_MODE | in mxs_lcd_init()
/openbmc/u-boot/arch/arm/mach-s5pc1xx/include/mach/
H A Dmmc.h55 int s5p_sdhci_init(u32 regbase, int index, int bus_width);
57 static inline int s5p_mmc_init(int index, int bus_width) in s5p_mmc_init() argument
62 return s5p_sdhci_init(base, index, bus_width); in s5p_mmc_init()
/openbmc/u-boot/arch/arm/mach-exynos/include/mach/
H A Dmmc.h57 int s5p_sdhci_init(u32 regbase, int index, int bus_width);
59 static inline int s5p_mmc_init(int index, int bus_width) in s5p_mmc_init() argument
64 return s5p_sdhci_init(base, index, bus_width); in s5p_mmc_init()
/openbmc/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun6i.c22 u8 bus_width; member
64 if (para->bus_width == 32) { in mctl_dll_init()
74 if (para->bus_width == 32) { in mctl_dll_init()
84 if (para->bus_width == 32) { in mctl_dll_init()
182 para->bus_width = 16; in mctl_channel_init()
243 if (para->bus_width == 16) in mctl_channel_init()
272 ((para->bus_width == 32) ? MCTL_CR_BUSW32 : MCTL_CR_BUSW16) | in mctl_com_init()
337 .bus_width = 32, in sunxi_dram_init()
383 bus = (para.bus_width == 32) ? 2 : 1; in sunxi_dram_init()
H A Ddram_sun8i_a33.c28 u8 bus_width; member
40 ((para->bus_width == 16) ? MCTL_CR_BUSW16 : MCTL_CR_BUSW8) | in mctl_set_cr()
233 para->bus_width = 16; in mctl_channel_init()
276 para->bus_width = 8; in mctl_channel_init()
339 .bus_width = 16, in sunxi_dram_init()
359 return para.page_size * (para.bus_width / 8) * in sunxi_dram_init()
H A Ddram_sun8i_a23.c90 static void mctl_init(u32 *bus_width) in mctl_init() argument
244 *bus_width = 8; in mctl_init()
251 *bus_width = 16; in mctl_init()
271 u32 bus, bus_width, offset, page_size, rows; in sunxi_dram_init() local
274 mctl_init(&bus_width); in sunxi_dram_init()
276 if (bus_width == 16) { in sunxi_dram_init()
H A Ddram_sun8i_a83t.c26 u8 bus_width; member
39 ((para->bus_width == 16) ? MCTL_CR_BUSW16 : MCTL_CR_BUSW8) | in mctl_set_cr()
316 para->bus_width = 16; in mctl_channel_init()
368 para->bus_width = 8; in mctl_channel_init()
416 para->bus_width = 16; in mctl_sys_init()
437 .bus_width = 16, in sunxi_dram_init()
469 return para.page_size * (para.bus_width / 8) * in sunxi_dram_init()
/openbmc/linux/drivers/mmc/core/
H A Dmmc.c714 static int mmc_compare_ext_csds(struct mmc_card *card, unsigned bus_width) in mmc_compare_ext_csds() argument
719 if (bus_width == MMC_BUS_WIDTH_1) in mmc_compare_ext_csds()
889 unsigned int bus_width) in __mmc_select_powerclass() argument
901 pwrclass_val = (bus_width <= EXT_CSD_BUS_WIDTH_8) ? in __mmc_select_powerclass()
919 pwrclass_val = (bus_width <= EXT_CSD_BUS_WIDTH_8) ? in __mmc_select_powerclass()
923 pwrclass_val = (bus_width == EXT_CSD_DDR_BUS_WIDTH_8) ? in __mmc_select_powerclass()
933 if (bus_width & (EXT_CSD_BUS_WIDTH_8 | EXT_CSD_DDR_BUS_WIDTH_8)) in __mmc_select_powerclass()
954 u32 bus_width, ext_csd_bits; in mmc_select_powerclass() local
961 bus_width = host->ios.bus_width; in mmc_select_powerclass()
963 if (bus_width == MMC_BUS_WIDTH_1) in mmc_select_powerclass()
[all …]
/openbmc/u-boot/drivers/ddr/fsl/
H A Dddr3_dimm_params.c63 if ((spd->bus_width & 0x7) < 4) in compute_ranksize()
64 nbit_primary_bus_width = (spd->bus_width & 0x7) + 3; in compute_ranksize()
122 pdimm->primary_sdram_width = 1 << (3 + (spd->bus_width & 0x7)); in ddr_compute_dimm_parameters()
123 if ((spd->bus_width >> 3) & 0x3) in ddr_compute_dimm_parameters()
H A Dddr4_dimm_params.c98 if ((spd->bus_width & 0x7) < 4) in compute_ranksize()
99 nbit_primary_bus_width = (spd->bus_width & 0x7) + 3; in compute_ranksize()
174 pdimm->primary_sdram_width = 1 << (3 + (spd->bus_width & 0x7)); in ddr_compute_dimm_parameters()
175 if ((spd->bus_width >> 3) & 0x3) in ddr_compute_dimm_parameters()
/openbmc/linux/drivers/gpu/drm/atmel-hlcdc/
H A Datmel_hlcdc_output.c44 u32 bus_width; in atmel_hlcdc_of_bus_fmt() local
47 ret = of_property_read_u32(ep, "bus-width", &bus_width); in atmel_hlcdc_of_bus_fmt()
53 switch (bus_width) { in atmel_hlcdc_of_bus_fmt()
/openbmc/linux/drivers/usb/isp1760/
H A Disp1760-if.c207 u32 bus_width = 0; in isp1760_plat_probe() local
219 of_property_read_u32(dp, "bus-width", &bus_width); in isp1760_plat_probe()
220 if (bus_width == 16) in isp1760_plat_probe()
222 else if (bus_width == 8) in isp1760_plat_probe()
/openbmc/linux/include/linux/phy/
H A Dphy.h136 u32 bus_width; member
248 return phy->attrs.bus_width; in phy_get_bus_width()
250 static inline void phy_set_bus_width(struct phy *phy, int bus_width) in phy_set_bus_width() argument
252 phy->attrs.bus_width = bus_width; in phy_set_bus_width()
422 static inline void phy_set_bus_width(struct phy *phy, int bus_width) in phy_set_bus_width() argument
/openbmc/linux/drivers/dma/
H A Dimg-mdc-dma.c141 unsigned int bus_width; member
228 if (IS_ALIGNED(dst, mdma->bus_width) && in mdc_list_desc_config()
229 IS_ALIGNED(src, mdma->bus_width)) in mdc_list_desc_config()
230 max_burst = mdma->bus_width * mdma->max_burst_mult; in mdc_list_desc_config()
232 max_burst = mdma->bus_width * (mdma->max_burst_mult - 1); in mdc_list_desc_config()
237 mdc_set_read_width(ldesc, mdma->bus_width); in mdc_list_desc_config()
245 mdc_set_write_width(ldesc, mdma->bus_width); in mdc_list_desc_config()
251 mdc_set_read_width(ldesc, mdma->bus_width); in mdc_list_desc_config()
252 mdc_set_write_width(ldesc, mdma->bus_width); in mdc_list_desc_config()
359 if (width > mchan->mdma->bus_width) in mdc_check_slave_width()
[all …]
/openbmc/linux/drivers/mmc/host/
H A Dcavium.c826 int clk_period = 0, power_class = 10, bus_width = 0; in cvm_mmc_set_ios() local
854 switch (ios->bus_width) { in cvm_mmc_set_ios()
856 bus_width = 2; in cvm_mmc_set_ios()
859 bus_width = 1; in cvm_mmc_set_ios()
862 bus_width = 0; in cvm_mmc_set_ios()
867 if (ios->bus_width && ios->timing == MMC_TIMING_MMC_DDR52) in cvm_mmc_set_ios()
868 bus_width |= 4; in cvm_mmc_set_ios()
881 FIELD_PREP(MIO_EMM_SWITCH_BUS_WIDTH, bus_width) | in cvm_mmc_set_ios()
951 u32 id, cmd_skew = 0, dat_skew = 0, bus_width = 0; in cvm_mmc_of_parse() local
985 of_property_read_u32(node, "cavium,bus-max-width", &bus_width); in cvm_mmc_of_parse()
[all …]
/openbmc/linux/drivers/staging/rts5208/
H A Dsd.c262 u16 blk_cnt, u8 bus_width, u8 *buf, int buf_len, argument
294 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1, 0x03, bus_width);
329 u8 bus_width, u8 *buf, int buf_len, int timeout) argument
369 rtsx_add_cmd(chip, WRITE_REG_CMD, REG_SD_CFG1, 0x03, bus_width);
943 static int sd_check_spec(struct rtsx_chip *chip, u8 bus_width) argument
960 retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, 5, 8, 1, bus_width,
1089 u8 func_to_switch, u8 bus_width) argument
1120 retval = sd_read_data(chip, SD_TM_NORMAL_READ, cmd, 5, 64, 1, bus_width,
1191 u8 func_group, u8 func_to_switch, u8 bus_width) argument
1204 func_to_switch, bus_width);
[all …]
/openbmc/linux/drivers/spi/
H A Dspi-synquacer.c135 unsigned int bus_width; member
233 unsigned int speed, mode, bpw, cs, bus_width, transfer_mode; in synquacer_spi_config() local
245 bus_width = xfer->tx_nbits; in synquacer_spi_config()
248 bus_width = xfer->rx_nbits; in synquacer_spi_config()
259 bus_width == sspi->bus_width && bpw == sspi->bpw && in synquacer_spi_config()
341 val |= ((bus_width >> 1) << SYNQUACER_HSSPI_DMTRP_BUS_WIDTH_SHIFT); in synquacer_spi_config()
348 sspi->bus_width = bus_width; in synquacer_spi_config()

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