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Searched refs:anatop (Results 1 – 25 of 31) sorted by relevance

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/openbmc/u-boot/arch/arm/dts/
H A Dimx6sl.dtsi512 anatop: anatop@020c8000 { label
513 compatible = "fsl,imx6sl-anatop",
514 "fsl,imx6q-anatop",
522 compatible = "fsl,anatop-regulator";
527 anatop-reg-offset = <0x110>;
528 anatop-vol-bit-shift = <8>;
529 anatop-vol-bit-width = <5>;
530 anatop-min-bit-val = <4>;
531 anatop-min-voltage = <800000>;
532 anatop-max-voltage = <1375000>;
[all …]
H A Dimx6qdl.dtsi77 fsl,tempmon = <&anatop>;
682 anatop: anatop@20c8000 { label
683 compatible = "fsl,imx6q-anatop", "syscon", "simple-bus";
690 compatible = "fsl,anatop-regulator";
695 anatop-reg-offset = <0x110>;
696 anatop-vol-bit-shift = <8>;
697 anatop-vol-bit-width = <5>;
698 anatop-min-bit-val = <4>;
699 anatop-min-voltage = <800000>;
700 anatop-max-voltage = <1375000>;
[all …]
H A Dimx6sx.dtsi561 anatop: anatop@020c8000 { label
562 compatible = "fsl,imx6sx-anatop", "fsl,imx6q-anatop",
570 compatible = "fsl,anatop-regulator";
575 anatop-reg-offset = <0x110>;
576 anatop-vol-bit-shift = <8>;
577 anatop-vol-bit-width = <5>;
578 anatop-min-bit-val = <4>;
579 anatop-min-voltage = <800000>;
580 anatop-max-voltage = <1375000>;
584 compatible = "fsl,anatop-regulator";
[all …]
H A Dimx6ul.dtsi520 anatop: anatop@020c8000 { label
521 compatible = "fsl,imx6ul-anatop", "fsl,imx6q-anatop",
529 compatible = "fsl,anatop-regulator";
533 anatop-reg-offset = <0x120>;
534 anatop-vol-bit-shift = <8>;
535 anatop-vol-bit-width = <5>;
536 anatop-min-bit-val = <0>;
537 anatop-min-voltage = <2625000>;
538 anatop-max-voltage = <3400000>;
539 anatop-enable-bit = <0>;
[all …]
H A Dimx6ull.dtsi612 anatop: anatop@020c8000 { label
613 compatible = "fsl,imx6ul-anatop", "fsl,imx6q-anatop",
621 compatible = "fsl,anatop-regulator";
625 anatop-reg-offset = <0x120>;
626 anatop-vol-bit-shift = <8>;
627 anatop-vol-bit-width = <5>;
628 anatop-min-bit-val = <0>;
629 anatop-min-voltage = <2625000>;
630 anatop-max-voltage = <3400000>;
631 anatop-enable-bit = <0>;
[all …]
H A Dimx6sll.dtsi501 anatop: anatop@020c8000 { label
502 compatible = "fsl,imx6sll-anatop",
503 "fsl,imx6q-anatop",
511 compatible = "fsl,anatop-regulator";
515 anatop-reg-offset = <0x120>;
516 anatop-vol-bit-shift = <8>;
517 anatop-vol-bit-width = <5>;
518 anatop-min-bit-val = <0>;
519 anatop-min-voltage = <2625000>;
520 anatop-max-voltage = <3400000>;
[all …]
H A Dimx7s.dtsi547 fsl,tempmon =<&anatop>;
554 anatop: anatop@30360000 { label
555 compatible = "fsl,imx7d-anatop", "fsl,imx6q-anatop",
565 compatible = "fsl,anatop-regulator";
569 anatop-reg-offset = <0x210>;
570 anatop-vol-bit-shift = <8>;
571 anatop-vol-bit-width = <5>;
572 anatop-min-bit-val = <8>;
573 anatop-min-voltage = <800000>;
574 anatop-max-voltage = <1200000>;
[all …]
H A Dfsl-imx8mq.dtsi257 anatop: anatop@30360000 { label
258 compatible = "fsl,imx8mq-anatop", "fsl,imx6q-anatop",
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6sl.dtsi522 anatop: anatop@20c8000 { label
523 compatible = "fsl,imx6sl-anatop",
524 "fsl,imx6q-anatop",
532 compatible = "fsl,anatop-regulator";
537 anatop-reg-offset = <0x110>;
538 anatop-vol-bit-shift = <8>;
539 anatop-vol-bit-width = <5>;
540 anatop-min-bit-val = <4>;
541 anatop-min-voltage = <800000>;
542 anatop-max-voltage = <1375000>;
[all …]
H A Dimx6qdl.dtsi690 anatop: anatop@20c8000 { label
691 compatible = "fsl,imx6q-anatop", "syscon", "simple-mfd";
698 compatible = "fsl,anatop-regulator";
703 anatop-reg-offset = <0x110>;
704 anatop-vol-bit-shift = <8>;
705 anatop-vol-bit-width = <5>;
706 anatop-min-bit-val = <4>;
707 anatop-min-voltage = <800000>;
708 anatop-max-voltage = <1375000>;
709 anatop-enable-bit = <0>;
[all …]
H A Dimx6sx.dtsi615 anatop: anatop@20c8000 { label
616 compatible = "fsl,imx6sx-anatop", "fsl,imx6q-anatop",
624 compatible = "fsl,anatop-regulator";
629 anatop-reg-offset = <0x110>;
630 anatop-vol-bit-shift = <8>;
631 anatop-vol-bit-width = <5>;
632 anatop-min-bit-val = <4>;
633 anatop-min-voltage = <800000>;
634 anatop-max-voltage = <1375000>;
635 anatop-enable-bit = <0>;
[all …]
H A Dimx6ul.dtsi577 anatop: anatop@20c8000 { label
578 compatible = "fsl,imx6ul-anatop", "fsl,imx6q-anatop",
586 compatible = "fsl,anatop-regulator";
590 anatop-reg-offset = <0x120>;
591 anatop-vol-bit-shift = <8>;
592 anatop-vol-bit-width = <5>;
593 anatop-min-bit-val = <0>;
594 anatop-min-voltage = <2625000>;
595 anatop-max-voltage = <3400000>;
596 anatop-enable-bit = <0>;
[all …]
H A Dimx6sll.dtsi502 anatop: anatop@20c8000 { label
503 compatible = "fsl,imx6sll-anatop",
504 "fsl,imx6q-anatop",
514 compatible = "fsl,anatop-regulator";
519 anatop-reg-offset = <0x120>;
520 anatop-vol-bit-shift = <8>;
521 anatop-vol-bit-width = <5>;
522 anatop-min-bit-val = <0>;
523 anatop-min-voltage = <2625000>;
524 anatop-max-voltage = <3400000>;
[all …]
H A Dimx7s.dtsi569 anatop: anatop@30360000 { label
570 compatible = "fsl,imx7d-anatop", "fsl,imx6q-anatop",
577 compatible = "fsl,anatop-regulator";
581 anatop-reg-offset = <0x210>;
582 anatop-vol-bit-shift = <8>;
583 anatop-vol-bit-width = <5>;
584 anatop-min-bit-val = <8>;
585 anatop-min-voltage = <800000>;
586 anatop-max-voltage = <1200000>;
587 anatop-enable-bit = <0>;
[all …]
H A Dimxrt1050.dtsi46 anatop: anatop@400d8000 { label
47 compatible = "fsl,imxrt-anatop";
/openbmc/u-boot/drivers/thermal/
H A Dimx_thermal.c54 struct anatop_regs *anatop = (struct anatop_regs *)pdata->regs; in read_cpu_temperature() local
101 writel(TEMPSENSE0_POWER_DOWN, &anatop->tempsense0_clr); in read_cpu_temperature()
102 writel(MISC0_REFTOP_SELBIASOFF, &anatop->ana_misc0_set); in read_cpu_temperature()
105 reg = readl(&anatop->tempsense1); in read_cpu_temperature()
108 writel(reg, &anatop->tempsense1); in read_cpu_temperature()
111 writel(TEMPSENSE0_MEASURE_TEMP, &anatop->tempsense0_clr); in read_cpu_temperature()
112 writel(TEMPSENSE0_FINISHED, &anatop->tempsense0_clr); in read_cpu_temperature()
113 writel(TEMPSENSE0_MEASURE_TEMP, &anatop->tempsense0_set); in read_cpu_temperature()
116 while ((readl(&anatop->tempsense0) & in read_cpu_temperature()
121 reg = readl(&anatop->tempsense0); in read_cpu_temperature()
[all …]
/openbmc/u-boot/arch/arm/mach-imx/mx6/
H A Dsoc.c68 struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; in get_cpu_rev() local
69 u32 reg = readl(&anatop->digprog_sololite); in get_cpu_rev()
74 reg = readl(&anatop->digprog); in get_cpu_rev()
229 struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; in clear_ldo_ramp() local
236 reg = readl(&anatop->ana_misc2); in clear_ldo_ramp()
238 writel(reg, &anatop->ana_misc2); in clear_ldo_ramp()
250 struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; in set_ldo_voltage() local
251 u32 val, step, old, reg = readl(&anatop->reg_core); in set_ldo_voltage()
287 writel(reg, &anatop->reg_core); in set_ldo_voltage()
328 struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; in init_bandgap() local
[all …]
H A Dclock.c910 struct anatop_regs __iomem *anatop = in enable_fec_anatop_clock() local
916 reg = readl(&anatop->pll_enet); in enable_fec_anatop_clock()
934 writel(reg, &anatop->pll_enet); in enable_fec_anatop_clock()
936 if (readl(&anatop->pll_enet) & BM_ANADIG_PLL_ENET_LOCK) in enable_fec_anatop_clock()
949 writel(reg, &anatop->pll_enet); in enable_fec_anatop_clock()
1194 struct anatop_regs __iomem *anatop = in enable_pll3() local
1198 if ((readl(&anatop->usb1_pll_480_ctrl) & in enable_pll3()
1202 &anatop->usb1_pll_480_ctrl_set); in enable_pll3()
1203 writel(0x80, &anatop->ana_misc2_clr); in enable_pll3()
1205 while ((readl(&anatop->usb1_pll_480_ctrl) & in enable_pll3()
[all …]
/openbmc/linux/arch/arm/mach-imx/
H A Danatop.c35 static struct regmap *anatop; variable
41 regmap_read(anatop, ANADIG_ANA_MISC0, &val); in imx_anatop_enable_weak2p5()
47 regmap_write(anatop, reg, BM_ANADIG_REG_2P5_ENABLE_WEAK_LINREG); in imx_anatop_enable_weak2p5()
52 regmap_write(anatop, ANADIG_REG_CORE + (enable ? REG_SET : REG_CLR), in imx_anatop_enable_fet_odrive()
58 regmap_write(anatop, ANADIG_REG_2P5 + (enable ? REG_SET : REG_CLR), in imx_anatop_enable_2p5_pulldown()
64 regmap_write(anatop, ANADIG_ANA_MISC0 + (enable ? REG_SET : REG_CLR), in imx_anatop_disconnect_high_snvs()
160 anatop = syscon_regmap_lookup_by_compatible("fsl,imx6q-anatop"); in imx_anatop_init()
161 if (IS_ERR(anatop)) in imx_anatop_init()
H A DMakefile32 obj-$(CONFIG_HAVE_IMX_ANATOP) += anatop.o
/openbmc/u-boot/drivers/usb/host/
H A Dehci-mx6.c86 struct anatop_regs __iomem *anatop = in usb_power_config() local
94 chrg_detect = &anatop->usb1_chrg_detect; in usb_power_config()
95 pll_480_ctrl_clr = &anatop->usb1_pll_480_ctrl_clr; in usb_power_config()
96 pll_480_ctrl_set = &anatop->usb1_pll_480_ctrl_set; in usb_power_config()
99 chrg_detect = &anatop->usb2_chrg_detect; in usb_power_config()
100 pll_480_ctrl_clr = &anatop->usb2_pll_480_ctrl_clr; in usb_power_config()
101 pll_480_ctrl_set = &anatop->usb2_pll_480_ctrl_set; in usb_power_config()
/openbmc/linux/arch/arm/boot/dts/nxp/vf/
H A Dvfxxx.dtsi373 anatop: anatop@40050000 { label
374 compatible = "fsl,vf610-anatop", "syscon";
383 fsl,anatop = <&anatop>;
392 fsl,anatop = <&anatop>;
/openbmc/u-boot/board/freescale/mx6sxsabresd/
H A Dmx6sxsabresd.c110 struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; in setup_fec() local
133 reg = readl(&anatop->pll_enet); in setup_fec()
135 writel(reg, &anatop->pll_enet); in setup_fec()
/openbmc/u-boot/board/udoo/neo/
H A Dneo.c272 struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR; in setup_fec() local
284 reg = readl(&anatop->pll_enet); in setup_fec()
286 writel(reg, &anatop->pll_enet); in setup_fec()
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx93.dtsi381 anatop: anatop@44480000 { label
382 compatible = "fsl,imx93-anatop", "syscon";

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