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Searched refs:ahb_reset0_cfg (Results 1 – 15 of 15) sorted by relevance

/openbmc/u-boot/arch/arm/mach-sunxi/
H A Dcpu_info.c26 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_SS); in sunxi_get_ss_bonding_id()
34 clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_SS); in sunxi_get_ss_bonding_id()
H A Ddram_sun8i_a83t.c398 clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
410 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
H A Ddram_sun9i.c273 clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
280 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
H A Ddram_sunxi_dw.c374 clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
402 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
H A Dclock_sun6i.c56 setbits_le32(&ccm->ahb_reset0_cfg, 0x1 << AHB_GATE_OFFSET_SATA); in clock_init_safe()
H A Ddram_sun8i_a33.c314 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
H A Ddram_sun8i_a23.c68 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
H A Ddram_sun6i.c45 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
/openbmc/u-boot/board/sunxi/
H A Dgmac.c17 setbits_le32(&ccm->ahb_reset0_cfg, 0x1 << AHB_RESET_OFFSET_GMAC);
H A Dboard.c358 setbits_le32(&ccm->ahb_reset0_cfg, (1 << AHB_GATE_OFFSET_NAND0)); in nand_clock_setup()
/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Dclock_sun9i.h90 u32 ahb_reset0_cfg; /* 0x5a0 AHB0 Software Reset Register */ member
H A Dclock_sun8i_a83t.h120 u32 ahb_reset0_cfg; /* 0x2c0 AHB1 Reset 0 config */ member
H A Dclock_sun6i.h158 u32 ahb_reset0_cfg; /* 0x2c0 AHB1 Reset 0 config */ member
/openbmc/u-boot/drivers/mmc/
H A Dsunxi_mmc.c551 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MMC(sdc_no)); in sunxi_mmc_init()
/openbmc/u-boot/drivers/net/
H A Dsun8i_emac.c677 setbits_le32(&ccm->ahb_reset0_cfg, BIT(AHB_RESET_OFFSET_GMAC)); in sun8i_emac_board_setup()