Searched refs:adll_tap (Results 1 – 5 of 5) sorted by relevance
490 u32 adll_tap; in mv_ddr_dm_vw_get() local512 for (adll_tap = 0; adll_tap < ADLL_TAPS_PER_PERIOD; adll_tap++) { in mv_ddr_dm_vw_get()514 odpg_addr = adll_tap * burst_len; in mv_ddr_dm_vw_get()544 for (adll_tap = 0; adll_tap < ADLL_TAPS_PER_PERIOD; adll_tap++) { in mv_ddr_dm_vw_get()546 DDR_PHY_DATA, CTX_PHY_REG(cs), adll_tap); in mv_ddr_dm_vw_get()548 odpg_addr = adll_tap * burst_len; in mv_ddr_dm_vw_get()581 for (adll_tap = 0; adll_tap < ADLL_TAPS_PER_PERIOD; adll_tap++) { in mv_ddr_dm_vw_get()583 odpg_addr = adll_tap * burst_len; in mv_ddr_dm_vw_get()589 idx = ADLL_TAPS_PER_PERIOD * subphy + adll_tap; in mv_ddr_dm_vw_get()
11 int ddr3_tip_cmd_addr_init_delay(u32 dev_num, u32 adll_tap);
629 int ddr3_tip_cmd_addr_init_delay(u32 dev_num, u32 adll_tap) in ddr3_tip_cmd_addr_init_delay() argument655 ck_num_adll_tap = ck_delay / adll_tap; in ddr3_tip_cmd_addr_init_delay()656 ca_num_adll_tap = ca_delay / adll_tap; in ddr3_tip_cmd_addr_init_delay()668 ck_num_adll_tap, ca_num_adll_tap, adll_tap)); in ddr3_tip_cmd_addr_init_delay()
345 u32 bus_cnt = 0, adll_tap = 0; in hws_ddr3_tip_init_controller() local666 adll_tap = MEGA / (mv_ddr_freq_get(freq) * 64); in hws_ddr3_tip_init_controller()667 ddr3_tip_cmd_addr_init_delay(dev_num, adll_tap); in hws_ddr3_tip_init_controller()1208 u32 adll_tap = 0; in ddr3_tip_freq_set() local1482 adll_tap = (is_dll_off == 1) ? 1000 : (MEGA / (freq * 64)); in ddr3_tip_freq_set()1483 ddr3_tip_cmd_addr_init_delay(dev_num, adll_tap); in ddr3_tip_freq_set()
39 int adll_tap = MEGA / mv_ddr_freq_get(medium_freq) / 64; in ddr3_tip_pbs() local790 adll_tap / in ddr3_tip_pbs()