| /openbmc/linux/Documentation/devicetree/bindings/crypto/ |
| H A D | img-hash.txt | 1 Imagination Technologies hardware hash accelerator
3 The hash accelerator provides hardware hashing acceleration for
8 - compatible : "img,hash-accelerator"
15 "hash" Used to clock data through the accelerator
20 compatible = "img,hash-accelerator";
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| /openbmc/openbmc/meta-arm/meta-arm-bsp/recipes-bsp/trusted-firmware-m/files/corstone1000/ |
| H A D | 0013-CC312-ADAC-Add-PSA_WANT_ALG_SHA_256-definition.patch | 18 platform/ext/accelerator/cc312/psa-adac/CMakeLists.txt | 3 ++-
21 diff --git a/platform/ext/accelerator/cc312/psa-adac/CMakeLists.txt b/platform/ext/accelerator/cc31…
23 --- a/platform/ext/accelerator/cc312/psa-adac/CMakeLists.txt
24 +++ b/platform/ext/accelerator/cc312/psa-adac/CMakeLists.txt
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| /openbmc/qemu/accel/ |
| H A D | accel-system.c | 37 ms->accelerator = accel; in accel_init_machine()
41 ms->accelerator = NULL; in accel_init_machine()
52 return current_machine->accelerator; in current_accel()
57 AccelState *accel = ms->accelerator; in accel_setup_post()
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| /openbmc/linux/drivers/crypto/hisilicon/ |
| H A D | Kconfig | 4 tristate "Support for Hisilicon SEC crypto block cipher accelerator"
18 tristate "Support for HiSilicon SEC2 crypto block cipher accelerator"
49 HiSilicon accelerator engines use a common queue management
53 tristate "Support for HiSilicon ZIP accelerator"
64 tristate "Support for HISI HPRE accelerator"
76 accelerator, which can accelerate RSA and DH algorithms.
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| /openbmc/linux/drivers/crypto/ |
| H A D | Kconfig | 176 tristate "Driver HIFN 795x crypto accelerator chips"
232 tristate "Driver AMCC PPC4xx crypto accelerator"
263 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
272 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
286 OMAP processors have AES module accelerator. Select this if you
296 OMAP processors have DES/3DES module accelerator. Select this if you
304 tristate "Support for SAHARA crypto accelerator"
310 This option enables support for the SAHARA HW crypto accelerator
329 tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
340 bool "Support for Samsung Exynos HASH accelerator"
[all …]
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| /openbmc/u-boot/lib/rsa/ |
| H A D | Kconfig | 32 bool "Enable RSA Modular Exponentiation with FSL crypto accelerator"
36 accelerator - CAAM.
39 bool "Enable RSA Modular Exponentiation with ASPEED crypto accelerator"
43 accelerator - ARCY
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| /openbmc/linux/drivers/crypto/stm32/ |
| H A D | Kconfig | 8 This enables support for the CRC32 hw accelerator which can be found
23 This enables support for the HASH hw accelerator which can be found
33 This enables support for the CRYP (AES/DES/TDES) hw accelerator which
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| /openbmc/linux/drivers/media/platform/samsung/s5p-g2d/ |
| H A D | Kconfig | 2 tristate "Samsung S5P and EXYNOS4 G2D 2d graphics accelerator driver"
10 2d graphics accelerator.
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| /openbmc/linux/drivers/net/ethernet/chelsio/inline_crypto/ |
| H A D | Kconfig | 22 Support Chelsio Inline TLS with Chelsio crypto accelerator.
34 Support Chelsio Inline IPsec with Chelsio crypto accelerator.
48 crypto accelerator. CONFIG_CHELSIO_TLS_DEVICE flag can be enabled
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| /openbmc/qemu/docs/devel/migration/ |
| H A D | uadk-compression.rst | 4 UADK is a general-purpose user space accelerator framework that uses shared
22 the hardware accelerator to support SVA, and the operating system to support
101 Here's an example to enable UACCE with hardware accelerator in HiSilicon
117 Hardware accelerators (eg: HiSilicon Kunpeng Zip accelerator) gets registered to
119 on hardware accelerator devices, write permission should be provided to user.
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| /openbmc/linux/arch/powerpc/platforms/book3s/ |
| H A D | Kconfig | 10 provide access to accelerator coprocessors such as NX-GZIP and
12 and user-mode APIs for the NX-GZIP accelerator on POWER9 PowerNV
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| /openbmc/qemu/tests/functional/qemu_test/ |
| H A D | testcase.py | 139 def require_accelerator(self, accelerator): argument
153 'kvm': kvm_available}.get(accelerator)
156 "of accelerator %s" % accelerator)
159 "available" % accelerator)
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| /openbmc/qemu/docs/system/ |
| H A D | target-s390x.rst | 11 When using KVM as accelerator, QEMU can emulate CPUs up to the generation
12 of the host. When using the default cpu model with TCG as accelerator,
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| /openbmc/linux/Documentation/accel/ |
| H A D | introduction.rst | 16 Typically, a compute accelerator will belong to one of the following
54 devices. In addition, new features that will be added for the accelerator
61 from trying to use an accelerator as a GPU, the compute accelerators will be
67 The accelerator devices will be exposed to the user space with the dedicated
85 To expose your device as an accelerator, two changes are needed to
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| /openbmc/linux/Documentation/misc-devices/ |
| H A D | uacce.rst | 8 So accelerator can access any data structure of the main cpu.
13 Uacce takes the hardware accelerator as a heterogeneous processor, while
95 The accelerator device present itself as an Uacce object, which exports as
175 match the right accelerator accordingly.
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| /openbmc/qemu/tests/avocado/avocado_qemu/ |
| H A D | __init__.py | 282 def require_accelerator(self, accelerator): argument
296 'kvm': kvm_available}.get(accelerator)
299 "of accelerator %s" % accelerator)
302 "available" % accelerator)
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| /openbmc/linux/Documentation/devicetree/bindings/powerpc/4xx/ |
| H A D | ppc440spe-adma.txt | 64 - compatible : "amcc,xor-accelerator";
71 compatible = "amcc,xor-accelerator";
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| /openbmc/linux/Documentation/accel/qaic/ |
| H A D | index.rst | 8 accelerator cards.
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| /openbmc/linux/Documentation/devicetree/bindings/net/ |
| H A D | hisilicon-hns-nic.txt | 7 - ae-handle: accelerator engine handle for hns,
10 - port-id: is the index of port provided by DSAF (the accelerator). DSAF can
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| /openbmc/qemu/qapi/ |
| H A D | machine-target.json | 39 # options, and accelerator options. Therefore, the resulting
148 # * machine options (including accelerator): in some architectures,
149 # CPU models may look different depending on machine and accelerator
206 # * machine options (including accelerator): in some architectures,
207 # CPU models may look different depending on machine and accelerator
284 # * machine options (including accelerator): in some architectures,
285 # CPU models may look different depending on machine and accelerator
336 # accelerator options. A static model is always migration-safe.
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| /openbmc/linux/Documentation/ABI/testing/ |
| H A D | sysfs-driver-hid-logitech-lg4ff | 72 Description: Controls whether a combined value of accelerator and brake is
74 which can do not work with separate accelerator/brake axis.
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| /openbmc/linux/Documentation/devicetree/bindings/arm/omap/ |
| H A D | iva.txt | 3 The IVA contain various audio, video or imaging HW accelerator
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| /openbmc/linux/drivers/media/platform/qcom/venus/ |
| H A D | Kconfig | 11 This is a V4L2 driver for Qualcomm Venus video accelerator
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| /openbmc/linux/drivers/media/platform/amlogic/meson-ge2d/ |
| H A D | Kconfig | 9 This is a v4l2 driver for Amlogic GE2D 2D graphics accelerator.
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| /openbmc/linux/Documentation/powerpc/ |
| H A D | cxl.rst | 8 The coherent accelerator interface is designed to allow the
17 Coherent in this context means that the accelerator and CPUs can
52 The AFU is the core part of the accelerator (eg. the compression,
86 this mode, only one userspace process can use the accelerator at
91 applications may use the accelerator (although specific AFUs may
102 A portion of the accelerator MMIO space can be directly mapped
403 FPGA accelerator. Once the image is written and verified, the
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