Home
last modified time | relevance | path

Searched refs:_nr (Results 1 – 25 of 45) sorted by relevance

12

/openbmc/linux/arch/arm/mach-s3c/
H A Dgpio-samsung-s3c64xx.h67 #define S3C64XX_GPA(_nr) (S3C64XX_GPIO_A_START + (_nr)) argument
68 #define S3C64XX_GPB(_nr) (S3C64XX_GPIO_B_START + (_nr)) argument
69 #define S3C64XX_GPC(_nr) (S3C64XX_GPIO_C_START + (_nr)) argument
70 #define S3C64XX_GPD(_nr) (S3C64XX_GPIO_D_START + (_nr)) argument
71 #define S3C64XX_GPE(_nr) (S3C64XX_GPIO_E_START + (_nr)) argument
72 #define S3C64XX_GPF(_nr) (S3C64XX_GPIO_F_START + (_nr)) argument
73 #define S3C64XX_GPG(_nr) (S3C64XX_GPIO_G_START + (_nr)) argument
74 #define S3C64XX_GPH(_nr) (S3C64XX_GPIO_H_START + (_nr)) argument
75 #define S3C64XX_GPI(_nr) (S3C64XX_GPIO_I_START + (_nr)) argument
76 #define S3C64XX_GPJ(_nr) (S3C64XX_GPIO_J_START + (_nr)) argument
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Dgpio.h125 #define SUNXI_GPA(_nr) (SUNXI_GPIO_A_START + (_nr)) argument
126 #define SUNXI_GPB(_nr) (SUNXI_GPIO_B_START + (_nr)) argument
127 #define SUNXI_GPC(_nr) (SUNXI_GPIO_C_START + (_nr)) argument
128 #define SUNXI_GPD(_nr) (SUNXI_GPIO_D_START + (_nr)) argument
129 #define SUNXI_GPE(_nr) (SUNXI_GPIO_E_START + (_nr)) argument
130 #define SUNXI_GPF(_nr) (SUNXI_GPIO_F_START + (_nr)) argument
131 #define SUNXI_GPG(_nr) (SUNXI_GPIO_G_START + (_nr)) argument
132 #define SUNXI_GPH(_nr) (SUNXI_GPIO_H_START + (_nr)) argument
133 #define SUNXI_GPI(_nr) (SUNXI_GPIO_I_START + (_nr)) argument
134 #define SUNXI_GPL(_nr) (SUNXI_GPIO_L_START + (_nr)) argument
[all …]
/openbmc/linux/include/linux/
H A Dhwmon-sysfs.h54 #define SENSOR_ATTR_2(_name, _mode, _show, _store, _nr, _index) \ argument
57 .nr = _nr }
59 #define SENSOR_ATTR_2_RO(_name, _func, _nr, _index) \ argument
60 SENSOR_ATTR_2(_name, 0444, _func##_show, NULL, _nr, _index)
62 #define SENSOR_ATTR_2_RW(_name, _func, _nr, _index) \ argument
63 SENSOR_ATTR_2(_name, 0644, _func##_show, _func##_store, _nr, _index)
65 #define SENSOR_ATTR_2_WO(_name, _func, _nr, _index) \ argument
66 SENSOR_ATTR_2(_name, 0200, NULL, _func##_store, _nr, _index)
68 #define SENSOR_DEVICE_ATTR_2(_name,_mode,_show,_store,_nr,_index) \ argument
70 = SENSOR_ATTR_2(_name, _mode, _show, _store, _nr, _index)
[all …]
H A Dgeneric-radix-tree.h233 #define genradix_prealloc(_radix, _nr, _gfp) \ argument
235 __genradix_idx_to_offset(_radix, _nr + 1),\
/openbmc/linux/include/linux/soc/samsung/
H A Dexynos-regs-pmu.h135 #define EXYNOS_ARM_CORE_CONFIGURATION(_nr) \ argument
136 (EXYNOS_ARM_CORE0_CONFIGURATION + (0x80 * (_nr)))
137 #define EXYNOS_ARM_CORE_STATUS(_nr) \ argument
138 (EXYNOS_ARM_CORE_CONFIGURATION(_nr) + 0x4)
139 #define EXYNOS_ARM_CORE_OPTION(_nr) \ argument
140 (EXYNOS_ARM_CORE_CONFIGURATION(_nr) + 0x8)
143 #define EXYNOS_COMMON_CONFIGURATION(_nr) \ argument
144 (EXYNOS_ARM_COMMON_CONFIGURATION + (0x80 * (_nr)))
145 #define EXYNOS_COMMON_STATUS(_nr) \ argument
146 (EXYNOS_COMMON_CONFIGURATION(_nr) + 0x4)
[all …]
/openbmc/u-boot/drivers/pinctrl/mvebu/
H A Dpinctrl-armada-37xx.c100 #define PIN_GRP(_name, _start, _nr, _mask, _func1, _func2) \ argument
104 .npins = _nr, \
110 #define PIN_GRP_GPIO(_name, _start, _nr, _mask, _func1) \ argument
114 .npins = _nr, \
120 #define PIN_GRP_GPIO_2(_name, _start, _nr, _mask, _val1, _val2, _func1) \ argument
124 .npins = _nr, \
130 #define PIN_GRP_GPIO_3(_name, _start, _nr, _mask, _v1, _v2, _v3, _f1, _f2) \ argument
134 .npins = _nr, \
140 #define PIN_GRP_EXTRA(_name, _start, _nr, _mask, _v1, _v2, _start2, _nr2, \ argument
145 .npins = _nr, \
/openbmc/qemu/linux-headers/asm-generic/
H A Dunistd.h20 #define __SC_3264(_nr, _32, _64) __SYSCALL(_nr, _32) argument
22 #define __SC_3264(_nr, _32, _64) __SYSCALL(_nr, _64) argument
26 #define __SC_COMP(_nr, _sys, _comp) __SYSCALL(_nr, _comp) argument
27 #define __SC_COMP_3264(_nr, _32, _64, _comp) __SYSCALL(_nr, _comp) argument
29 #define __SC_COMP(_nr, _sys, _comp) __SYSCALL(_nr, _sys) argument
30 #define __SC_COMP_3264(_nr, _32, _64, _comp) __SC_3264(_nr, _32, _64) argument
/openbmc/linux/tools/include/uapi/asm-generic/
H A Dunistd.h20 #define __SC_3264(_nr, _32, _64) __SYSCALL(_nr, _32) argument
22 #define __SC_3264(_nr, _32, _64) __SYSCALL(_nr, _64) argument
26 #define __SC_COMP(_nr, _sys, _comp) __SYSCALL(_nr, _comp) argument
27 #define __SC_COMP_3264(_nr, _32, _64, _comp) __SYSCALL(_nr, _comp) argument
29 #define __SC_COMP(_nr, _sys, _comp) __SYSCALL(_nr, _sys) argument
30 #define __SC_COMP_3264(_nr, _32, _64, _comp) __SC_3264(_nr, _32, _64) argument
/openbmc/linux/include/uapi/asm-generic/
H A Dunistd.h20 #define __SC_3264(_nr, _32, _64) __SYSCALL(_nr, _32) argument
22 #define __SC_3264(_nr, _32, _64) __SYSCALL(_nr, _64) argument
26 #define __SC_COMP(_nr, _sys, _comp) __SYSCALL(_nr, _comp) argument
27 #define __SC_COMP_3264(_nr, _32, _64, _comp) __SYSCALL(_nr, _comp) argument
29 #define __SC_COMP(_nr, _sys, _comp) __SYSCALL(_nr, _sys) argument
30 #define __SC_COMP_3264(_nr, _32, _64, _comp) __SC_3264(_nr, _32, _64) argument
/openbmc/linux/tools/perf/tests/
H A Dfdarray.c114 #define FDA_ADD(_idx, _fd, _revents, _nr) \ in test__fdarray__add() argument
120 if (fda->nr != _nr) { \ in test__fdarray__add()
122 __LINE__,_fd, _revents, fda->nr, _nr); \ in test__fdarray__add()
/openbmc/linux/drivers/iio/light/
H A Dlm3533-als.c609 #define ALS_THRESH_FALLING_ATTR_RW(_nr) \ argument
610 LM3533_ALS_ATTR(in_illuminance0_thresh##_nr##_falling_value, \
613 LM3533_ATTR_TYPE_THRESH_FALLING, _nr, 0)
615 #define ALS_THRESH_RAISING_ATTR_RW(_nr) \ argument
616 LM3533_ALS_ATTR(in_illuminance0_thresh##_nr##_raising_value, \
619 LM3533_ATTR_TYPE_THRESH_RAISING, _nr, 0)
636 #define ALS_HYSTERESIS_ATTR_RO(_nr) \ argument
637 LM3533_ALS_ATTR(in_illuminance0_thresh##_nr##_hysteresis, \
639 LM3533_ATTR_TYPE_HYSTERESIS, _nr, 0)
/openbmc/linux/drivers/mfd/
H A Dlm3533-core.c326 #define LM3533_OUTPUT_HVLED_ATTR_RW(_nr) \ argument
327 LM3533_OUTPUT_ATTR_RW(hvled##_nr, LM3533_ATTR_TYPE_BACKLIGHT, _nr)
328 #define LM3533_OUTPUT_LVLED_ATTR_RW(_nr) \ argument
329 LM3533_OUTPUT_ATTR_RW(lvled##_nr, LM3533_ATTR_TYPE_LED, _nr)
/openbmc/linux/drivers/pinctrl/mvebu/
H A Dpinctrl-armada-37xx.c113 #define PIN_GRP_GPIO_0(_name, _start, _nr) \ argument
117 .npins = _nr, \
123 #define PIN_GRP_GPIO(_name, _start, _nr, _mask, _func1) \ argument
127 .npins = _nr, \
133 #define PIN_GRP_GPIO_2(_name, _start, _nr, _mask, _val1, _val2, _func1) \ argument
137 .npins = _nr, \
143 #define PIN_GRP_GPIO_3(_name, _start, _nr, _mask, _v1, _v2, _v3, _f1, _f2) \ argument
147 .npins = _nr, \
153 #define PIN_GRP_EXTRA(_name, _start, _nr, _mask, _v1, _v2, _start2, _nr2, \ argument
158 .npins = _nr, \
/openbmc/u-boot/drivers/clk/rockchip/
H A Dclk_rk3188.c73 #define PLL_DIVISORS(hz, _nr, _no) {\ argument
74 .nr = _nr, .nf = (u32)((u64)hz * _nr * _no / OSC_HZ), .no = _no};\
75 _Static_assert(((u64)hz * _nr * _no / OSC_HZ) * OSC_HZ /\
76 (_nr * _no) == hz, #hz "Hz cannot be hit with PLL "\
H A Dclk_rk3368.c43 #define PLL_DIVISORS(hz, _nr, _no) { \ argument
44 .nr = _nr, .nf = (u32)((u64)hz * _nr * _no / OSC_HZ), .no = _no}; \
45 _Static_assert(((u64)hz * _nr * _no / OSC_HZ) * OSC_HZ /\
46 (_nr * _no) == hz, #hz "Hz cannot be hit with PLL " \
/openbmc/qemu/linux-user/hexagon/
H A Dmeson.build5 output: '@BASENAME@_nr.h')
/openbmc/qemu/linux-user/alpha/
H A Dmeson.build4 output: '@BASENAME@_nr.h')
/openbmc/qemu/linux-user/sh4/
H A Dmeson.build4 output: '@BASENAME@_nr.h')
/openbmc/qemu/linux-user/microblaze/
H A Dmeson.build4 output: '@BASENAME@_nr.h')
/openbmc/qemu/linux-user/mips/
H A Dmeson.build5 output: '@BASENAME@_nr.h')
/openbmc/qemu/linux-user/sparc/
H A Dmeson.build4 output: '@BASENAME@_nr.h')
/openbmc/qemu/linux-user/xtensa/
H A Dmeson.build4 output: '@BASENAME@_nr.h')
/openbmc/qemu/linux-user/openrisc/
H A Dmeson.build4 output: '@BASENAME@_nr.h')
/openbmc/qemu/linux-user/m68k/
H A Dmeson.build4 output: '@BASENAME@_nr.h')
/openbmc/qemu/linux-user/mips64/
H A Dmeson.build5 output: '@BASENAME@_nr.h')

12