Home
last modified time | relevance | path

Searched refs:XOR_BASE_ADDR_REG (Results 1 – 5 of 5) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dxor.c29 xor_regs_base_backup[ui] = reg_read(XOR_BASE_ADDR_REG(0, ui)); in mv_sys_xor_init()
45 reg_write(XOR_BASE_ADDR_REG(0, dram_info->num_cs), base); in mv_sys_xor_init()
71 reg_write(XOR_BASE_ADDR_REG(0, cs_count), base); in mv_sys_xor_init()
90 reg_write(XOR_BASE_ADDR_REG(0, ui), xor_regs_base_backup[ui]); in mv_sys_xor_finish()
H A Dxor_regs.h97 #define XOR_BASE_ADDR_REG(unit, win) (MV_XOR_REGS_BASE(unit) + (0x250 + ((win) * 4))) macro
/openbmc/u-boot/arch/arm/mach-mvebu/
H A Ddram.c125 xor_base_save = reg_read(XOR_BASE_ADDR_REG(SCRB_XOR_UNIT, in mv_xor_init2()
140 reg_write(XOR_BASE_ADDR_REG(SCRB_XOR_UNIT, SCRB_XOR_WIN), in mv_xor_init2()
158 reg_write(XOR_BASE_ADDR_REG(SCRB_XOR_UNIT, SCRB_XOR_WIN), in mv_xor_finish2()
/openbmc/u-boot/drivers/ddr/marvell/a38x/
H A Dxor.c29 reg_read(XOR_BASE_ADDR_REG(0, ui)); in mv_sys_xor_init()
81 reg_write(XOR_BASE_ADDR_REG(0, ui), (u32)base); in mv_sys_xor_init()
100 reg_write(XOR_BASE_ADDR_REG(0, ui), in mv_sys_xor_finish()
H A Dxor_regs.h183 #define XOR_BASE_ADDR_REG(unit, win_num) (MV_XOR_REGS_BASE(unit) + \ macro