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Searched refs:XCHAL_DEBUGLEVEL (Results 1 – 25 of 29) sorted by relevance

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/openbmc/qemu/tests/tcg/xtensa/
H A Dtest_break.S7 #define debug_level XCHAL_DEBUGLEVEL
8 #define debug_vector glue(level, XCHAL_DEBUGLEVEL)
9 #define EPC_DEBUG glue(epc, XCHAL_DEBUGLEVEL)
/openbmc/linux/arch/xtensa/include/asm/
H A Dirqflags.h30 #if defined(CONFIG_DEBUG_MISC) && (LOCKLEVEL | TOPLEVEL) >= XCHAL_DEBUGLEVEL in arch_local_irq_save()
/openbmc/linux/arch/xtensa/boot/boot-elf/
H A Dbootstrap.S61 rsil a0, XCHAL_DEBUGLEVEL-1
/openbmc/linux/arch/xtensa/kernel/
H A Dentry.S72 #if defined(CONFIG_DEBUG_KERNEL) && (LOCKLEVEL | TOPLEVEL) >= XCHAL_DEBUGLEVEL
795 rsr a0, SREG_EPS + XCHAL_DEBUGLEVEL
801 rsr a2, SREG_EPC + XCHAL_DEBUGLEVEL
824 xsr a3, SREG_EXCSAVE + XCHAL_DEBUGLEVEL
879 xsr a3, SREG_EXCSAVE + XCHAL_DEBUGLEVEL
880 rfi XCHAL_DEBUGLEVEL
900 xsr a3, SREG_EXCSAVE + XCHAL_DEBUGLEVEL
901 rfi XCHAL_DEBUGLEVEL
/openbmc/linux/arch/xtensa/variants/fsf/include/variant/
H A Dcore.h225 #define XCHAL_DEBUGLEVEL 4 /* debug interrupt level */ macro
/openbmc/qemu/target/xtensa/core-fsf/
H A Dcore-isa.h227 #define XCHAL_DEBUGLEVEL 4 /* debug interrupt level */ macro
/openbmc/linux/arch/xtensa/variants/test_mmuhifi_c3/include/variant/
H A Dcore.h240 #define XCHAL_DEBUGLEVEL 2 /* debug interrupt level */ macro
/openbmc/qemu/target/xtensa/core-dsp3400/
H A Dcore-isa.h294 #define XCHAL_DEBUGLEVEL 6 /* debug interrupt level */ macro
/openbmc/qemu/target/xtensa/core-lx106/
H A Dcore-isa.h309 #define XCHAL_DEBUGLEVEL 2 /* debug interrupt level */ macro
/openbmc/qemu/target/xtensa/core-dc232b/
H A Dcore-isa.h236 #define XCHAL_DEBUGLEVEL 6 /* debug interrupt level */ macro
/openbmc/linux/arch/xtensa/variants/dc232b/include/variant/
H A Dcore.h237 #define XCHAL_DEBUGLEVEL 6 /* debug interrupt level */ macro
/openbmc/qemu/target/xtensa/core-test_mmuhifi_c3/
H A Dcore-isa.h299 #define XCHAL_DEBUGLEVEL 2 /* debug interrupt level */ macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc232b/
H A Dcore.h235 #define XCHAL_DEBUGLEVEL 6 /* debug interrupt level */ macro
/openbmc/qemu/target/xtensa/core-dc233c/
H A Dcore-isa.h284 #define XCHAL_DEBUGLEVEL 6 /* debug interrupt level */ macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc233c/
H A Dcore.h263 #define XCHAL_DEBUGLEVEL 6 /* debug interrupt level */ macro
/openbmc/linux/arch/xtensa/variants/dc233c/include/variant/
H A Dcore.h285 #define XCHAL_DEBUGLEVEL 6 /* debug interrupt level */ macro
/openbmc/linux/arch/xtensa/variants/test_kc705_hifi/include/variant/
H A Dcore.h309 #define XCHAL_DEBUGLEVEL 6 /* debug interrupt level */ macro
/openbmc/linux/arch/xtensa/variants/de212/include/variant/
H A Dcore.h370 #define XCHAL_DEBUGLEVEL 6 /* debug interrupt level */ macro
/openbmc/linux/arch/xtensa/variants/csp/include/variant/
H A Dcore.h351 #define XCHAL_DEBUGLEVEL 6 /* debug interrupt level */ macro
/openbmc/qemu/target/xtensa/core-test_kc705_be/
H A Dcore-isa.h351 #define XCHAL_DEBUGLEVEL 6 /* debug interrupt level */ macro
/openbmc/u-boot/arch/xtensa/include/asm/arch-de212/
H A Dcore.h348 #define XCHAL_DEBUGLEVEL 6 /* debug interrupt level */ macro
/openbmc/linux/arch/xtensa/variants/test_kc705_be/include/variant/
H A Dcore.h352 #define XCHAL_DEBUGLEVEL 6 /* debug interrupt level */ macro
/openbmc/qemu/target/xtensa/core-de212/
H A Dcore-isa.h381 #define XCHAL_DEBUGLEVEL 6 /* debug interrupt level */ macro
/openbmc/qemu/target/xtensa/core-sample_controller/
H A Dcore-isa.h402 #define XCHAL_DEBUGLEVEL 6 /* debug interrupt level */ macro
/openbmc/qemu/target/xtensa/core-de233_fpu/
H A Dcore-isa.h465 #define XCHAL_DEBUGLEVEL 6 /* debug interrupt level */ macro

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